- Email: [email protected]
CADIC: an efficient integrated circuit design aid
The organisational implications o f CAAD S E Little (Dept of Design Research,
RCA, London) Two case-studiesof computer-aided architectural design systems forming the basis of an SERC/CASE funded research programme are summarized. The results indicate the process by which computer methods were identified and developed by the organizations and how the technology was adapted to changing circumstances. This experience is discussed with reference to the deployment of newer computing technologies currently available. Issued raised include the process of technical diffusion within organizations, the implications for design management and the relationship of technology to deskilling. The relevance to both private and public sector design practice and future technical innovation is discussed. Steve Little graduated from Aston University in architecture and applied psychology, spending eight years in practice in Manchester and Glasgow before joining the Department of Design Research, Royal College of Art, London, where he gained his doctorate and is currently a research associate.
A c o m p u t e r aided architectural design technique f o r the appraisal o f domestic activity spaces K Langskog (King Faisal University, Saudi
A rob/a) L W W Lalng (Scott Sutherland School of
Architecture, Robert Gordon's Institute of Technology, Aberdeen, UK) A computer program has been written which allows numerical appraisal of the efficiency of floor area usage of activity spaces. This was achieved by first developing a theoretical model of the 2D plan layout of activity spaces, taking into account the distribution of elements (predominantly furniture and fittings) and the user spaces required for using these elements, and secondly by allowing for the development of a model to 'assemble' and combine these elements to form activity spaces.The mathematical evaluation method is based on a penalty system containing three main penalty factors; one, degree of overlaps of elements and user spaces; two, economy of perimeter length of the activity space; and three, economy of proportional floor area consumption within the activity space. The technique should be of use to architects and other designers at the early design stages of floor space planning. Dr K Langskog has worked as an architect and urban designer in Norway and the U K. He received his doctorate for research in computer aided floor layout design and appraisal techniques in 1981. Dr Langskog is currently Assistant Professor on CAAD topics at King Falsal University, Saudi Arabia. Dr Laing held senior public posts as an architect in Scotland before rec=iving his doctorate for research in computer simulation techniques for air terminal passenger flow. He is currently lecturing and supervis-
104
ing CAAD research at Robert Gordon's Institute of Technology, Aberdeen. An alternative to the Daylight Evaluation Chart Eric J Fishhaut, Nicholas H Weingarten and Carmi J Neiger (Shidmore, Owings & Merrill,
USA) An alternative to the Daylight Evaluation Chart adopted by the City of New York Alternate Height and Setback Regulations of the Midtown Zoning Regulations is described. This alternative permits the computerization of both the plotting and scoring of this complex chart. The background and supporting algorithms for this procedure are also presented. This method has been implemented at Skidmore, Owings & Merrill and used successfully on a number of projects undertaken in the Midtown Manhattan area. Eric J Fishhaut received a B A degree in Mathematics from the Colorado College in 1980 and studied for two years at the University of Minnesota School of Architecture. In June 1982 Mr Fishhaut joined the Chicago office of Skidmore, Owings & Merrill where he is currently Coordinator for Architectural Applications in computer graphics. Mr Fishhaut served as team leader for the New York Daylight Evaluation Programming project. Nicholas H Weingarten is an Associate Partner in the Chicago office of Skidmore, Owings & Merrill. Mr Weingarten received B Arch and M S degrees from Cornell University in 1974 and 1977 respectively. During this time he was a member of the Program for Computer Graphics conducting research in interactive input techniques for design. Since 1977, Mr Weingarten has been involved with computer graphics applications at Skidmore, Owings & Merrill, where he is currently Assistant Director of Computer Services. Carmi J Neiger received a B A degree in History from Brandeis University in 1981 and is currently working towards his M Arch degree at the University of Illinois at Chicago. Mr Neiger served as an intern in computer graphic applications at Skidmore, Owings & Merrill in 1983.
ELECTRONICS H I L O - 2 - a system to build on
T i m e domain temperature dependence simulation o f MOS electronic circuits V B Litovski and P M Petkovi6 (Faculty of
Electronic Engineering, University of Ni~, Yugoslavia) A temperature-dependence simulation program for electronic circuit with MOS transistor as the unique active element is described. The special feature of the program is the temperature-dependence simulation of the depletion capacitance of p-n junction. The program performs DC and transient analysis and is especially suited for alI-MOS circuit simulation. Special attention is paid to writing an easy to use portable program with low memory requirements. Van~o B Litovski was born in Rakita, Greece in 1947. He received the Dipl Eng., MSc and Ph D degrees in electronic engineering from the University of Ni~, Yugoslavia. His current interest includes integrated circuit CAD. Predrag M Petkovid was born in (~a~ak, Yugoslavia, in 1954. He received the Dipl Eng degree in electronic engineering from University of Nig, Nig, Yugoslavia in 1979. His current interests include electronic circuits and the CAD of integrated circuits. C A D I C : an efficient integrated circuit design aid G B Swan and J D Eades (Robert Gordon's Institute of Technology, Aberdeen) This paper discussesCADIC, a suite of programs to aid integrated circuit design. The most important features of this design aid are high efficiency in dataprocessing, and online design rule checking. CADIC can therefore substantially reduce the design turnaround time normally associated with manual design aids. Hardware and software details will be given. Emphasis however, is placed on how CADIC's main features were obtained. Experimental results highlighting the performance of CADIC are alsd presented. John Eadesgraduated from Manchester University in 1960. He spent the next ten years in the semiconductor industry before returning to the academic environment to do research work on CAD of integrated circuits. He is now a Senior Lecturer in Electrical Engineering at RGIT, Aberdeen. George Swan studied electronic and electrical engineering at RGIT in Aberdeen, and graduated with a B Sc (Honours) degree in 1980. Since then, he has been researching towards Ph D in the area of computer aids for the design of integrated circuits, with emphasis placed on the problems associated with design rule checking.
R L H=._rrts,S J Davldmann and G Muqirave
(Cirrus Computers L td, Uxbridge, Middlesex,
UK)
HILO-2 is a single coherent system for design verification, fault simulation and test vector generation. This paper is concerned with the HILO-2 Hardware Description Language, its application to both structural and Register-Transfer level modelling is described.
GEOMETRIC DESIGN Recursively generated B-spline surfaces A A Ball and D J T Storry (Loughborough
University of Technology, Loughborough, UK)
computer-aided design
RCA, London) Two case-studiesof computer-aided architectural design systems forming the basis of an SERC/CASE funded research programme are summarized. The results indicate the process by which computer methods were identified and developed by the organizations and how the technology was adapted to changing circumstances. This experience is discussed with reference to the deployment of newer computing technologies currently available. Issued raised include the process of technical diffusion within organizations, the implications for design management and the relationship of technology to deskilling. The relevance to both private and public sector design practice and future technical innovation is discussed. Steve Little graduated from Aston University in architecture and applied psychology, spending eight years in practice in Manchester and Glasgow before joining the Department of Design Research, Royal College of Art, London, where he gained his doctorate and is currently a research associate.
A c o m p u t e r aided architectural design technique f o r the appraisal o f domestic activity spaces K Langskog (King Faisal University, Saudi
A rob/a) L W W Lalng (Scott Sutherland School of
Architecture, Robert Gordon's Institute of Technology, Aberdeen, UK) A computer program has been written which allows numerical appraisal of the efficiency of floor area usage of activity spaces. This was achieved by first developing a theoretical model of the 2D plan layout of activity spaces, taking into account the distribution of elements (predominantly furniture and fittings) and the user spaces required for using these elements, and secondly by allowing for the development of a model to 'assemble' and combine these elements to form activity spaces.The mathematical evaluation method is based on a penalty system containing three main penalty factors; one, degree of overlaps of elements and user spaces; two, economy of perimeter length of the activity space; and three, economy of proportional floor area consumption within the activity space. The technique should be of use to architects and other designers at the early design stages of floor space planning. Dr K Langskog has worked as an architect and urban designer in Norway and the U K. He received his doctorate for research in computer aided floor layout design and appraisal techniques in 1981. Dr Langskog is currently Assistant Professor on CAAD topics at King Falsal University, Saudi Arabia. Dr Laing held senior public posts as an architect in Scotland before rec=iving his doctorate for research in computer simulation techniques for air terminal passenger flow. He is currently lecturing and supervis-
104
ing CAAD research at Robert Gordon's Institute of Technology, Aberdeen. An alternative to the Daylight Evaluation Chart Eric J Fishhaut, Nicholas H Weingarten and Carmi J Neiger (Shidmore, Owings & Merrill,
USA) An alternative to the Daylight Evaluation Chart adopted by the City of New York Alternate Height and Setback Regulations of the Midtown Zoning Regulations is described. This alternative permits the computerization of both the plotting and scoring of this complex chart. The background and supporting algorithms for this procedure are also presented. This method has been implemented at Skidmore, Owings & Merrill and used successfully on a number of projects undertaken in the Midtown Manhattan area. Eric J Fishhaut received a B A degree in Mathematics from the Colorado College in 1980 and studied for two years at the University of Minnesota School of Architecture. In June 1982 Mr Fishhaut joined the Chicago office of Skidmore, Owings & Merrill where he is currently Coordinator for Architectural Applications in computer graphics. Mr Fishhaut served as team leader for the New York Daylight Evaluation Programming project. Nicholas H Weingarten is an Associate Partner in the Chicago office of Skidmore, Owings & Merrill. Mr Weingarten received B Arch and M S degrees from Cornell University in 1974 and 1977 respectively. During this time he was a member of the Program for Computer Graphics conducting research in interactive input techniques for design. Since 1977, Mr Weingarten has been involved with computer graphics applications at Skidmore, Owings & Merrill, where he is currently Assistant Director of Computer Services. Carmi J Neiger received a B A degree in History from Brandeis University in 1981 and is currently working towards his M Arch degree at the University of Illinois at Chicago. Mr Neiger served as an intern in computer graphic applications at Skidmore, Owings & Merrill in 1983.
ELECTRONICS H I L O - 2 - a system to build on
T i m e domain temperature dependence simulation o f MOS electronic circuits V B Litovski and P M Petkovi6 (Faculty of
Electronic Engineering, University of Ni~, Yugoslavia) A temperature-dependence simulation program for electronic circuit with MOS transistor as the unique active element is described. The special feature of the program is the temperature-dependence simulation of the depletion capacitance of p-n junction. The program performs DC and transient analysis and is especially suited for alI-MOS circuit simulation. Special attention is paid to writing an easy to use portable program with low memory requirements. Van~o B Litovski was born in Rakita, Greece in 1947. He received the Dipl Eng., MSc and Ph D degrees in electronic engineering from the University of Ni~, Yugoslavia. His current interest includes integrated circuit CAD. Predrag M Petkovid was born in (~a~ak, Yugoslavia, in 1954. He received the Dipl Eng degree in electronic engineering from University of Nig, Nig, Yugoslavia in 1979. His current interests include electronic circuits and the CAD of integrated circuits. C A D I C : an efficient integrated circuit design aid G B Swan and J D Eades (Robert Gordon's Institute of Technology, Aberdeen) This paper discussesCADIC, a suite of programs to aid integrated circuit design. The most important features of this design aid are high efficiency in dataprocessing, and online design rule checking. CADIC can therefore substantially reduce the design turnaround time normally associated with manual design aids. Hardware and software details will be given. Emphasis however, is placed on how CADIC's main features were obtained. Experimental results highlighting the performance of CADIC are alsd presented. John Eadesgraduated from Manchester University in 1960. He spent the next ten years in the semiconductor industry before returning to the academic environment to do research work on CAD of integrated circuits. He is now a Senior Lecturer in Electrical Engineering at RGIT, Aberdeen. George Swan studied electronic and electrical engineering at RGIT in Aberdeen, and graduated with a B Sc (Honours) degree in 1980. Since then, he has been researching towards Ph D in the area of computer aids for the design of integrated circuits, with emphasis placed on the problems associated with design rule checking.
R L H=._rrts,S J Davldmann and G Muqirave
(Cirrus Computers L td, Uxbridge, Middlesex,
UK)
HILO-2 is a single coherent system for design verification, fault simulation and test vector generation. This paper is concerned with the HILO-2 Hardware Description Language, its application to both structural and Register-Transfer level modelling is described.
GEOMETRIC DESIGN Recursively generated B-spline surfaces A A Ball and D J T Storry (Loughborough
University of Technology, Loughborough, UK)
computer-aided design