Capacitance–voltage characteristics of In0.3Ge2Sb2Te5 thin films

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Journal of Non-Crystalline Solids 354 (2008) 1976–1980 www.elsevier.com/locate/jnoncrysol

Capacitance–voltage characteristics of In0.3Ge2Sb2Te5 thin films S.T. Mahmoud *, H. Ghamlouche, N. Qamhieh, Sadiqa Ahmed Department of Physics, UAE University, P.O. Box 17551 Al-Ain, United Arab Emirates Received 15 July 2007; received in revised form 3 November 2007 Available online 22 January 2008

Abstract The influence of indium doping on the capacitance variation with temperature and applied bias voltage of Ge2Sb2Te5 is investigated. The capacitance–voltage (C–V) measurements of In0.3Ge2Sb2Te5 and Ge2Sb2Te5 thin films were performed for a sweep of voltages from 20 to +20 V at different temperatures. The results show different capacitance behavior of In0.3Ge2Sb2Te5 and Ge2Sb2Te5 films. As the temperature increases the capacitance of the indium-doped sample decreases and becomes negative. The negative capacitance effect might be attributed to a significant increase of the film’s conductivity due to temperature and applied bias voltage. The nonlinearity in the capacitance and conductivity could be related to the nucleation mechanism as the temperature becomes close to the amorphous–crystalline transition temperature. Ó 2007 Elsevier B.V. All rights reserved. PACS: 73.50.h; 73.61.r; 73.90.+f Keywords: Alloys; Amorphous semiconductors; Crystallization; Electrical and electronic properties; Films and coatings; Glass transition; Chalcogenides

1. Introduction The interest in the study of Ge–Sb–Te glasses is due to their use as active materials in optical and electronic devices. The application of these devices is based on the ability of these materials to be reversibly transformed between the amorphous and the crystalline phases [1–4]. The amorphous chalcogenide thin films have attracted much attention as a new advanced and replaceable material due to the electrical, optical and thermal properties as well as electric resistance [5–10]. The phase transition from amorphous to crystalline states, and vice versa, of Ge–Sb–Te film by applying electrical pulses has been observed [11]. The reversible phase transition between the amorphous and crystalline states, which is accompanied by a considerable change in electrical resistivity, is exploited as a means to store bits of information. The most important goals in the research of phase-

*

Corresponding author. Tel.: +971 50 7131998; fax: +971 3 7671291. E-mail address: [email protected] (S.T. Mahmoud).

0022-3093/$ - see front matter Ó 2007 Elsevier B.V. All rights reserved. doi:10.1016/j.jnoncrysol.2007.11.014

change recording are a continuous increase of the recording density, data rate and overwrite cyclability [12]. To meet these requirements, efforts have been made by using the chemical modification approach [13]. It was reported that nitrogen [14] and oxygen [15] addition to Ge–Sb–Te recording material increases overwritability. The influence of indium doping on the crystallization kinetics of Ge2Sb2Te5 has been investigated by Wang et al. [16]. The results indicate that indium might play an important role in modifying the crystallization kinetics of Te-based phase-change materials. The ability of these materials to be reversibly transformed between the amorphous and the crystalline phase results in changes in their optical and electrical properties. However, in the process of heating, these materials pass through the glass transition at a temperature lower than the crystallization temperature. This transition causes a nucleation of crystal islands in the material, which might change the capacitance of the films. In this work, the effects of frequency, temperature and applied electric field (bias voltage) on the capacitance variation of indium-doped Ge2Sb2Te5 phase-change material

S.T. Mahmoud et al. / Journal of Non-Crystalline Solids 354 (2008) 1976–1980

have been investigated. Comparison between the capacitance variations in In0.3Ge2Sb2Te5 and Ge2Sb2Te5 films is discussed.

a o

12

T = 45 C o T = 65 C o T = 85 C o T = 105 C o T = 115 C

3. Results The capacitance variation of Ge2Sb2Te5 (S1) and In0.3Ge2Sb2Te5 (S2) with applied bias voltage ranged from 20 V to +20 V is shown in Figs. 2 and 3 at different temperatures for 100 kHz and 1 MHz. The two Figs. 2 and 3

Ge-Sb-Te Film

Gold electrodes

Substrate

Fig. 1. Schematic diagrams of the electrical contacts. The gold electrodes are evaporated on a glass substrate and then the film is deposited.

8 6 4 2 -20

-10

0

10

20

10

20

Applied bias (V)

b T = 45 ºC T = 65 ºC T = 85 ºC T = 105 ºC T = 115 ºC

5.0

Capacitance (pF)

Bulk alloys of In0.3Ge2Sb2Te5 and Ge2Sb2Te5 are prepared by melt quenching technique. Materials (99.995% pure) are weighed according to their atomic percentage and sealed in quartz ampoules in a vacuum 103 mbar. The sealed ampoule is kept inside a rotating cylindrical furnace at 1050 °C for 24 h to make the melt homogeneous. Thereafter, the quenching is done in ice-water bath. Thin films are prepared by thermal evaporation technique at a base pressure of 105 mbar. The thickness of the film is 0.8 lm and the separation between the gold electrodes is 1 mm. The amorphous nature of the films is confirmed by X-ray diffraction (XRD). The composition of the evaporated samples is measured by energy dispersive X-ray analysis EDX. Pre-deposited gold electrodes on glass substrates are used for the electrical contacts as shown in Fig. 1. This configuration has been used to eliminate the effect of electrodes on the electrical properties of the amorphous film [17]. Capacitance–voltage measurements have been performed on amorphous Ge2Sb2Te5 (S1) and In0.3Ge2Sb2Te5 (S2) thin film samples using Keithley 590 CV meter with two operating frequencies 100 kHz and 1 MHz. LabView program has been used for data acquisition. The measurements were performed for a sweep of voltage from 20 to +20 V at different temperatures using electrical heating board. The samples were heated inside a Faraday-cage and Argon gas environment. The temperature was measured by a K-type thermocouple integrated with the heating board.

Capacitance (pF)

10

2. Experimental

1977

4.0

3.0

2.0

-20

-10

0

Applied bias (V) Fig. 2. Capacitance variation of sample S1 as a function of applied bias voltage (20 V to +20 V) for temperatures: 45, 65, 85, 105 and 115 °C. The frequency is (a) 100 kHz and (b) 1 MHz.

show a bell shape curve where the capacitance attains a maximum value, and it is more pronounced at 100 kHz-frequency and at temperatures close to amorphous–crystalline transition temperature (TC). However, a negative capacitance (NC) is observed for sample S2 at 100 kHz-frequency and 125 °C temperature, as shown in Fig. 3(a). Figs. 4 and 5 show, respectively, the capacitance variation of samples S1 and S2 as function of temperature for different applied bias voltages (0–20 V) at 100 kHz (Figs. 4(a) and 5(a)) and 1 MHz (Figs. 4(b) and 5(b)). In Fig. 4(a) the capacitance increases with temperature for bias voltages less than 15 V and it shows a maximum at temperature 105 °C for voltages greater than 15 V. In Fig. 5(a) the capacitance decreases for all bias voltages and becomes negative at temperatures greater than 115 °C. Figs. 4(b) and 5(b) show that the capacitance increases with temperature for all bias voltages. To compare the capacitance variation with temperature, the variation of the normalized capacitance (C/C45°C) of S1 and S2 for 0 and 20 V bias are shown in Fig. 6(a) and (b), respectively. These figures summarize the three effects: temperature, applied bias voltage and frequency. A decrease

1978

S.T. Mahmoud et al. / Journal of Non-Crystalline Solids 354 (2008) 1976–1980

a

a

12

0.4

0.0 o

T= 65 C T= 85 oC T= 105 oC T= 115 oC T= 125 oC

-0.4

Capacitance (pF)

Capacitance (pF)

10

8

6

Bias = 0 V Bias = 3 V Bias = 6 V Bias = 9 V Bias = 12 V Bias = 15 V Bias = 18 V Bias = 20 V

4

-0.8

-20

-10

0

10

2 40

20

60

120

5.0

b 0.42

o

0.38

0.36

4.5

Capacitance (pF)

T = 65 C o T = 85 C o T = 105 C o T = 115 C o T = 125 C

0.40

Capacitance (pF)

100

Temperature ( C)

b

4.0 3.5

Bias = 0 V Bias = 3 V Bias = 6 V Bias = 9 V Bias = 12 V Bias = 15 V Bias = 18 V Bias = 20 V

3.0 2.5

0.34

0.32

80 o

Applied bias (V)

2.0 40

-20

-10

0

10

60

Applied bias (V) Fig. 3. Capacitance variation of sample S2 as a function of applied bias voltage (20 V to +20 V) for temperatures: 65, 85, 105, 115 and 125 °C. The frequency is (a) 100 kHz and (b) 1 MHz.

4. Discussion The capacitance variation and negative capacitance effect (NC) in homogenous semiconductor (barrier free) has been studied by Penin [18]. In the case of application of an alternating voltage across a certain semiconducting material, the equivalent capacitance measured by a CV meter is given by [19]

100

120

Fig. 4. Capacitance variation of sample S1 as a function of temperature for different applied bias voltages, ranged from 0–20 V. The frequency is (a) 100 kHz and (b) 1 MHz. Solid lines are to guide the eye.

 Ce ¼

toward negative values of the capacitance (NC) of S2 at 100 kHz and 0 bias voltage is observed in Fig. 6(a). Similar behavior has been observed in our previous work [24] using impedance spectroscopy measurements. A more pronounced decrease in the capacitance of S2 at 100 kHz is observed at higher bias (20 V), as shown in Fig. 6(b). The capacitance of S1 starts decreasing at high temperature at 20-V bias, as shown in Fig. 6(b). Fig. 7 shows the conductance variation with the applied bias voltage for S1 and S2 at T = 115 °C and T = 125 °C, respectively. The data is obtained for both frequencies 100 kHz and 1 MHz. The figure shows a nonlinear behavior of the conductance with the applied bias voltage.

80

Temperature ( oC)

20

ArDC d

 sm 

 s ; 1 þ x 2 s2

ð1Þ

where, A is the area of the plate capacitor and d is the dielectric thickness.  sm ¼ is the Maxwellian dielectric relaxation time, 4prDC e is the dielectric constant and s is the dielectric relaxation time. After substituting sm, Eq. (1) can be written as    A 4psrDC Ce ¼ 1 : ð2Þ 4pd ð1 þ x2 s2 Þ At low temperatures (T  TC), the conductivity of Ge–Sb– Te film is low, hence the second term of Eq. (2) can be ignored and the capacitance is given by A : ð3Þ Ce ¼ 4pd As the temperature increases and becomes close to TC, crystallization occurs by a mechanism of nucleation and growth. In such a mechanism, small crystalline nuclei form initially, which subsequently grow [20]. In this mechanism, the area of the nuclei increases and the separation between the islands decreases and hence the equivalent capacitance of Eq. (3) increases.

S.T. Mahmoud et al. / Journal of Non-Crystalline Solids 354 (2008) 1976–1980

a

a

0.8

4

-0.8

40

60

C/C45oC

Capacitance (pF)

2

Bias = 0 V Bias = 3 V Bias = 6 V Bias = 9 V Bias = 12 V Bias = 15 V Bias = 18 V Bias = 20 V

-0.4

-1.2 20

S1 (100kHz) S1 (1MHz) S2 (100kHz) S2 (1MHz)

3

0.4

0.0

1 0 -1

80

100

120

-2 40

140

60

b Bias = 0 V Bias = 3 V Bias = 6 V Bias = 9 V Bias = 12 V Bias = 15 V Bias = 18 V Bias = 20 V

120

140

120

140

2

1

C/C45oC

Capacitance (pF)

100

Temperature ( C)

0.40

0.36

80

o

o

Temperature ( C)

b

1979

0.32

0

S1 (100kHz) S1 (1MHz) S2 (100kHz) S2 (1MHz)

-1

-2 0.28 20

40

60

80

100

120

-3 40

140

o

60

Temperature ( C)

The conductivity of a semiconductor can be increased either by doping or increasing the temperature. Doping with indium can be considered as a source of free electrons that increase the conductivity of the sample. In addition, the conductivity of S1 and S2 manifests certain nonlinearity (at temperature close to TC) with the applied bias voltage. The nonlinear behavior of the sample’s capacitance with the applied bias voltage might be related to the nucleation mechanism. Due to nucleation, two phases will be formed in the sample, amorphous film and crystalline islands. The interface (junction) between the two phases might behave as a potential barrier and the charge carriers are accumulated at the junction. At low bias voltage, the electric filed is not sufficient for the charge carriers to overcome the barrier. Therefore, the conductivity of the film is not affected. As the applied bias voltage increases, the charge carriers gain enough energy from the applied electric filed and overcome the barriers and hence the conductivity increases. Therefore, at high temperature, close to TC, and at high bias voltage the second term of Eq. (2) becomes more dominant over the first term and hence the capacitance decreases as shown in Fig. 4(a). Since the con-

100 o

Fig. 6. Normalized capacitance of samples S1 and S2 as a function of temperature for two applied bias voltages: (a) 0 V and (b) 20 V. The data is shown for both frequencies 100 kHz and 1 MHz. Solid lines are to guide the eye. Error bars are systematic and estimated to be 5%.

-4

1.2x10

o

S1 (f=100kHz, T=115 C) o S1 (f=1MHz, T=115 C) o S2 (f=100kHz, T=125 C) o S2 (f=1MHz, T=125 C)

-4

Conductance (Ω -1)

Fig. 5. Capacitance variation of sample S2 as a function of temperature for different applied bias voltages, ranged from 0–20 V. The frequency is (a) 100 kHz and (b) 1 MHz. Solid lines are to guide the eye.

80

Temperature ( C)

1.0x10

-5

8.0x10

-5

6.0x10

-5

4.0x10

-20

-10

0

10

20

Applied bias (V) Fig. 7. Conductance of S1 and S2 as a function of applied bias voltage at T = 115 °C and T = 125 °C, respectively. The data is shown for both frequencies 100 kHz and 1 MHz.

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S.T. Mahmoud et al. / Journal of Non-Crystalline Solids 354 (2008) 1976–1980

ductivity of indium-doped film (S2) is much greater than the undoped one (S1) and hence the second term of Eq. (2) increases leading to a direct decrease of the capacitance for all applied bias voltages as shown in Fig. 5(a). Eventu4psrDC is ally, the capacitance becomes negative when ð1 þ x2 s2 Þ greater than one. The phenomena of negative capacitance has been observed in other semiconducting materials such as Cd3As2 [21], CdTe [22] and CdSe [23]. At high frequency (1 MHz), the second term of Eq. (2) decreases and the first term is dominant for the whole range of temperature and applied voltage. Therefore, at high frequency the capacitance increases as shown in Figs. 4(b) and 5(b). 5. Conclusion Capacitance–voltage measurements were performed on amorphous samples of In0.3Ge2Sb2Te5 and Ge2Sb2Te5 thin films. The bias voltage, temperature and frequency effects have been investigated. The results show that the capacitance of In0.3Ge2Sb2Te5 sample decreases as the bias voltage increases for the whole range of temperatures. However, same behavior is observed for Ge2Sb2Te5 sample at temperatures close to the amorphous–crystalline transition temperature and at high applied bias voltages (P15 V) only. The dependence of the sample’s capacitance on bias voltage and temperature is attributed to the increase in the electron concentration as the bias voltage and temperature increase. For In0.3Ge2Sb2Te5 sample, the indium can be considered as an additional source of free electrons. This would contribute to further decrease in the capacitance of In0.3Ge2Sb2Te5 sample. The negative capacitance effect might be attributed to a significant increase of the film’s conductivity due to temperature and applied bias voltage. The nonlinearity in the capacitance and conductivity could be related to the nucleation mechanism as the temperature becomes close to the amorphous– crystalline transition temperature.

Acknowledgement This work is funded by the Research Affairs Unit at the United Arab Emirates University, (Grant # 02-02-2-11/ 07). References [1] S.R. Ovshinsky, Phys. Rev. Lett. 21 (1968) 20. [2] N. Yamada, E. Ohno, N. Akahiran, K. Nishiuchi, K. Nagata, M. Takao, Jpn. J. Appl. Phys. 61 (1987) 26. [3] M. Libera, M. Chen, Mater. Res. Soc. Bull. 15 (1990) 40. [4] M. Wuttig, Nat. Mater. 4 (2005) 265. [5] A.V. Kolobov, P. Fons, A. Frenkel, A.L. Ankudinov, J. Tominaga, T. Uruga, Nat. Mater. 3 (2004) 703. [6] T. Jeong, M. Kim, H.J. Seo, J. Appl. Phys. 86 (1999) 774. [7] I. Friedrich, V. Weidenhof, W. Njoroge, P. Franz, M. Wuttig, J. Appl. Phys. 87 (2000) 4130. [8] J. Gonzales-Hernandez, E. Prokhorov, Y. Vorobiev, Vacuum Sci. Technol. A 18 (2000) 1694. [9] J. Tomigava, N. Atoda, Jpn. J. Appl. Phys. 38 (1999) L322. [10] H.Y. Lee, S.H. Park, J.Y. Chun, H.B. Chung, J. Appl. Phys. 83 (1998) 5381. [11] H. Tanaka, T. Nishihara, T. Ohtsuka, K. Morimoto, N. Yamada, K. Morita, Jpn. J. Appl. Phys. 41 (2002) L1443. [12] N. Yamada, Proc. SPIE 3109 (1997) 28. [13] R.T. Young, D. Strand, G. Gonzalez, S.R. Ovshinsky, J. Appl. Phys. 60 (1986) 4319. [14] R. Kojima, T. Kouzaki, T. Matsunaga, N. Yamada, Proc. SPIE, 14 (1998) 3401. [15] G. Zhou, B.A.J. Jacobs, Jpn. J. Appl. Phys. 138 (1999) 1625. [16] K. Wang, C. Steimer, D. Wamwangi, S. Ziegler, M. Wuttig, Appl. Phys. A 80 (2005) 1611. [17] Saleh T. Mahmoud, H. Ghamlouche, N. Qamhieh, Hessa Al-Shamisi, Appl. Surf. Sci. 253 (2007) 7242. [18] A.N. Penin, Semiconductors 30 (1996) 340. [19] M.A. Majeed Khan, M. Zulfequar, M. Husain, Physica B 366 (2005) 1. [20] Erwin R. Meinders, A.V. Mijiritskii, L. Pieterson, M. Wuttig, Optical Data Storage Phase Change Media and Recording, Springer, 2006. [21] R.D. Gould, M. Din, Superficies y Vacio 9 (1999) 230. [22] B.B. Ismail, R.D. Gould, Proc. SPIE 2780 (1996) 46. [23] A.O. Oduor, PhD thesis, Keele University, UK, 1997. [24] H. Ghamlouche, N. Qamhieh, S.T. Mahmoud, J. Ovonic Res. 3 (5) (2007) 103.