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Carbon-plot-microstructuring for all-polymer-transistors
Synthetic Metals 138 (2003) 271–273
Carbon-plot-microstructuring for all-polymer-transistors K. Mu¨ller*, I. Paloumpa, D. Schmeißer Brandenburgische Technische Universita¨t, Lehrstuhl Angewandte Physik-Sensorik, Erich-Weinert-Strasse 1, D-03046 Cottbus, Germany
Abstract This contribution describes the use of a low-cost technology to produce organic microstructures for electronically applications. With a computer driven plotter, substrates like printing foil and colloidal graphite (diluted in water) for the electrodes, we realised channel lengths of 20 10 mm. Compared with transistor devices, fabricated using conventional photolithographic methods and the same semiconducting material, this technique is a hopeful approach to produce microelectronic structures that are low-cost and all-organic. # 2003 Elsevier Science B.V. All rights reserved. Keywords: Ten micrometer carbon-plot; Organic field-effect-transistors; Low-cost-technique
1. Introduction An essential problem of manufacturing integrated circuits based on polymers is the microstructuring of the electronic paths, especially source–drain-electrodes for organic field-effect transistors. Conventional photolithographic processes are capable to form very small structures, but this method is relatively expensive. Printingtechniques like ink-jet-printing have been used to generate polymer–LEDs [1,2]. The resolution of this method is limited to 20–50 mm due to a statistical distribution of the flight direction of the particles. A modified ink-jetmethod which includes a photolithographic step, but allows to produce all-polymer-transistor circuits, has been developed by [3]. Our aim is to construct organic microstructures as cheap as possible, too, [4,5] and here we present the actual state of our work.
2. Experimental The substrates utilised for our proposed organic field effect transistors (Fig. 1) are made from organic materials: Mylar, polystyrene, and even plain printing foil for water soluble ink (Clearfilm-special from Dataplot, Germany). The source and drain carbon-electrodes were plotted with a computer driven Rolland DXY-1150A plotter. We used
colloidal graphite (Agar Scientific Ltd.), diluted 2:1 within deionised water and homogenised in an ultrasonic bath. This solution was filled into plotter-pens. Plotting is now possible in its normal way: After designing at the computer, the structures were typed onto the foil. In contrast to ink-jetprinting, the distance of the capillary and the substrate is small and a film of the solution occurs driven by capillary forces. This direct contact of the plot-capillary defines the boundary of the conducting layer and makes it possible to plot structures with high resolution (S/D-distance 20 10 mm) without any additional preparation of the substrate (Fig. 2). A semiconducting layer was deposited by spin-coating from a solution of regioregular Poly(3hexylthiophene-2,5-diyl) (Aldrich) in chloroform as solvent, stored under Argon-atmosphere. A photoresist (JSRelectronics, JSR300 55cp) was used as the insulating layer, deposited by spin-coating. PEDOT/PSS (Baytron P from Bayer, Krefeld, Germany) was used as gate-material. It was patterned with an Eppendorf-pipet as layer covering the active area between source and drain. Electrical measurements were performed in a sample holder with smooth graphite-contacts The preparation and the measurement of current-voltage characteristics was performed under air. All our structures were constructed in a top gate structure.
3. Results * Corresponding author. Tel.: þ49-355-694067; fax: þ49-355-694068. E-mail address: [email protected] (K. Mu¨ller).
Printing foils allowed the formation of homogeneous layers with good adhesion and mechanical flexibility. The
0379-6779/03/$ – see front matter # 2003 Elsevier Science B.V. All rights reserved. doi:10.1016/S0379-6779(02)01285-7
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K. Mu¨ ller et al. / Synthetic Metals 138 (2003) 271–273
Fig. 1. The OFET-structure: channel length L ¼ 20 10 mm; channel width W ¼ 1; 0 cm; film-thickness of the gate-insulator: 1 mm.
conductivity of the plotted electrodes is in the range of 10 S/ cm. The roughness of the plotted source–drain electrodes is a limiting factor for the geometrical parameters of the OFET. It defines the minimum of the film thickness of the gate dielectric without high leakage current and as consequence, the gate-capacity. This roughness due to the particle character of the colloid can be minimised by a mechanical smoothing process with a kerchief. Due to the ability of graphite to slide on the [0 0 0 1]-plane, well-defined and smooth surfaces with a roughness of about 100 nm were produced. The thickness of the electrodes is in the range of 500 nm after the smoothing process, determinated by AFM. Fig. 3 shows the I–V-curve for various values of the gate voltage of a device with graphite as electrodes, P(3HT) as semiconductor and PEDOT/PSS as gate electrode in accumulation mode. When the gate voltage is zero, high values of drain–source currents occur, which announce a high carrier concentration due to oxidation which restricts the storage and use in ambient air. Furthermore, the devices do not saturate in the range of a drain–source voltage of 50 V. Nevertheless, under the described conditions we demonstrated the principle ability of our plot-technology to
Fig. 3. Drain–source current vs. drain–source voltage for a fabricated structure at various gate voltages (capacity: 3,2 nF/cm2; leakage current: 1 nA at 50 V).
generate organic transistors with low-cost-methods. The transconductance, defined as @I DS mCi W ¼ (1) VDS L @UG in the non-saturated region [6], has been determinated to be 10 nS at 10 V drain–source voltage in the accumulation mode and 7.4 nS in depletion mode. W, L and Ci stands for the channel width, the channel length and the capacitance per unit area (the structure stated in Fig. 3: 3.2 nF/cm2). The leakage current gate-S/D-electrodes across the isolation layer is in the range of 1 nA at 50 V. The values of the transconductance at 10 V (S/D-voltage) are comparable with those of transistors fabricated using photolithographic processes or the use of screen printing in combination with micromolding methods and of the same semiconductor
Fig. 2. SEM-micrograph of a plotted source–drain structure on printing foil (magnification: 1000, 20 kV).
K. Mu¨ ller et al. / Synthetic Metals 138 (2003) 271–273
[7–9]. The field-effect mobilitys (m) of the Poly(3-Hexyltiophene) are in the range of 1 104 1 103 cm2/ Vs. References [1] T. Hebner, C. Wu, D. Marcy, J. Sturm, Appl. Phys. Lett. 72 (1998) 519. [2] J. Bharathan, Y. Yang, Appl. Phys. Lett. 72 (1998) 4108.
273
[3] H. Sirringhaus, T. Kawase, R. Friend, T. Shimoda, M. Inbasekaran, W. Wu, E. Woo, Science 290 (2000) 2123. [4] G. Appel, R. Mikalo, K. Henkel, A. Oprea, A. Yfantis, I. Paloumpa, D. Schmeißer, Solid State Electron. 44 (2000) 855–861. [5] G. Appel, D. Schmeißer, A. Yfantis, W. Go¨ pel, Synth. Met. 83 (1996) 197. [6] H. Beneking, Feldeffekttransistoren, Springer, New York, 1975. [7] Z. Bao, A. Dodabalapur, A. Lovinger, Appl. Phys. Lett. 69 (1996) 4108. [8] J. Rogers, Z. Bao, V. Raju, Appl. Phys. Lett. 72 (1998) 2716. [9] G. Xu, Z. Bao, J. Groves, Langmuir 16 (2000) 1834.
Carbon-plot-microstructuring for all-polymer-transistors K. Mu¨ller*, I. Paloumpa, D. Schmeißer Brandenburgische Technische Universita¨t, Lehrstuhl Angewandte Physik-Sensorik, Erich-Weinert-Strasse 1, D-03046 Cottbus, Germany
Abstract This contribution describes the use of a low-cost technology to produce organic microstructures for electronically applications. With a computer driven plotter, substrates like printing foil and colloidal graphite (diluted in water) for the electrodes, we realised channel lengths of 20 10 mm. Compared with transistor devices, fabricated using conventional photolithographic methods and the same semiconducting material, this technique is a hopeful approach to produce microelectronic structures that are low-cost and all-organic. # 2003 Elsevier Science B.V. All rights reserved. Keywords: Ten micrometer carbon-plot; Organic field-effect-transistors; Low-cost-technique
1. Introduction An essential problem of manufacturing integrated circuits based on polymers is the microstructuring of the electronic paths, especially source–drain-electrodes for organic field-effect transistors. Conventional photolithographic processes are capable to form very small structures, but this method is relatively expensive. Printingtechniques like ink-jet-printing have been used to generate polymer–LEDs [1,2]. The resolution of this method is limited to 20–50 mm due to a statistical distribution of the flight direction of the particles. A modified ink-jetmethod which includes a photolithographic step, but allows to produce all-polymer-transistor circuits, has been developed by [3]. Our aim is to construct organic microstructures as cheap as possible, too, [4,5] and here we present the actual state of our work.
2. Experimental The substrates utilised for our proposed organic field effect transistors (Fig. 1) are made from organic materials: Mylar, polystyrene, and even plain printing foil for water soluble ink (Clearfilm-special from Dataplot, Germany). The source and drain carbon-electrodes were plotted with a computer driven Rolland DXY-1150A plotter. We used
colloidal graphite (Agar Scientific Ltd.), diluted 2:1 within deionised water and homogenised in an ultrasonic bath. This solution was filled into plotter-pens. Plotting is now possible in its normal way: After designing at the computer, the structures were typed onto the foil. In contrast to ink-jetprinting, the distance of the capillary and the substrate is small and a film of the solution occurs driven by capillary forces. This direct contact of the plot-capillary defines the boundary of the conducting layer and makes it possible to plot structures with high resolution (S/D-distance 20 10 mm) without any additional preparation of the substrate (Fig. 2). A semiconducting layer was deposited by spin-coating from a solution of regioregular Poly(3hexylthiophene-2,5-diyl) (Aldrich) in chloroform as solvent, stored under Argon-atmosphere. A photoresist (JSRelectronics, JSR300 55cp) was used as the insulating layer, deposited by spin-coating. PEDOT/PSS (Baytron P from Bayer, Krefeld, Germany) was used as gate-material. It was patterned with an Eppendorf-pipet as layer covering the active area between source and drain. Electrical measurements were performed in a sample holder with smooth graphite-contacts The preparation and the measurement of current-voltage characteristics was performed under air. All our structures were constructed in a top gate structure.
3. Results * Corresponding author. Tel.: þ49-355-694067; fax: þ49-355-694068. E-mail address: [email protected] (K. Mu¨ller).
Printing foils allowed the formation of homogeneous layers with good adhesion and mechanical flexibility. The
0379-6779/03/$ – see front matter # 2003 Elsevier Science B.V. All rights reserved. doi:10.1016/S0379-6779(02)01285-7
272
K. Mu¨ ller et al. / Synthetic Metals 138 (2003) 271–273
Fig. 1. The OFET-structure: channel length L ¼ 20 10 mm; channel width W ¼ 1; 0 cm; film-thickness of the gate-insulator: 1 mm.
conductivity of the plotted electrodes is in the range of 10 S/ cm. The roughness of the plotted source–drain electrodes is a limiting factor for the geometrical parameters of the OFET. It defines the minimum of the film thickness of the gate dielectric without high leakage current and as consequence, the gate-capacity. This roughness due to the particle character of the colloid can be minimised by a mechanical smoothing process with a kerchief. Due to the ability of graphite to slide on the [0 0 0 1]-plane, well-defined and smooth surfaces with a roughness of about 100 nm were produced. The thickness of the electrodes is in the range of 500 nm after the smoothing process, determinated by AFM. Fig. 3 shows the I–V-curve for various values of the gate voltage of a device with graphite as electrodes, P(3HT) as semiconductor and PEDOT/PSS as gate electrode in accumulation mode. When the gate voltage is zero, high values of drain–source currents occur, which announce a high carrier concentration due to oxidation which restricts the storage and use in ambient air. Furthermore, the devices do not saturate in the range of a drain–source voltage of 50 V. Nevertheless, under the described conditions we demonstrated the principle ability of our plot-technology to
Fig. 3. Drain–source current vs. drain–source voltage for a fabricated structure at various gate voltages (capacity: 3,2 nF/cm2; leakage current: 1 nA at 50 V).
generate organic transistors with low-cost-methods. The transconductance, defined as @I DS mCi W ¼ (1) VDS L @UG in the non-saturated region [6], has been determinated to be 10 nS at 10 V drain–source voltage in the accumulation mode and 7.4 nS in depletion mode. W, L and Ci stands for the channel width, the channel length and the capacitance per unit area (the structure stated in Fig. 3: 3.2 nF/cm2). The leakage current gate-S/D-electrodes across the isolation layer is in the range of 1 nA at 50 V. The values of the transconductance at 10 V (S/D-voltage) are comparable with those of transistors fabricated using photolithographic processes or the use of screen printing in combination with micromolding methods and of the same semiconductor
Fig. 2. SEM-micrograph of a plotted source–drain structure on printing foil (magnification: 1000, 20 kV).
K. Mu¨ ller et al. / Synthetic Metals 138 (2003) 271–273
[7–9]. The field-effect mobilitys (m) of the Poly(3-Hexyltiophene) are in the range of 1 104 1 103 cm2/ Vs. References [1] T. Hebner, C. Wu, D. Marcy, J. Sturm, Appl. Phys. Lett. 72 (1998) 519. [2] J. Bharathan, Y. Yang, Appl. Phys. Lett. 72 (1998) 4108.
273
[3] H. Sirringhaus, T. Kawase, R. Friend, T. Shimoda, M. Inbasekaran, W. Wu, E. Woo, Science 290 (2000) 2123. [4] G. Appel, R. Mikalo, K. Henkel, A. Oprea, A. Yfantis, I. Paloumpa, D. Schmeißer, Solid State Electron. 44 (2000) 855–861. [5] G. Appel, D. Schmeißer, A. Yfantis, W. Go¨ pel, Synth. Met. 83 (1996) 197. [6] H. Beneking, Feldeffekttransistoren, Springer, New York, 1975. [7] Z. Bao, A. Dodabalapur, A. Lovinger, Appl. Phys. Lett. 69 (1996) 4108. [8] J. Rogers, Z. Bao, V. Raju, Appl. Phys. Lett. 72 (1998) 2716. [9] G. Xu, Z. Bao, J. Groves, Langmuir 16 (2000) 1834.