W structure for resistive memory applications

W structure for resistive memory applications

TSF-33860; No of Pages 4 Thin Solid Films xxx (2014) xxx–xxx Contents lists available at ScienceDirect Thin Solid Films journal homepage: www.elsevi...

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TSF-33860; No of Pages 4 Thin Solid Films xxx (2014) xxx–xxx

Contents lists available at ScienceDirect

Thin Solid Films journal homepage: www.elsevier.com/locate/tsf

CF4 plasma treatment of tungsten bottom electrode of Cu/SiOx/W structure for resistive memory applications Chih-Yi Liu a,⁎, Zheng-Yao Huang a, Chun-Hung Lai b a b

Department of Electronic Engineering, National Kaohsiung University of Applied Sciences, Kaohsiung 807, Taiwan Department of Electronics Engineering, National United University, Miaoli 300, Taiwan

a r t i c l e

i n f o

Available online xxxx Keywords: Resistive memory Tungsten electrode Interface

a b s t r a c t The effects of the CF4 plasma treatment on resistive memory devices were investigated. First, a 20-nm SiOx film was deposited on a CF4-treated W/TiN/SiO2/Si substrate using a radio-frequency magnetron sputter, and then a Cu top electrode was deposited to form a Cu/SiOx/CF4-treated W structure. The CF4 plasma treatment deposited fluorine atoms on the tungsten surface, reducing the interface thickness between the SiOx layer and tungsten electrode, and effectively stabilized the resistive switching and improved the switching dispersion. The CF4-treated sample showed good memory properties including a reliable non-volatile memory, nondestructive readout, stable switching voltages, and high resistance ratio of 105. © 2014 Elsevier B.V. All rights reserved.

1. Introduction With the increasing popularity of consumer electronic products, non-volatile memory (NVM) has become very important in the semiconductor industry. Flash memory devices are currently the primary NVM devices. However, these devices have several disadvantages including high operating voltage, slow speed, poor endurance, and block erase. Most significantly, they will eventually reach their physical limitation due to continuous device scaling, and this will result in serious reliability issues such as dielectric breakdown and retention degradation. Therefore, several devices have been proposed to replace flash memory [1–3]. Among these devices, resistive random access memory (RRAM) devices with a simple metal/insulator/metal structure are predicted to be the most promising candidate for the nextgeneration NVMs due to their high-switching speed and low operating voltages. RRAM devices can be reversibly switched between a highresistance state (HRS) and a low-resistance state (LRS) via dc voltages or voltage pulses [4,5]. The switching mechanisms, which are influenced by properties such as the material system, interface status, and electrode material [6], can be categorized as the valence change effect [7], the thermochemical effect [8], and the electrochemical effect [9]. Before practical applications, the most important issue of RRAM devices is the switching dispersion, which could lead to the operating failure. Several methods including stacked layer [10], embedded particle [11], and crystalline phase control [12], have been proposed to solve this dispersion issue.

⁎ Corresponding author at: 415 Chien Kung Road, Sanmin District, Kaohsiung 80778, Taiwan. E-mail address: [email protected] (C.-Y. Liu).

To be integrated with standard complementary metal-oxidesemiconductor processes, a Cu/SiOx/W structure was used as an electrochemical RRAM device in this study. Due to the process sequence, an interface was spontaneously formed between SiOx and W. The interface and its defect status strongly influence the resistive switching behavior [13], and an unstable interface results in significant switching dispersion [14,15]. This study used CF4 plasma treatment on the bottom electrode to reduce the interface thickness, and this decreased the operating voltages and improved the switching dispersion. 2. Experimental procedures A 20-nm SiOx film was deposited using a radio-frequency sputter on a W-coated substrate (W/TiN/SiO2/Si) at room temperature. Then, a 200-nm Cu top electrode was deposited using thermal evaporation technique to form a Cu/SiOx/W structure (control sample). The top electrode area defined by a metal mask was 5 × 10−5 cm2. In order to manufacture the CF4-treated sample, a CF4 plasma treatment (power 25 W) was performed for 40 s in order to deposit fluorine atoms on the tungsten surface [16]. Then the 20-nm SiOx and 200-nm Cu films were deposited to form the final Cu/SiOx/CF4-treated W structure. The electrical properties and the memory characteristics were measured using an HP 4155B semiconductor parameter analyzer at room temperature. A bias voltage was applied to the top electrode while the bottom electrode was grounded. X-ray photoelectron spectroscopy (XPS, PHI-5000, ULVAC-PHI) was used to analyze the chemical bonding of the tungsten electrode surface. The sputtering ion beam species was argon and the beam energy was 4 kV. The beam current density was 200 μA/mm2. A JEOL, JEM-2010F transmission electron microscope (TEM, operating at 200 kV) was used to observe the interface thickness between the SiOx film and the W electrode.

http://dx.doi.org/10.1016/j.tsf.2014.10.096 0040-6090/© 2014 Elsevier B.V. All rights reserved.

Please cite this article as: C.-Y. Liu, et al., CF4 plasma treatment of tungsten bottom electrode of Cu/SiOx/W structure for resistive memory applications, Thin Solid Films (2014), http://dx.doi.org/10.1016/j.tsf.2014.10.096

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C.-Y. Liu et al. / Thin Solid Films xxx (2014) xxx–xxx

3. Results and discussion In Fig. 1(a) the XPS F1s spectra of the CF4-treated tungsten are presented indicating that fluorine atoms remained on the tungsten surface. The two separate peaks represent the F–C bonds and the F–W bonds on the surface [17]. Fig. 1(b) illustrates the W4f spectra of the W electrodes with/without the CF4 plasma treatment. We extracted detailed chemical structure information through deconvolution of the XPS W4f peaks, which showed W–W and W–O bonds in the W electrodes. The ratio of W–O/(W–O + W–W) in the control W electrode is 62.2% and that of W–O/(W–O + W–W) in the CF4-treated W electrodes is 20.9%. The W electrode with the CF4 plasma treatment had more elemental content than the W electrode without the CF4 plasma treatment, indicating that the treatment reduced the metal oxide. Therefore, during the subsequent SiOx film deposition, the F-incorporated W electrode had a thinner interface layer. Fig. 2 illustrates the cross-sectional TEM images of the Cu/SiOx/W and Cu/SiOx/CF4-treated W structures. The interface thickness between the SiOx layer and W electrode of the Cu/SiOx/W structure is 5 nm while that of the Cu/SiOx/CF4-treated W structure is 2 nm, which indicated that the Cu/SiOx/W structure had a thicker interface between the SiOx film and the tungsten electrode. Fig. 3 illustrates the behavior of the two samples during 30 successive resistive switching cycles. Fig. 3(a) shows that a forming process abruptly increased the current of the control sample in the positive polarity. The resistance state changed from an initial-resistance state (IRS)

Fig. 1. (a) The XPS F1s spectra of the CF4-treated W electrode. (b) The XPS W4f spectra of the control W electrode and the CF4-treated W electrode.

Fig. 2. Cross-sectional TEM interface images of (a) the control sample; (b) the CF4-treated sample.

to a LRS. Application of a RESET voltage (VRESET) in the negative polarity decreased the device current, while application of a SET voltage (VSET) in the positive polarity increased the device current. That is, the resistance state can be reversibly switched between a HRS and a LRS by dc voltages in different polarities. A current compliance of 100 μA was used to prevent current damage during the forming and SET processes. However, the current–voltage characteristics demonstrated unstable carrier transportation and unstable resistive switching. W has lower oxygen affinity than Si [18], and thus the WOx is unstable at the SiOx/W interface. Consequently, the resistance states and operating voltages

Fig. 3. Resistive switching characteristics of the samples over 30 successive switching cycles: (a) the control and (b) the CF4-treated samples.

Please cite this article as: C.-Y. Liu, et al., CF4 plasma treatment of tungsten bottom electrode of Cu/SiOx/W structure for resistive memory applications, Thin Solid Films (2014), http://dx.doi.org/10.1016/j.tsf.2014.10.096

C.-Y. Liu et al. / Thin Solid Films xxx (2014) xxx–xxx

showed large dispersion. Fig. 3(b) illustrates the resistive switching characteristics of the CF4-treated sample. Evidently, the resistive switching characteristics of the CF4-treated sample were more stable than those of the control sample. The IRS resistance of the control sample was higher than that of the CF4-treated sample, which may be the result of the thicker interface layer. The thicker interface is also responsible for the larger forming voltage of the control sample. Following the forming process, the interface should be ruptured [14,15]. Therefore, the HRS resistance of the control sample is smaller than the IRS resistance. However, the HRS resistance of the CF4-treated sample is almost the same as the IRS resistance and the SET voltage is similar to the forming voltage. In addition, the charge trapping and de-trapping that occur at the SiOx/W interface of the control sample during the switching cycles contribute to the dispersion observed in the HRS. Fig. 4 presents the fitted curves for the conduction mechanisms of the control and the CF4-treated samples. The LRS curves of the control sample and the CF4-treated sample exhibited linearly ohmic behavior with slopes of 0.999 and 0.979 respectively. The fitted curves of the HRS of the two samples indicated that the HRS was dominated by Schottky emission [19]. The Schottky barrier heights of the control sample and CF4-treated sample are 0.74 and 0.82 eV respectively. The control sample had a lower barrier height, which is the result of increased traps at the SiOx/W interface [19]. Fig. 5(a) shows a cumulative probability of the operating voltages of the two samples. Due to the larger interface layer in the control sample, the control sample had a larger forming voltage. In addition, the interface layer was formed spontaneously between the SiOx and W, resulting in large variations in interface status and thickness. These variations are responsible for the variation witnessed in the forming voltage. The median values for VSET and VRESET in the control sample were 0.41 and − 0.21 V respectively while the median values of VSET and VRESET in the CF4-treated sample were 0.35 and − 0.15 V respectively. The switching dispersion of the VSET and VRESET was minimized by the CF4 plasma treatment. Fig. 5(b) illustrates the device resistances of the two samples. The LRS resistance of the control sample was the larger of the two; however, the median value of the HRS resistance in the control sample was smaller than that of the CF4-treated sample. The LRS and HRS resistances of the control sample exhibited large dispersion. The CF4-treated sample had a larger switching margin and is better suited for multi-level memory application. The control sample had many soft errors during the successive cycling while the CF4-treated sample had fewer errors and better endurance (not shown). Also, the retention times of the CF4-treated sample were longer than 105 s at room temperature (not shown), which indicated that the CF4-treated sample is suitable for NVM applications.

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Fig. 5. Cumulative probabilities of the control and CF4-treated samples: (a) operating voltage; (b) device resistances.

4. Conclusion A CF4 plasma treatment was used to deposit fluorine atoms on the tungsten surface. The Cu/SiOx/CF4-treated W device can be switched reversibly between a HRS and a LRS via the application of dc voltages with different polarities. The CF4 plasma treatment of the W electrode reduced the interface thickness, effectively minimizing the operating voltage and the switching dispersion. The CF4-treated sample exhibited a large switching margin, reliable non-volatile memory, non-destructive readout, and stable switching voltages, making it a viable candidate for a next-generation NVM device.

Acknowledgments The authors thank the National Science Council of R.O.C. for financial supports under project no. NSC 102-2221-151-049 and the facility support from National Nano Device Laboratories.

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Fig. 4. Fitting results of the LRS and HRS conduction mechanism for the control and CF4-treated samples.

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Please cite this article as: C.-Y. Liu, et al., CF4 plasma treatment of tungsten bottom electrode of Cu/SiOx/W structure for resistive memory applications, Thin Solid Films (2014), http://dx.doi.org/10.1016/j.tsf.2014.10.096