Thin Solid Films 513 (2006) 159 – 165 www.elsevier.com/locate/tsf
Charge storage in silicon-implanted silicondioxide layers examined by scanning probe microscopy Reinhard Beyer a,⁎, Elke Beyreuther a , Johannes von Borany b , Jörg Weber a a
b
Technische Universität Dresden, Institut für Angewandte Physik, D-01062 Dresden, Germany Forschungszentrum Rossendorf, Institut für Ionenstrahlphysik und Materialforschung, D-01314 Dresden, Germany Received 20 May 2003; received in revised form 24 September 2004; accepted 1 February 2006 Available online 20 March 2006
Abstract Ion beam synthesis is a promising technique to generate embedded nanoclusters in thin insulating layers for prospective memory devices. At present the electronic structure of clusters in oxide layers and the respective charge storage mechanism are not well understood. Moreover, it is still unclear, whether cluster-related or damage-related states in the silica network are predominant. Here, we report on the charge trapping in silicon implanted SiO2 layers using scanning capacitance microscopy and scanning force microscopy. Silicondioxide layers on (100) oriented silicon with a thickness of 25 nm were silicon implanted with different doses and subsequently annealed at high temperatures (1050°C/1150°C). Charge injection into the insulating layer was accomplished by applying a bias between the conductive probing tip and the substrate. Local as well as scanning injection in quadratic areas was performed in the contact mode. Scanning capacitance microscopy images taken at different times after injection show the charge patterns and their retention characteristics. For a quantitative estimate of the trapped oxide charge densities the peak shifts of the local dC / dV curves were evaluated. The strongest trapping effect was found for heavily silicon-implanted (2 × 1016 cm- 2) SiO2 on p-substrate. Complementary information about local charge trapping was obtained from scanning force microscopy images. Sequences of voltages with different polarity were used to study the trapping/ detrapping kinetics and allowed a comparison of the degradation and the programmability of the different oxide layers. © 2006 Elsevier B.V. All rights reserved. PACS: 07.79-v; 73.61Ng Keywords: Scanning capacitance microscopy; Silicon oxide; Charge trapping; Ion beam synthesis
1. Introduction A nanocrystal based memory has been proposed a few years ago by Tiwari and coworkers [1,2]. In this device the conventional floating gate structure is replaced by a number of isolated nanoclusters, which are located in the vicinity of the Si– SiO2 interface. The trapping or emission of carriers through the separating oxide layer takes place by tunneling, and the charge state of the cluster can be sensed by the source-drain current of a metal-oxide-semiconductor field effect transistor. The advantage of such a structure in terms of reliability, of lifetime or of its suitability for new multiple-state based logics as well as issues like cluster-related trap levels and write/erase time constants for the storage charge is broadly discussed in the literature [3–7]. At ⁎ Corresponding author. Tel.: +49 351 463 33637; fax: +49 351 463 37060. E-mail address:
[email protected] (R. Beyer). 0040-6090/$ - see front matter © 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2006.02.002
present, different technological approaches are considered for the formation of certain arrangements of nanoclusters in silicondioxide. One of them is the ion beam synthesis technique, which comprises two main steps: an implantation of certain atomic species into the SiO2 layer, and an annealing — usually performed at high temperatures in an inert ambient [8]. During the high temperature treatment the nucleation of clusters and their growth take place, but also the annealing of the implantation induced damage. A unique benefit of the method is the flexibility with regard to the cluster material and the full compatibility with state-of-the-art silicon technology. At present it is controversial, whether the charge trapping in implanted and annealed oxide layers is above all associated with the nanoclusters or with the different defects centers, which are either of intrinsic nature or caused by the implantation process [9–11]. Most likely, not only the cluster formation but also the distribution of electronic states in the SiO2 depends on the
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implantation and annealing conditions. Spatially resolved examination methods are necessary to determine the charge localization in these layers. In general, scanning probe microscopy with conductive tips comprises several operation modes suitable to study the local electrical properties as well as the morphological properties of dielectric layers. So, for example, conductive scanning force microscopy was used to examine the gate oxide integrity, thickness variations, intrinsic defects, the distribution of weak spots and the evolution of the intrinsic breakdown [12–14]. It combines the advantages of an improved lateral resolution of the electrical characterization compared to standard tests on metaloxide-semiconductor capacitors with a reduced effort of the preparation for the structural examination compared to methods such as transmission electron microscopy. The manipulation, injection and detection of localized charges by means of scanning force microscopy have been demonstrated [15], even the detection of single charges within the insulating matrix [16]. Localized charges in homogeneous dielectrics were studied with electrostatic force microscopy [17,18], as well as the charging effects and the charge relaxation of nanoclusters in SiO2 [19–21]. Scanning capacitance microscopy (SCM) has been up to now mainly applied for the dopant profiling in semiconductor test structures or on device cross sections [22–24]. Compared to this, the extent of SCM studies explicitly dedicated to the properties of dielectric layers is quite small. Barrett and Quate [25] applied the technique for the first time to study the charge trapping in insulating films. They examined metal-nitride-oxide-semiconductor structures, where the trapping takes place in the siliconnitride layer, well separated from the injecting electrode by a tunneling oxide. During the past years several papers on the SCM characterization of local charging effects in thin SiO2 layers appeared [26–29]. Local write/erase charge transitions, stimulated by changes of the tip dc bias, were used to determine parameters such as the time constants or the threshold bias for the trapping and detrapping of carriers in the silicondioxide. The trapped charge amount is estimated from shifts of the local dC / dV vs. V curves. Though the method's potential to visualize the trapping in insulating layers has been convincingly evidenced, a more common usage has been retarded by the insufficient repeatability of the dC / dV-curves and their hysteresis due to volatile ionic or electronic charges, stray capacitances and moisture related effects. Recently, the crucial influence of the traps in dielectric passivation layers onto the discrimination of differently doped regions and their quantitative determination from SCM images were emphasized [30–32]. In the present study we utilize SCM to characterize a set of samples with thin SiO2 layers, which were implanted under different conditions with silicon in order to generate embedded silicon nanoclusters in the dielectric. Different regimes of charge injection were used to elucidate the differences between the samples regarding their trap and emission behaviour. In particular, the application of the local capacitance spectroscopy and the inference on local trap densities is outlined, including a critical discussion of several methodical issues. Hence, an aim of this study is to demonstrate the capability of the SCM technique for a comparative examination of trap properties of dielectric layers.
2. Experimental details 2.1. Sample preparation Sample preparation was based on the ion beam synthesis technique. Starting material was (100) oriented p-type silicon with a doping concentration of about 1015 cm− 3. Oxidation in dry atmosphere resulted in 25nm SiO2 layers. Si was implanted at 6keV with two different doses (7 × 1015 or 2 × 1016 cm− 2). After a low temperature furnace annealing in a mixed atmosphere (Ar + 7% H2, 600°C, 30min) a rapid thermal annealing at 1050°C or 1150°C in N2 was carried out. For the SCM measurements the oxide on the back side was removed and the samples were mounted with silver paste on a conductive sample holder. An overview of the sample preparation is given in Table 1. 2.2. Methods SCM and scanning force microscopy (SFM) measurements were performed with a commercial system Autoprobe M5 from TM Microscopes. SCM is based on a force microscope with a conductive tip, to which a sensitive capacitance detector is attached, operating on the base of a resonant circuit. According to the tip dimensions the capacitances are in fact very small (in the range of a few attofarads). Therefore, a lock-in-amplifier technique is used, which provides the averaged derivative dC / dV, which is called SCM signal. At first, the surface roughness of the samples was characterized by SFM, since a smooth surface is a prerequisite of the scanning capacitance mode operation. The as-implanted samples exhibit a much larger roughness than the unimplanted reference samples, but the high temperature treatment generates a smooth surface again, which is suitable for the SCM study. In general, the capacitance of the tip-dielectric-semiconductor system changes during a lateral scan of the tip due to thickness variations of the dielectric layer, due to changes of the semiconductor doping concentration, due to stoichiometric alterations of the dielectric layer or due to localized charges in the insulator. Since the properties of both substrate and dielectric layer were found to be homogeneous, we utilized the SFM/SCM tip in order to detect lateral charge inhomogeneities in the layers. For this purpose, charge patterns or local charge clusters were intentionally generated by means of the tip. A typical sequence for the study of the charge storage involves the following steps: At first, an SCM and a topography Table 1 Samples Si+ Rapid thermal Sample Si Dielectric Si+ implantation implantation annealing substrate energy dose #R1
p-type
#03
p-type
#08
p-type
SiO2, 25nm SiO2, 25nm SiO2, 25nm
–
–
–
6 keV
7 × 1015 cm− 2 1050°C, 30s, N2
6 keV
2 × 1016 cm− 2 1050°C, 30s, N2
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image of an area A1 were simultaneously taken. Then, the tip was scanned with a dc bias in a smaller area A2, centered within A1. Afterwards both capacitance and topography images in the area A1 were scanned without any bias. Finally, for a quantitative analysis the local dependence of the dC / dV signal on the tip bias was measured within the injection area A2. The buildup of a certain net charge in the insulating layer – for example owing to the trapping of electrons or holes – generates a shift of the respective capacitance voltage curve along the voltage axis. Hence, the corresponding SCM signal (the derivative dC / dV) and its peak position will likewise exhibit a shift. The difference
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of the peaks ΔVp,SCM is a measure of the change of the trapped oxide charge ΔQot and, hence, of the oxide trap density Not. 3. Results and discussions 3.1. Scanning capacitance microscopy Injection experiments as described in the previous section were carried out with a dc injection bias between − 10 and + 10 V, applied between the conducting tip and the sample holder. The series of 20 × 20 μm2 SCM images in Fig. 1 illustrates the
Fig. 1. Sequence of SCM images of sample #08 taken after charge injection with a tip bias from +2 (a) to +10V (e). The injection area was 5 × 5μm2, the area of the images is 20 × 20μm2.
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increase of the image contrast in the injection region of 5 × 5μm2 as the tip bias increases from + 2 to + 10V in steps of 2V. During imaging the dc tip bias was set to zero, and an ac modulation voltage of 0.5V with a frequency of 60 kHz was applied. The SCM images in Fig. 1a–e are shown without a z-axis scale bar. In contrast to SFM images, the z-axis of an SCM image has no direct physical meaning, but it displays a voltage, which depends on the internal amplification and processing of the output signal of the capacitance detector and on the parameters of the lock-in amplifier. Variations of the SCM signal express, however, local variations of dC / dV and, consequently, of the charge state of the sample. Thus, the evolution of the pattern in the Fig. 1a–e visualizes the variation of the charge state in consequence of different dc injection biases. As the internal parameters were kept constant, profiles through the images allow to compare the strength of this charge state variation. This comparison is put into practice by Fig. 2, where the corresponding profiles across the center of the SCM images are shown. One can see that the SCM signal variation fairly exceeds the width of the injection region. This is mainly caused by the propagation of the space charge region in the substrate [25], but might be also influenced by the lateral charge transport during the acquisition of the SCM image. The SCM signal in the injection region is not monotonic in the injection bias, because the signal corresponds to one single data point of the dC / dV vs. V curve. Since the local charge state of the oxide changes with charge injection, the respective local dC / dV curve likewise varies. Thus, when measuring the SCM signal with a fixed dc bias one gets different values in the injection and the reference region. It is noticed, however, that one can observe either an increase, a decrease or even turnarounds of the SCM signal for a series of continuously shifted dC / dV curves, depending on the selection of the dc bias. Moreover, it is even possible that different charge states are reflected by nearly the same value of the SCM signal if one detects with the adjusted dc bias the opposite edges of the dC / dV peak. It is evident, that SCM images merely serve as a tool for the visualization of the local trapping. For quantitative implications scanning capacitance spectroscopy is required.
Fig. 2. Profiles through the images (Fig. 1a–e) illustrating the evolution of the SCM signal with the dc bias.
Fig. 3. SCM signal dC / dV vs. tip bias V after a scanning injection, exemplarily shown for sample #08. The shift of the peak position Vp,SCM clearly depends on the bias during the injection scan (+2… +10V). The solid line without symbols corresponds to a reference point, well separated from the injection area. DCsweep rate was 0.8V/s.
3.2. Local dC / dV spectroscopy After scanning the oxide surface under bias the tip was positioned in the middle of the injection area and the dC / dV vs. V characteristic was measured. Fig. 3 shows for sample #08 the voltage dependence of the SCM signal, the parameter is the bias applied during the injection scan. The curves are associated with the dark areas in Fig. 1. For comparison, the curve without symbols refers to the reference state before or without any charge injection. The curves show a clear shift of the dC / dV peak position ΔVp,SCM towards more negative voltages for injection biases N + 2 V. The utilization of ΔVp,SCM as a measure of the trapped charge requires to regard nonequilibrium effects. So, for example, the dC / dV curves may exhibit a hysteresis depending on the bias sweep direction and the sweep rate. Such a hysteresis appears in particular, when the injected charge is nonvolatile and its relaxation time constant is in the order of the sweep duration. Moreover, since the electric field during the sweep may alter the charge state or even stimulate a re-emission of the previously trapped charge, the location of the dC / dV peak depends also on the starting point of the bias sweep. Thus, attention should be paid to these effects when adjusting the experimental settings. In this study, a sweep rate of nearly 1 V/s was found to induce the smallest dC / dV hysteresis. The time lag between injection and the acquisition of the dC / dV curve was comparable for all measurements (∼ 500s). In Fig. 4 the SCM peak shifts are compared for three distinct samples and injection biases between − 10 and +10 V. A clear dependence on the implantation dose was found. Whereas the reference SiO2 exhibits no shift ΔVp,SCM in the given bias range, the two implanted samples show peak shifts ΔVp,SCM up to ∼4.4V. Evidently, for positive tip biases the build-up of a localized charge is more pronounced. Similar to the analysis of flatband-voltage shifts of metal-oxide-semiconductor capacitors one can imply from the sign of ΔVp,SCM on the type of net charge build-up, i.e. whether it is positive or negative. It turns out, that the build-up of a positive localized oxide charge is
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operation, and the problem of an exact determination of ΔVp, SCM. Nevertheless, the methods allow to compare the trapping effect in different samples and for different excitation conditions. 3.3. Imaging of charging effects in the force mode
Fig. 4. Comparison of the SCM signal shift ΔVp,SCM as a function of the injection bias and polarity, for three different samples: a reference oxide layer (#R1), and two implanted SiO2 layers with different implantation dose (#03, #08). ΔVp,SCM is a measure of the local charge trapping in the dielectric.
induced by applying a positive bias to the SCM tip. Since holes in p-type substrate are repelled from the Si–SiO2 interface and a metallic tip was used, the injection of holes can be ruled out for being responsible for the observed positive charging. A reasonable explanation seems to be the electric field stimulated emission of electrons from the SiO2 layer, and hence, the net loss of negative charge [33]. Such an emission can take place via direct trap-to-tip tunneling from states located close to the surface or via field-assisted thermally stimulated emission from defect sites with an arbitrary location within the insulator. Another possible explanation rests upon the role of hydrogen and the adsorbed water film on the sample surface, since the SCM measurements are performed under ambient conditions. If the water in the meniscus between tip and surface is decomposed by the electric field, the resulting ionic H+ species can drift through the insulator and can be captured subsequently near the interface. The latter step is in general assumed to be the cause of a defect generation in the vicinity of the Si–SiO2 interface [34,35]. Differences between the reference sample and the implanted layers might be due to different hydrogen contents, which were recently found to correlate with implantation parameters [36]. The trapped charge densities are estimated from the SCM peak shifts ΔVp,SCM using the relation Z DVp;SCM ¼ 0
tox
qðxÞd xd dx eox d e0
The localized oxide charge was also detected by SFM due to the coulombic attraction between the charge and the corresponding image charge in the tip. In the image of the surface topography a localized charge appears as a topographic feature even for actually flat surfaces. Hence, the imaged surface topography is called “apparent“. Fig. 5 exemplarily shows for sample #08 an SFM image and the corresponding SCM image (both 8 × 8 μm2) after a charge injection. The injection was performed within 2 × 2 μm2 with +10V applied to the tip. Fig. 6 shows a height profile through the AFM image, which illustrates the increase of the topography signal in the area, where the charge was written into the dielectric during the previous scan. The size of the injection area and the full width at half maximum of the apparently elevated region coincide very well. The “apparent height“ amounts to nearly 0.4 nm. The simultaneous detection of the force and the capacitance signal allows to verify, whether the observed features are charge related or possibly associated with a “pure” modification of the surface topography, e.g. due to an abrasive tip-sample interaction
ð1Þ
where tox is the thickness of the oxide, ρ(x) the charge density distribution, εox the dielectric constant of the film and ε0 the vacuum permittivity. The localized charge located close to the interface affects most efficiently the silicon surface potential and, therefore, the dC / dV (V) curve. A shift of ΔVp,SCM of 1 V corresponds to a oxide trap density Not of about 1012 cm− 2 for our samples. Assuming a tip radius of 20nm the shift of ΔVp,SCM of 1V is caused by only a dozen of elementary charges. A quantitative analysis is difficult due to the unknown tip geometry and size, due to the aging of the tip during
Fig. 5. SCM image 8 × 8μm2 (a) and corresponding AFM image (b) of sample #08 after charge injection by scanning with +10V applied to the tip in a 2 × 2 μm2 area.
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Fig. 6. Height profile through Fig. 5b. The charge related step in the topography (apparent height) is nearly 4 Å.
during the scanning motion or according to an anodic oxidation [14,37]. A thickness increase by anodic oxidation is assumed to be based on the decomposition of H2O at the surface and the subsequent drift of negatively charged OH− groups through the oxide to the Si–SiO2 interface, where a further reaction with the substrate takes place. The transport of the hydroxyl group is caused by the electric field for a negative dc bias at the tip. The height increase within the injection area was observed irrespective on the polarity of the injection bias Vi, consequently the mechanism could be ruled out. The height increase is clearly trapping related, since no effect was traceable after scans with cero bias. Charge trapping was also proven after a spot contact electrification. In any case, trapping related structures in the AFM topography signal could be only reliable observed in samples with a high defect density, which also exhibited clear charge trapping related features and curve shifts in the SCM and the SCS mode. A further proof for the trapping related origin of the AFM features is their volatile character, evidenced by the complete disappearance of the features after a certain time. 3.4. Dynamic properties studied by SCM Essential for the use of the memory structures are the conditions for writing and erasing of the charges, their retention time, and the reliability and endurance of the memory device operation.
Fig. 7. SCM image 25 × 25μm2 after a sequence of injection scans with different polarity and different areas: 1. with +10 V within a range of 8 × 8μm2; 2. with +10V within a range of 2 × 2μm2. The image was taken at zero dc bias.
In the following, we will demonstrate, that SCM offers a tool for the examination of dynamic properties. We have carried out both single as well as multiple write/erase cycles with the SCM. Fig. 7 depicts a 25 × 25μm2 SCM image taken after scanning with different dc tip biases in different areas on sample #08. At first, a scan was performed in an area of 8 × 8μm2 with + 10V applied to the tip, immediately followed by scanning a range of 2 × 2μm2 with the opposite bias of − 10 V. The image contains 3 distinct regions associated with 3 different charge states, these are – from the border to the core – the virgin area, the charged region and the charged and discharged region, the latter appearing as a black rectangle in the center of the image. The blurring and the slightly asymmetric shape of the 3 regions is caused by the time lag during the injection and image scans. The scan rate was 2s per line, and 256 lines per image were taken. Multiple write/erase cycles were carried out only at one spot of the sample. The tip motion was stopped, and the tip bias was oscillating with a frequency of 10 Hz between two voltages defining a lower limit Vll and an upper limit Vul. The values of the boundaries Vll and Vul were chosen either symmetric or asymmetric with respect to zero. After a certain number of write/erase cycles a dC / dV curve was measured and the peak shift ΔVp,SCM was determined. Fig. 8 represents ΔVp,SCM after a number of 104 w/e-cycles for the 3 samples #R1, #03 and #08. The data related to the symmetric stress condition exhibit only a minor variation of the SCM peak position, except of the ± 10V stressing of sample #08. Basically, a shift of ΔVp,SCM might indicate also the generation of new defects due to the electric stress. For an examination of the degradation one should plot, however, ΔVp,SCM as a function of the large number of w/e cycles, which was not done within the framework of this study. The peak shifts after asymmetric electrical stress show a significant dependence on the implantation dose. The charge state, in particular of sample #08, implanted with a dose of 2 × 1016 cm− 2, can be intentionally driven towards a more negative or a more positive state by selecting an appropriate set of the write and erase bias (Vll, Vul). Hence, this routine provides an information about the programming conditions for the charge storage in an oxide layer at an arbitrary local position.
Fig. 8. Comparison of the peak shifts ΔVp,SCM obtained from dC / dV vs. V spectra after a number of 104 read/write cycles (fs = 10Hz) for samples #R1, #03 and #08. The bias conditions (Vll, Vul) were either symmetrical or asymmetrical.
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Finally it should be mentioned, that it is feasible to study decay times or the time dependent lateral distribution of a localized charge with SCM and related techniques. Imaging after carrier injection monitors the stability of the charge pattern. Whereas some of the features remained even after one day, others disappeared much faster. At this stage it is not clear, how much the iterated motion of the tip over a charged area influences the retention time. To avoid charge accumulation during the scan the detection of time dependencies with non-contact scanning probe microscopy techniques such as Kelvin force microscopy [38] seem to be a suitable alternative and a challenge for a further study. 4. Conclusions Scanning capacitance microscopy and scanning capacitance spectroscopy were applied to characterize trapping effects in SiO2 layers, implanted with silicon and heat treated in order to generate silicon nanoclusters. The modification of the charge state in the SiO2 through a bias applied to the conductive probe tip and the detection of the generated charge patterns has been demonstrated. The peak shifts of local dC / dV vs. V dependencies allowed a sample-to-sample comparison of the trap efficiency and an estimate of the oxide trapped charge density Not. In the unimplanted reference oxide no charge trapping was detectable, but in the heavy implanted SiO2 (dose 1016 cm− 2) a large number of trapping sites was verified. The origin of the observed charging effect and the location of the trapped charge within the oxide are still unknown yet. Further studies are necessary to clarify the nature of the charge storage. The suitability of the SCM technique for the study of the oxide trapping dynamics and the implementation of local electrical stress has been demonstrated. The results corroborate the coherence between the charge trapping and the implantation dose. In general, scanning probe techniques are predestinated to combine classical electrical oxide trap analysis with a direct local access and with high lateral resolution. Acknowledgement The authors wish to acknowledge the support of Infineon Technologies Dresden and of the German Ministry for Education and Scientific Research (BMBF). References [1] S. Tiwari, F. Rana, H. Hanafi, A. Hartstein, E.F. Crabbe, K. Chain, Appl. Phys. Lett. 68 (1996) 1377. [2] S. Tiwari, F. Rana, K. Chan, L. Shi, H. Hanafi, Appl. Phys. Lett. 69 (1996) 1232. [3] H.I. Hanafi, S. Tiwari, I. Khan, IEEE Trans. Electron Devices 43 (1996) 1533. [4] S. Tiwari, J.A. Wahl, H. Silva, F. Rana, J.J. Welser, Appl. Phys., A 71 (2000) 403.
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