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Chromium masks
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WORLD ABSTRACTS ON M I C R O E L E C T R O N I C S AND R E L I A B I L I T Y
C h r o m i u m masks. R. E. SZUPILLO,Solid St. Technol., July (1969), p. 49. Chromium film masks are no longer just an often-recommended but unavailable answer to photo mask durability problems. They are coming into relatively common use, demonstrating mask economy and resolution that is unmatched by photographic emulsions. Chromium masks, however, are capable of being far more than a mere substitute for the latter. Proper choice of substrate glass, photofabrication techniques and hardening method can extend both the resolution and durability well beyond that required in the present stateof-the-art.
Simple multi-level logic circuit design. I. ALEKSANDER,Radio Electron. Engr 38, No. 1, July (1969), p. 28. A pencil-and-paper method of designing multi-level logic circuits is presented. The approach is intuitive rather than systematic. It bears the same relation to the design of circuits with gates of limited fan-in (as is the case with most microcircuit families) as does the Karnaugh-map method to two-level circuits and gates with unlimited fan-in. NAND/NOa systems are considered, and a graphical procedure, based on Karnaugh-maps, is followed.
Photo-optical aspects of mask technology. J. H. ALTMAN,Solid St. Technol., July (1969), p. 34. The making of masks for microelectronics is considered as a two-stage photographic process, the first stage of which involves relatively moderate degrees of reduction and image resolution. In the second stage, however, the requirements for image size and resolution place severe demands on all elements of the photo-optical system. This article is a general survey of the process. The characteristics of lenses, cameras and photographic materials for use in both stages are described, and suggestions are made for their selection and use. An extensive bibliography is appended. MOS-FET fabrication problems. MAN JIN KIM, Solid-St. Electron. 12 (1969), p. 557. A detailed theoretical calculation of MOS threshold voltages was carried out in terms of the fixed bulk and total oxide charges, and the difference in work function between the metal and semiconductor. In addition, upper and lower limits on device dimensions, which are related to the characteristics of the fabrication processes used and the saturation level of carriers in the channel, were determined. Devices were then fabricated on (100) silicon substrates, which were selected on the basis of the theoretical calculations. Device types included p- and n-channel enhancement mode, n-depletion mode, and complementary M O S - F E T devices. The experimental terminal characteristics of these devices were in good agreement with the theory. Bias temperature stability tests were carried out on the devices at 250°C and a bias potential of 4- 10 V. The test results were compared with those obtained for other passivation methods. An automatic design s y s t e m o f IC logic package. T. KITAMURA.NEC Res. Dev..Tapan, No. 14. July (1969), p. 29. This paper describes an automatic design system of the logic package which has 30-60 ICs on an etched pattern board. The system has the following unique features: (1) It maintains the logic diagram data on the file which has the file format appropriate to the graphical data. (2) It generates the etched pattern by computing in the first place all the thru hole pairs to be connected and then distributing the connection lines between the pairs. (3) It prepares the pattern file maintenance for manual modification data and the compatibility checking between the logic diagram file and the etched pattern file. The system was applied to the logic package design of the NEAC-2200 Model 700.
XYMASK. B. R. FOWLER,Bell Labs Rec., July (1969), p. 205. Known as "XYMASK", this program simplifies communications with nearly every type of existing mask-making facility. Indeed, it is XYMASK's universality that makes it important, because such facilities have come to assume a multitude of forms, and each one exploits a physical principle entirely different from its predecessors. Initially, automation was accomplished by the addition of electric drive motors for positioning the knife and equipment for reading paper tapes on which were punched the geometric coordinates of the mask outlines. Since then, several other automated plotters have been developed. One paints the mask pattern on a photographic plate by moving a beam of light. Another, now being developed by the Western Electric Company, uses a swept electron beam for the same purpose. And still another, being developed at Bell Laboratories, uses a laser beam. The XYMASK program allows its users to describe an integrated circuit mask in just one language--no matter which type of plotter they wish to use.
WORLD ABSTRACTS ON M I C R O E L E C T R O N I C S AND R E L I A B I L I T Y
C h r o m i u m masks. R. E. SZUPILLO,Solid St. Technol., July (1969), p. 49. Chromium film masks are no longer just an often-recommended but unavailable answer to photo mask durability problems. They are coming into relatively common use, demonstrating mask economy and resolution that is unmatched by photographic emulsions. Chromium masks, however, are capable of being far more than a mere substitute for the latter. Proper choice of substrate glass, photofabrication techniques and hardening method can extend both the resolution and durability well beyond that required in the present stateof-the-art.
Simple multi-level logic circuit design. I. ALEKSANDER,Radio Electron. Engr 38, No. 1, July (1969), p. 28. A pencil-and-paper method of designing multi-level logic circuits is presented. The approach is intuitive rather than systematic. It bears the same relation to the design of circuits with gates of limited fan-in (as is the case with most microcircuit families) as does the Karnaugh-map method to two-level circuits and gates with unlimited fan-in. NAND/NOa systems are considered, and a graphical procedure, based on Karnaugh-maps, is followed.
Photo-optical aspects of mask technology. J. H. ALTMAN,Solid St. Technol., July (1969), p. 34. The making of masks for microelectronics is considered as a two-stage photographic process, the first stage of which involves relatively moderate degrees of reduction and image resolution. In the second stage, however, the requirements for image size and resolution place severe demands on all elements of the photo-optical system. This article is a general survey of the process. The characteristics of lenses, cameras and photographic materials for use in both stages are described, and suggestions are made for their selection and use. An extensive bibliography is appended. MOS-FET fabrication problems. MAN JIN KIM, Solid-St. Electron. 12 (1969), p. 557. A detailed theoretical calculation of MOS threshold voltages was carried out in terms of the fixed bulk and total oxide charges, and the difference in work function between the metal and semiconductor. In addition, upper and lower limits on device dimensions, which are related to the characteristics of the fabrication processes used and the saturation level of carriers in the channel, were determined. Devices were then fabricated on (100) silicon substrates, which were selected on the basis of the theoretical calculations. Device types included p- and n-channel enhancement mode, n-depletion mode, and complementary M O S - F E T devices. The experimental terminal characteristics of these devices were in good agreement with the theory. Bias temperature stability tests were carried out on the devices at 250°C and a bias potential of 4- 10 V. The test results were compared with those obtained for other passivation methods. An automatic design s y s t e m o f IC logic package. T. KITAMURA.NEC Res. Dev..Tapan, No. 14. July (1969), p. 29. This paper describes an automatic design system of the logic package which has 30-60 ICs on an etched pattern board. The system has the following unique features: (1) It maintains the logic diagram data on the file which has the file format appropriate to the graphical data. (2) It generates the etched pattern by computing in the first place all the thru hole pairs to be connected and then distributing the connection lines between the pairs. (3) It prepares the pattern file maintenance for manual modification data and the compatibility checking between the logic diagram file and the etched pattern file. The system was applied to the logic package design of the NEAC-2200 Model 700.
XYMASK. B. R. FOWLER,Bell Labs Rec., July (1969), p. 205. Known as "XYMASK", this program simplifies communications with nearly every type of existing mask-making facility. Indeed, it is XYMASK's universality that makes it important, because such facilities have come to assume a multitude of forms, and each one exploits a physical principle entirely different from its predecessors. Initially, automation was accomplished by the addition of electric drive motors for positioning the knife and equipment for reading paper tapes on which were punched the geometric coordinates of the mask outlines. Since then, several other automated plotters have been developed. One paints the mask pattern on a photographic plate by moving a beam of light. Another, now being developed by the Western Electric Company, uses a swept electron beam for the same purpose. And still another, being developed at Bell Laboratories, uses a laser beam. The XYMASK program allows its users to describe an integrated circuit mask in just one language--no matter which type of plotter they wish to use.