Clean rooms: the common sense approach to effectiveness

Clean rooms: the common sense approach to effectiveness

World Abstracts on Microelectronics and Reliability 1099 coupling a second technique such as SIMS to an Auger can enhance the analysis done with eac...

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World Abstracts on Microelectronics and Reliability

1099

coupling a second technique such as SIMS to an Auger can enhance the analysis done with each instrument. The point is made that using these state-of-the-art techniques (Auger and S1MS) for process and quality control, as well as for a product evaluation tool, can reduce the time and money spent in performing failure analysis.

CICC ranges from floppy-disk controllers to analog custom arrays, laser probing. JERRY LVMAN.Electronics 99 (31 May, 1984). Other topics at Custom Integrated Circuits Conference include a power process mixing bipolar and MOS, and electrostatic discharge protection for MOS lCs.

From a seasoned consumer base, Japanese C-MOS moves to higher levels. CHARLESCOHEN.Electronics 150 (5 April, 1984). With know-how garnered from simpler ICs, Japan's major IC vendors are moving into delivery of sophisticated highperformance chips, Semicon West '84. The challenge: automating the industry, PETER H. SINGER. Semiconductor Int. 270 (May 1984). Process line automation will be highlighted in the technical symposiums as well as the equipment exhibited at this year's show,

Europeans debate tariff on lCs. KEITH JONES. Mini-Micro Systems 99 (May 1984). The British government is backing European computer builders in a campaign to reduce the Common Market's import tariff on semiconductors. The tariff--now 17 percent--is intended to protect Europe's IC manufacturers against U.S. and Japanese competition. But European computer builders contend that the tariff has failed and is threatening future European system manufacturing because of the high cost of imported semiconductors. They warn that if the tariffis not lowered it will force them to transfer their manufacturing to areas outside the Common Market, including the United States.

A review of thick film microwave integrated circuit technology. CLIVENEWPORT. Microelectron. J. 15 (2), 44 (1984). Continuing improvements in hybrid technology have resulted in the extension of upper frequency limits into the microwave spectrum. Now, microwave assemblies based on thin or thick film technology are relatively common, offering a wide choice of system fabrication methods which are truly solid state and compatible with modern active devices,

5. M I C R O E L E C T R O N I C S

Semiconduetor manufacturing in the United Kingdom. BRIAN DANCE.Semiconductor Int. 62 (May 1984). Availability of government start-up incentives and strong support by U.S. IC fabricators accelerate the growth of the U.K. semiconductor industry.

DESIGN

AND CONSTRUCTION

Wafer contour map helps correlate yield, process variables, CLIFFORD BARNEY.Electronics 47 (22 March, 1984). System uses data points to exhibit deviations from norm and also provides a picture of effects of process variations,

process time. Now a technique called Pulsed Photomagnetic Curing (PPC) has the ability to make positive resist dimensionally stable to thermal treatments in excess of 300°C and to resist ion implantation damage. This treatment is reliable and can save process time by eliminating some of the postImproved contamination control in semiconductor manufacbake cycles. Positive resist with and without PPC treatment turlng facilities. STUART A. HOENIG and STEVEN DANIEL. were tested under various conditions of thermal baking, high Solid St. Technol. 119 (March 1984). A number of new dose ion implantation and plasma etching. The treated technologies that might be used to improve contamination wafers produced excellent resist image stability during high control procedures in semiconductor clean rooms has been temperature bakes and ion implantation. investigated. The modification of a laminar flow cabinet is described which allows employees to work with devices Clean rooms: the common sense approach to effectiveness. inside the cabinet but which prevents the intrusion of dust MICHAELK. KILPATRICK. Solid St. Technol. 151 (March from the environment into the work area. Also discussed is a 1984).Basic considerations in the planning and development study demonstrating that conventional clean room "bunny of a new clean room facility are presented. The different suits" can be modified to preclude the escape of dust, skin classes of clean rooms, federal standards, and contrasting flakes, and bacteria from the collars and cuffs while, at the clean room designs are defined. Particulate contaminant same time, increasing garment wearability. Finally, means control techniques via design options, and personnel confor improved air filtration to remove fine particulates siderations, with specialemphasis on filtration processes, are without limiting the filter pressure drop are considered, mentioned.

Photoresist particle control for VLSI microlithography. MARY L. LoNG. SolidSt. Technol. 159(March 1984).Particle control as required by VLSI technology is difficult both conceptually and practically. As linewidths plunge toward the micron and submicron dimension, particles that are a tenth to a fourth the size of minimum dimensions can affect the integrity of the resist and the function of the circuit, Particle control in the photoresist process includes not only the cleanliness of the photoresist in the container, but must also address all the handling procedures during process steps from preclean through etch and resist removal. It is important to understand the reactions of all materials used in the photoresist process sequence to effectively minimize contamination and the resultant loss in yield, Positive photoresist polymerization through pulsed photomagnetic curing. PAUL A. RUGGERIO.Solid St. Technol. 165 (March 1984). Positive photoresist images become dimensionally unstable when subjected to excessive thermal conditions. Until recently the only techniques available to suppress this were either unreliable and/or added excessive

Deposition and patterning of the tungsten and tantalum polycides. STEPHEN E. CLARK, J.-K. TSANG and JAMES W. MAROLF.Solid St. Technol. 235 (April 1984). Deposition and patterning processes for tungsten and tantalum polycides are described. A cosputtering process was developed to deposit tungsten and tantalum silicides onto conventional POCI 3doped polysilicon to form a composite polycide gate/interconnect structure compatible with an existing 2 ttm NMOS technology. The silicide composition was dictated by the requirements of film stress and resistivity. The pulysilicon thickness was adjusted to retain gate oxide integrity. To pattern the polycide structure a single-step plasma etch process was developed in a commercially available system. A mixture of SF 6 and Freon-ll5 gases was used to give high etch rate and anisotropic edge profile consistent with step coverage of subsequentlydeposited films. Contamination control: new dimensions in VLSi mannfacturing. DON L. TOLLIVER. Solid St. Technol. 129 (March 1984). The impact of contamination control must be dealt with as a major factor in manufacturing yield and profit-