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InSb metal-oxide-semiconductor structures
Thin Solid Films 520 (2012) 5382–5385
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Thin Solid Films journal homepage: www.elsevier.com/locate/tsf
Comparative analysis of oxide phase formation and its effects on electrical properties of SiO2/InSb metal-oxide-semiconductor structures Jaeyel Lee a, Sehun Park a, b, Jungsub Kim a, Changjae Yang a, Sujin Kim a, Chulkyun Seok a, Jinsub Park e, Euijoon Yoon a, b, c, d,⁎ a
Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea Department of Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Suwon 443-270, Republic of Korea d Energy Semiconductor Research Center, Advanced Institutes of Convergence Technology, Seoul National University, Suwon 443-270, Republic of Korea e Department of Electronic Engineering, Hanyang University, Seoul 133-791, Republic of Korea b c
a r t i c l e
i n f o
Article history: Received 15 February 2011 Received in revised form 23 March 2012 Accepted 3 April 2012 Available online 12 April 2012 Keywords: InSb SiO2 PECVD Interface XPS
a b s t r a c t We report on the changes in the interfacial phases between SiO2 and InSb caused by various deposition temperatures and heat treatments. X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy were used to evaluate the relative amount of each phase present at the interface. The effect of interfacial phases on the electrical properties of SiO2/InSb metal-oxide-semiconductor (MOS) structures was investigated by capacitance–voltage (C–V) measurements. The amount of both In and Sb oxides increased with the deposition temperature. The amount of interfacial In oxide was larger for all samples, regardless of the deposition and annealing temperatures and times. In particular, the annealed samples contained less than half the amount of Sb oxide compared with the as-deposited samples, indicating a strong interfacial reaction between Sb oxide and the InSb substrate during annealing. The interface trap density sharply increased for deposition temperatures above 240 °C. The C–V measurements and Raman spectroscopy indicated that elemental Sb accumulation due to the interfacial reaction of Sb oxide with InSb substrate was responsible for the increased interfacial trap densities in these SiO2/InSb MOS structures. © 2012 Elsevier B.V. All rights reserved.
1. Introduction The interfacial phases between SiO2 and InSb have attracted great interest over the last decade, with the aim of improving the performance of InSb-based devices [1,2]. Since the report on the SiO2/InSb interface by Langan et al. [3], it has been the subject of intensive study. Various techniques such as plasma enhanced chemical vapor deposition (PECVD), photo-assisted CVD, remote PECVD, and anodization have been used to deposit high-quality dielectrics onto InSb substrates [4–8]. Also, many surface treatments such as cleaning with organic solvents [9], vapor etching [10], and sulfur passivation [11] have improved the interfacial properties of SiO2/InSb. The importance of interfacial reactions and of the resultant phases between SiO2 and InSb is well known [7,12–15]. Interactions at the SiO2/native oxide interface, as well as at the thin native oxide/InSb interface, play a dominant role in defining the composition of the interfacial phases and electrical properties of InSb metal-oxide-semiconductor (MOS) structures [7]. Vasquez et al. reported on the interfacial chemistry ⁎ Corresponding author at: Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea. Tel.: + 82 2 880 7169; fax: + 82 2 874 5898. E-mail address: [email protected] (E. Yoon). 0040-6090/$ – see front matter © 2012 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2012.04.007
of CVD SiO2 films deposited onto a thin native oxide on an InSb substrate [15]. They observed a significant interaction between the native oxide and the InSb and the formation of a few layers of excess elemental Sb at the SiO2/InSb interface. In-depth studies on the interfacial reactions between the native oxide and InSb were also conducted by Bregman et al. They analyzed this interface by Auger electron spectroscopy and obtained quantitative compositional information on the interfacial oxide [16,17]. Many reports by Okamura et al. [10], Takahashi et al. [18], and Avigal et al. [19] confirmed the importance of the interfacial phases in determining the electrical properties of the SiO2/ InSb interface. However, despite the large number of studies on SiO2/InSb interfacial phases, the dependence of the composition of interfacial oxides on the SiO2 deposition temperature is not completely understood [15,19]. Moreover, the interfacial phases between asdeposited PECVD SiO2/InSb structures and annealed ones have not been compared quantitatively. We analyzed the formation of interfacial phases at the SiO2/InSb interface, the oxidation of In and Sb, and the formation of elemental Sb at the interface at various deposition and annealing temperatures by X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy. Capacitance–voltage (C–V) measurements yielded interface trap densities in the samples at various deposition temperatures. Finally, we
J. Lee et al. / Thin Solid Films 520 (2012) 5382–5385
investigated the effects of the interfacial phases on the electrical properties of SiO2/InSb MOS structures and the correlations between changes in interfacial phases and interface trap densities. 2. Experimental details Samples were prepared using undoped InSb substrates with an electron concentration of 2–8.5 × 1014 cm− 3. Native oxides were removed by a dilute HF solution (HF:deionized water = 1:10). Samples were rinsed with deionized water for 2 min and blow-dried with N2. Then, a 100 nm-thick SiO2 layer was deposited by PECVD at 120, 160, 200, 240, or 300 °C. The source gases were SiH4 (160 sccm) and N2O (1500 sccm), and the carrier gas was N2 (240 sccm). The chamber pressure was maintained at 550 mTorr (73.33 Pa) during the deposition.
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The RF power and frequency were 60 W and 187 kHz, respectively. Samples deposited at 120 °C were put into a furnace and annealed at 300 °C for 10 or 30 min in an N2 ambience. We investigated the changes in interfacial phases between SiO2 and InSb by measuring an XPS depth profile and Raman spectra. The systems used were a Sigma Probe (ThermoVG, UK) and a LabRam HR (Jobin-Yvon, FRA) with an Ar-ion laser (514 nm), respectively. We probed the buried interfaces by sputter-etching the samples with 2 μA, 2 kV Ar ions, rastering over a sample area of 2 × 2 mm 2, and by repeating the XPS measurements as the samples were sputter-etched by 3 to 5 nm near the SiO2/InSb interface until the oxide signals disappeared completely. We chose the spectra containing the largest amount of oxide phases as representative of the center of the interface. The binding energy scale of the XPS spectra has been referenced to the In 3d5/2 peak at 444.5 eV. InSb MOS structures were fabricated to calculate interface trap densities at the SiO2/InSb interface by C–V measurements. Gold deposition by an evaporator formed an upper contact, and titanium was used as an adhesion layer for gold top electrode. The samples were then cooled down to 77 K inside a cryostat, and an Agilent 4980A LCR meter measured the C–V characteristics at 1 MHz. Hence, we calculated the interface trap densities by the Terman method [20]. The sweep voltage ranged from −4 V to +4 V and the sweep rate was maintained at 0.1 V/s for all samples. 3. Results and discussion Fig. 1(a) shows the XPS spectra for In 3d at the SiO2/InSb interface in the samples deposited at 120 and 300 °C. The peak position for In 3d5/2 on the InSb substrate was 444.5 eV, and that for the In oxide was 445.5 eV [21]. We observed a significant increase in the peak intensity at 445.5 eV in the sample deposited at 300 °C, indicating the formation of a large amount of indium oxide. Antimony oxide phases were also analyzed by the same method. Fig. 1(b) shows the XPS spectra for Sb at the SiO2/InSb interface in the samples deposited at 120 and 300 °C. The Sb 3d5/2 peak for the InSb substrate appears at 528.3 eV, with the shoulder peak corresponding to Sb oxide at 531.3 eV [21]. As above, the Sb oxide peak intensity increased with the deposition temperature. The shoulder peak was observed at 531.3 eV in the sample deposited at 300 °C, suggesting that a substantial amount of Sb oxides was formed at the interface. We quantitatively analyzed this amount by deconvoluting the XPS spectra. We defined the intensity ratios for each oxide as the ratios of the integrated intensity of each oxide peak to that of their respective elements from the InSb substrate. The integrated XPS peaks for In and Sb from the substrate were measured after the complete removal of oxides by
Fig. 1. XPS spectra of the SiO2/InSb interface with (a) the In 3d peak and (b) the Sb 3d peak for SiO2 deposited onto InSb at 120 and 300 °C. The In oxide (In d5/2 445.5 eV) and Sb oxide (Sb d5/2 531.3 eV) peaks were observed in samples deposited at 300 °C. (c) Intensity ratios for In oxide and Sb oxide deposited at various temperatures.
Fig. 2. XPS spectra around the In 3d peak at the SiO2/InSb interface. All samples were deposited at 120 °C, and measured (a) as-deposited, (b) after annealing at 300 °C for 10 min, and (b) after annealing at 300 °C for 30 min. The In d5/2 peak of the InSb substrate is located at 444.5 eV, and that of In oxide at 531.3 eV.
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sputter etching. The intensity ratios for both In oxide and Sb oxide were measured for the samples deposited at various temperatures. As shown in Fig. 1(c), the amount of both In and Sb oxides at the interface gradually increased with the deposition temperature. The thickening of both oxides requires mass transport of oxygen through the interfacial oxide. The XPS data clearly show that oxidation reactions were thermally activated [22]. The intensity ratio may provide useful information for evaluating the amount of interfacial oxides in each sample, and correlating it with MOS characteristics. To further investigate the interfacial reaction, the sample deposited at 120 °C was annealed at 300 °C. As shown in Fig. 2, when the asdeposited sample was annealed for 10 min, the XPS spectrum shows an enhanced shoulder peak (In 3d5/2) at 445.3 eV, indicative of more oxide phase formation at the interface. Annealing for 30 min increased the peak intensity even further. The estimated intensity ratios for the In and Sb oxides are shown in Fig. 3(a) for each sample. The intensity ratio for In oxide increased to 0.22 and 0.33 for annealing times of 10 and 30 min, respectively. On the other hand, the intensity ratio for Sb oxide remained at a relatively lower level below 0.05 during applied annealing times. This trend in the intensity ratio for Sb oxide, with increasing deposition temperatures, is clearly different in the annealed samples than in the as-deposited samples. In both the as-deposited and the 300 °C-annealed samples, more In oxide than Sb oxide was present at the interfaces. However, the intensity ratio for Sb oxide in the annealed samples remained below 0.05 instead of increasing as the intensity ratio for Sb oxide in the as-deposited samples increased in the higher deposition temperatures. One hypothesis is that Sb oxide was reduced by an interfacial reaction with the InSb substrate during subsequent annealing, resulting in the formation of elemental Sb at the interface [7,15,16]. We determined the relative amount of each oxide in the as-deposited samples at
various temperatures (180, 240, and 300 °C) and in 300 °C-annealed samples by comparing the intensity ratios for each oxide, as shown in Fig. 3(b). We found a greater amount of In oxide in all cases. Also, the intensity ratios for Sb oxide in the as-deposited samples (ranging from 0.09 to 0.22) were more than twice those of the annealed samples, suggesting that the interfacial reaction between Sb oxide and the substrate occurred mostly during the subsequent annealing. Raman spectroscopy measurements on the annealed samples detected elemental Sb originating from the interfacial reaction of Sb oxide with the InSb substrate. Peaks identifying elemental Sb, at 113 cm − 1 (Eg mode) and 153 cm − 1 (A1g mode) [18], are shown in Fig. 4. As the annealing temperature was increased from 200 to
Fig. 3. (a) Intensity ratios of In and Sb oxides to, respectively, In and Sb in the InSb substrate for various annealing times. (b) Intensity ratios for In and Sb oxides for various deposition and annealing times.
Fig. 5. (a) C–V curves and (b) midgap interface trap densities for the SiO2/InSb MOS structures for various deposition temperatures. Interface traps sharply increased beyond 1012 cm− 2 eV− 1 above 240 °C.
Fig. 4. Raman spectra for the SiO2/InSb samples annealed at various temperatures. Peaks for elemental Sb at 113 cm− 1 (Eg mode) and 153 cm− 1 (A1g mode) appear in the annealed samples.
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deposition temperatures and annealing times by XPS and Raman spectroscopy. The effect of interfacial phases on the electrical properties of SiO2/InSb MOS structures was investigated using C–V measurements. We found that the amounts of In and Sb oxides increased with the deposition temperature. There was always more In oxide in all samples, regardless of the deposition and annealing temperatures and times. Also, there was less than half as much Sb oxide in the annealed samples than in the as-deposited samples, implying a considerably strong reduction reaction of Sb oxide at its interface with the InSb substrate during annealing. The interface trap density sharply increased for deposition temperatures above 240 °C. The C–V measurements and Raman spectra indicated that elemental Sb accumulation due to the interfacial reaction of Sb oxide with the InSb substrate was responsible for the increase in interfacial trap densities in the SiO2/InSb MOS structures. Fig. 6. Raman spectra for the SiO2/InSb samples at various deposition temperatures. Sbrelated peaks at 113 cm− 1 (Eg mode) and 153 cm− 1 (A1g mode) appear above 240 °C.
300 °C, the intensity of elemental Sb-related peaks increased considerably. This means that the formation of elemental Sb, due to the interfacial reaction of Sb oxide with the InSb substrate, occurred preferentially at higher annealing temperatures, in good agreement with previous reports [16,23]. We performed C–V measurements to investigate the effects of interfacial phases on the electrical properties of SiO2/InSb MOS structures. The results for the samples deposited at 120 and 240 °C are shown in Fig. 5(a). A highly stretched C–V curve, compared to an ideal C–V curve, was observed from the sample deposited at 240 °C, and a lessstretched curve was observed from the sample deposited at 120 °C. This clearly implies that large amounts of interfacial traps were generated at the SiO2/InSb interface in the 240 °C-deposited sample. The midgap interface trap densities (Dit) were determined by the Terman method [20], and plotted as functions of the deposition temperature in Fig. 5(b). They were in the range of 8–9 × 1011 cm− 2 eV − 1 below 200 °C but sharply increased to 1.22× 1012 cm− 2 eV − 1 at 240 °C and to 1.83 × 10 12 cm− 2 eV− 1 at 300 °C. Although the amounts of In and Sb oxides increased gradually with the deposition temperatures, as shown in Fig. 3(b), Dit increased very sharply as the deposition temperature increased beyond 240 °C. Raman spectra were obtained for the SiO2/InSb MOS structures to explain the dependence of the interface trap density on the deposition temperature. Fig. 6 clearly shows that peaks for elemental Sb begin to appear at a deposition temperature of 240 °C and become very large at 300 °C, strongly suggesting that the sharp increase in Dit is due to the accumulation of interfacial elemental Sb [16]. 4. Conclusions We deposited SiO2 on InSb by PECVD and quantitatively analyzed the formation of interfacial phases in SiO2/InSb structures for various
Acknowledgments This work is supported by the DAPA and ADD, by the WCU (World Class University) program through the National Research Foundation of Korea funded by the Ministry of Education, Science and Technology (R31-2008-000-10075-0).
References [1] [2] [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13] [14] [15] [16] [17] [18] [19] [20] [21] [22] [23]
A. Rogalski, Prog Quantum Electron 27 (2003) 59. I. Bloom, Y. Nemirovsky, IEEE Trans. Electron Devices 40 (1993) 309. J.D. Langan, C.R. Viswanathan, J. Vac. Sci. Technol. 16 (1979) 1474. Y.K. Su, U.H. Liaw, J. Appl. Phys. 76 (1994) 4719. J. Lee, S. Choi, S. Park, J. Appl. Phys. 82 (1997) 3917. K.C. Liu, J.J. Luo, L.K. Dai, Phys. Status Solidi 205 (2008) 2469. Y. Shapira, J. Bregman, J. Calahorra, Appl. Phys. Lett. 47 (1985) 495. U. Mackens, U. Merkt, Thin Solid Films 97 (1982) 53. W. Barth, D. Lile, Thin Solid Films 229 (1993) 54. M. Okamura, M. Minakata, J. Appl. Phys. 57 (1985) 2060. G. Eftekhari, Thin Solid Films 278 (1996) 150. K.G. Germanova, E.P. Valcheva, Thin Solid Films 148 (1987) 243. G.P. Schwartz, Thin Solid Films 1033 (1982) 3. T.P. Smirnova, A.N. Golubenko, N.F. Zacharchuk, V.I. Belyi, G.A. KoKovin, N.A. Valisheva, Thin Solid Films 7611 (1981) 11. R.P. Vasquez, F.J. Grunthaner, J. Vac. Sci. Technol. 19 (1981) 431. J. Bregman, Y. Shapira, L.J. Brillson, Surf. Sci. 178 (1986) 188. J. Bregman, Y. Shapira, J. Vac. Sci. Technol. B 3 (1985) 959. Y. Avigal, J. Bregman, Y. Shapira, J. Appl. Phys. 63 (1987) 430. K. Takahashi, A. Onozuka, Y. Tanaka, Jpn. J. Appl. Phys. 35 (1996) 61. L.M. Terman, Solid-State Electron. 5 (1962) 285. S. Ichikawa, Y. Suzuki, N. Sanada, N. Utsumi, T. Yamaguchi, X.Y. Gong, Y. Fukuda, J. Vac. Sci. Technol., A 17 (1999) 421. C.W. Wilmsen, R.W. Kee, J.F. Wager, J. Stannard, L. Messick, Thin Solid Films 64 (1979) 49. E. Valcheva, J. Vac. Sci. Technol., A 15 (1997) 2489.
Contents lists available at SciVerse ScienceDirect
Thin Solid Films journal homepage: www.elsevier.com/locate/tsf
Comparative analysis of oxide phase formation and its effects on electrical properties of SiO2/InSb metal-oxide-semiconductor structures Jaeyel Lee a, Sehun Park a, b, Jungsub Kim a, Changjae Yang a, Sujin Kim a, Chulkyun Seok a, Jinsub Park e, Euijoon Yoon a, b, c, d,⁎ a
Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea WCU Hybrid Materials Program, Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea Department of Nano Science and Technology, Graduate School of Convergence Science and Technology, Seoul National University, Suwon 443-270, Republic of Korea d Energy Semiconductor Research Center, Advanced Institutes of Convergence Technology, Seoul National University, Suwon 443-270, Republic of Korea e Department of Electronic Engineering, Hanyang University, Seoul 133-791, Republic of Korea b c
a r t i c l e
i n f o
Article history: Received 15 February 2011 Received in revised form 23 March 2012 Accepted 3 April 2012 Available online 12 April 2012 Keywords: InSb SiO2 PECVD Interface XPS
a b s t r a c t We report on the changes in the interfacial phases between SiO2 and InSb caused by various deposition temperatures and heat treatments. X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy were used to evaluate the relative amount of each phase present at the interface. The effect of interfacial phases on the electrical properties of SiO2/InSb metal-oxide-semiconductor (MOS) structures was investigated by capacitance–voltage (C–V) measurements. The amount of both In and Sb oxides increased with the deposition temperature. The amount of interfacial In oxide was larger for all samples, regardless of the deposition and annealing temperatures and times. In particular, the annealed samples contained less than half the amount of Sb oxide compared with the as-deposited samples, indicating a strong interfacial reaction between Sb oxide and the InSb substrate during annealing. The interface trap density sharply increased for deposition temperatures above 240 °C. The C–V measurements and Raman spectroscopy indicated that elemental Sb accumulation due to the interfacial reaction of Sb oxide with InSb substrate was responsible for the increased interfacial trap densities in these SiO2/InSb MOS structures. © 2012 Elsevier B.V. All rights reserved.
1. Introduction The interfacial phases between SiO2 and InSb have attracted great interest over the last decade, with the aim of improving the performance of InSb-based devices [1,2]. Since the report on the SiO2/InSb interface by Langan et al. [3], it has been the subject of intensive study. Various techniques such as plasma enhanced chemical vapor deposition (PECVD), photo-assisted CVD, remote PECVD, and anodization have been used to deposit high-quality dielectrics onto InSb substrates [4–8]. Also, many surface treatments such as cleaning with organic solvents [9], vapor etching [10], and sulfur passivation [11] have improved the interfacial properties of SiO2/InSb. The importance of interfacial reactions and of the resultant phases between SiO2 and InSb is well known [7,12–15]. Interactions at the SiO2/native oxide interface, as well as at the thin native oxide/InSb interface, play a dominant role in defining the composition of the interfacial phases and electrical properties of InSb metal-oxide-semiconductor (MOS) structures [7]. Vasquez et al. reported on the interfacial chemistry ⁎ Corresponding author at: Department of Materials Science and Engineering, Seoul National University, Seoul 151-744, Republic of Korea. Tel.: + 82 2 880 7169; fax: + 82 2 874 5898. E-mail address: [email protected] (E. Yoon). 0040-6090/$ – see front matter © 2012 Elsevier B.V. All rights reserved. doi:10.1016/j.tsf.2012.04.007
of CVD SiO2 films deposited onto a thin native oxide on an InSb substrate [15]. They observed a significant interaction between the native oxide and the InSb and the formation of a few layers of excess elemental Sb at the SiO2/InSb interface. In-depth studies on the interfacial reactions between the native oxide and InSb were also conducted by Bregman et al. They analyzed this interface by Auger electron spectroscopy and obtained quantitative compositional information on the interfacial oxide [16,17]. Many reports by Okamura et al. [10], Takahashi et al. [18], and Avigal et al. [19] confirmed the importance of the interfacial phases in determining the electrical properties of the SiO2/ InSb interface. However, despite the large number of studies on SiO2/InSb interfacial phases, the dependence of the composition of interfacial oxides on the SiO2 deposition temperature is not completely understood [15,19]. Moreover, the interfacial phases between asdeposited PECVD SiO2/InSb structures and annealed ones have not been compared quantitatively. We analyzed the formation of interfacial phases at the SiO2/InSb interface, the oxidation of In and Sb, and the formation of elemental Sb at the interface at various deposition and annealing temperatures by X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy. Capacitance–voltage (C–V) measurements yielded interface trap densities in the samples at various deposition temperatures. Finally, we
J. Lee et al. / Thin Solid Films 520 (2012) 5382–5385
investigated the effects of the interfacial phases on the electrical properties of SiO2/InSb MOS structures and the correlations between changes in interfacial phases and interface trap densities. 2. Experimental details Samples were prepared using undoped InSb substrates with an electron concentration of 2–8.5 × 1014 cm− 3. Native oxides were removed by a dilute HF solution (HF:deionized water = 1:10). Samples were rinsed with deionized water for 2 min and blow-dried with N2. Then, a 100 nm-thick SiO2 layer was deposited by PECVD at 120, 160, 200, 240, or 300 °C. The source gases were SiH4 (160 sccm) and N2O (1500 sccm), and the carrier gas was N2 (240 sccm). The chamber pressure was maintained at 550 mTorr (73.33 Pa) during the deposition.
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The RF power and frequency were 60 W and 187 kHz, respectively. Samples deposited at 120 °C were put into a furnace and annealed at 300 °C for 10 or 30 min in an N2 ambience. We investigated the changes in interfacial phases between SiO2 and InSb by measuring an XPS depth profile and Raman spectra. The systems used were a Sigma Probe (ThermoVG, UK) and a LabRam HR (Jobin-Yvon, FRA) with an Ar-ion laser (514 nm), respectively. We probed the buried interfaces by sputter-etching the samples with 2 μA, 2 kV Ar ions, rastering over a sample area of 2 × 2 mm 2, and by repeating the XPS measurements as the samples were sputter-etched by 3 to 5 nm near the SiO2/InSb interface until the oxide signals disappeared completely. We chose the spectra containing the largest amount of oxide phases as representative of the center of the interface. The binding energy scale of the XPS spectra has been referenced to the In 3d5/2 peak at 444.5 eV. InSb MOS structures were fabricated to calculate interface trap densities at the SiO2/InSb interface by C–V measurements. Gold deposition by an evaporator formed an upper contact, and titanium was used as an adhesion layer for gold top electrode. The samples were then cooled down to 77 K inside a cryostat, and an Agilent 4980A LCR meter measured the C–V characteristics at 1 MHz. Hence, we calculated the interface trap densities by the Terman method [20]. The sweep voltage ranged from −4 V to +4 V and the sweep rate was maintained at 0.1 V/s for all samples. 3. Results and discussion Fig. 1(a) shows the XPS spectra for In 3d at the SiO2/InSb interface in the samples deposited at 120 and 300 °C. The peak position for In 3d5/2 on the InSb substrate was 444.5 eV, and that for the In oxide was 445.5 eV [21]. We observed a significant increase in the peak intensity at 445.5 eV in the sample deposited at 300 °C, indicating the formation of a large amount of indium oxide. Antimony oxide phases were also analyzed by the same method. Fig. 1(b) shows the XPS spectra for Sb at the SiO2/InSb interface in the samples deposited at 120 and 300 °C. The Sb 3d5/2 peak for the InSb substrate appears at 528.3 eV, with the shoulder peak corresponding to Sb oxide at 531.3 eV [21]. As above, the Sb oxide peak intensity increased with the deposition temperature. The shoulder peak was observed at 531.3 eV in the sample deposited at 300 °C, suggesting that a substantial amount of Sb oxides was formed at the interface. We quantitatively analyzed this amount by deconvoluting the XPS spectra. We defined the intensity ratios for each oxide as the ratios of the integrated intensity of each oxide peak to that of their respective elements from the InSb substrate. The integrated XPS peaks for In and Sb from the substrate were measured after the complete removal of oxides by
Fig. 1. XPS spectra of the SiO2/InSb interface with (a) the In 3d peak and (b) the Sb 3d peak for SiO2 deposited onto InSb at 120 and 300 °C. The In oxide (In d5/2 445.5 eV) and Sb oxide (Sb d5/2 531.3 eV) peaks were observed in samples deposited at 300 °C. (c) Intensity ratios for In oxide and Sb oxide deposited at various temperatures.
Fig. 2. XPS spectra around the In 3d peak at the SiO2/InSb interface. All samples were deposited at 120 °C, and measured (a) as-deposited, (b) after annealing at 300 °C for 10 min, and (b) after annealing at 300 °C for 30 min. The In d5/2 peak of the InSb substrate is located at 444.5 eV, and that of In oxide at 531.3 eV.
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sputter etching. The intensity ratios for both In oxide and Sb oxide were measured for the samples deposited at various temperatures. As shown in Fig. 1(c), the amount of both In and Sb oxides at the interface gradually increased with the deposition temperature. The thickening of both oxides requires mass transport of oxygen through the interfacial oxide. The XPS data clearly show that oxidation reactions were thermally activated [22]. The intensity ratio may provide useful information for evaluating the amount of interfacial oxides in each sample, and correlating it with MOS characteristics. To further investigate the interfacial reaction, the sample deposited at 120 °C was annealed at 300 °C. As shown in Fig. 2, when the asdeposited sample was annealed for 10 min, the XPS spectrum shows an enhanced shoulder peak (In 3d5/2) at 445.3 eV, indicative of more oxide phase formation at the interface. Annealing for 30 min increased the peak intensity even further. The estimated intensity ratios for the In and Sb oxides are shown in Fig. 3(a) for each sample. The intensity ratio for In oxide increased to 0.22 and 0.33 for annealing times of 10 and 30 min, respectively. On the other hand, the intensity ratio for Sb oxide remained at a relatively lower level below 0.05 during applied annealing times. This trend in the intensity ratio for Sb oxide, with increasing deposition temperatures, is clearly different in the annealed samples than in the as-deposited samples. In both the as-deposited and the 300 °C-annealed samples, more In oxide than Sb oxide was present at the interfaces. However, the intensity ratio for Sb oxide in the annealed samples remained below 0.05 instead of increasing as the intensity ratio for Sb oxide in the as-deposited samples increased in the higher deposition temperatures. One hypothesis is that Sb oxide was reduced by an interfacial reaction with the InSb substrate during subsequent annealing, resulting in the formation of elemental Sb at the interface [7,15,16]. We determined the relative amount of each oxide in the as-deposited samples at
various temperatures (180, 240, and 300 °C) and in 300 °C-annealed samples by comparing the intensity ratios for each oxide, as shown in Fig. 3(b). We found a greater amount of In oxide in all cases. Also, the intensity ratios for Sb oxide in the as-deposited samples (ranging from 0.09 to 0.22) were more than twice those of the annealed samples, suggesting that the interfacial reaction between Sb oxide and the substrate occurred mostly during the subsequent annealing. Raman spectroscopy measurements on the annealed samples detected elemental Sb originating from the interfacial reaction of Sb oxide with the InSb substrate. Peaks identifying elemental Sb, at 113 cm − 1 (Eg mode) and 153 cm − 1 (A1g mode) [18], are shown in Fig. 4. As the annealing temperature was increased from 200 to
Fig. 3. (a) Intensity ratios of In and Sb oxides to, respectively, In and Sb in the InSb substrate for various annealing times. (b) Intensity ratios for In and Sb oxides for various deposition and annealing times.
Fig. 5. (a) C–V curves and (b) midgap interface trap densities for the SiO2/InSb MOS structures for various deposition temperatures. Interface traps sharply increased beyond 1012 cm− 2 eV− 1 above 240 °C.
Fig. 4. Raman spectra for the SiO2/InSb samples annealed at various temperatures. Peaks for elemental Sb at 113 cm− 1 (Eg mode) and 153 cm− 1 (A1g mode) appear in the annealed samples.
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deposition temperatures and annealing times by XPS and Raman spectroscopy. The effect of interfacial phases on the electrical properties of SiO2/InSb MOS structures was investigated using C–V measurements. We found that the amounts of In and Sb oxides increased with the deposition temperature. There was always more In oxide in all samples, regardless of the deposition and annealing temperatures and times. Also, there was less than half as much Sb oxide in the annealed samples than in the as-deposited samples, implying a considerably strong reduction reaction of Sb oxide at its interface with the InSb substrate during annealing. The interface trap density sharply increased for deposition temperatures above 240 °C. The C–V measurements and Raman spectra indicated that elemental Sb accumulation due to the interfacial reaction of Sb oxide with the InSb substrate was responsible for the increase in interfacial trap densities in the SiO2/InSb MOS structures. Fig. 6. Raman spectra for the SiO2/InSb samples at various deposition temperatures. Sbrelated peaks at 113 cm− 1 (Eg mode) and 153 cm− 1 (A1g mode) appear above 240 °C.
300 °C, the intensity of elemental Sb-related peaks increased considerably. This means that the formation of elemental Sb, due to the interfacial reaction of Sb oxide with the InSb substrate, occurred preferentially at higher annealing temperatures, in good agreement with previous reports [16,23]. We performed C–V measurements to investigate the effects of interfacial phases on the electrical properties of SiO2/InSb MOS structures. The results for the samples deposited at 120 and 240 °C are shown in Fig. 5(a). A highly stretched C–V curve, compared to an ideal C–V curve, was observed from the sample deposited at 240 °C, and a lessstretched curve was observed from the sample deposited at 120 °C. This clearly implies that large amounts of interfacial traps were generated at the SiO2/InSb interface in the 240 °C-deposited sample. The midgap interface trap densities (Dit) were determined by the Terman method [20], and plotted as functions of the deposition temperature in Fig. 5(b). They were in the range of 8–9 × 1011 cm− 2 eV − 1 below 200 °C but sharply increased to 1.22× 1012 cm− 2 eV − 1 at 240 °C and to 1.83 × 10 12 cm− 2 eV− 1 at 300 °C. Although the amounts of In and Sb oxides increased gradually with the deposition temperatures, as shown in Fig. 3(b), Dit increased very sharply as the deposition temperature increased beyond 240 °C. Raman spectra were obtained for the SiO2/InSb MOS structures to explain the dependence of the interface trap density on the deposition temperature. Fig. 6 clearly shows that peaks for elemental Sb begin to appear at a deposition temperature of 240 °C and become very large at 300 °C, strongly suggesting that the sharp increase in Dit is due to the accumulation of interfacial elemental Sb [16]. 4. Conclusions We deposited SiO2 on InSb by PECVD and quantitatively analyzed the formation of interfacial phases in SiO2/InSb structures for various
Acknowledgments This work is supported by the DAPA and ADD, by the WCU (World Class University) program through the National Research Foundation of Korea funded by the Ministry of Education, Science and Technology (R31-2008-000-10075-0).
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