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Comparison of electron–phonon and hole–phonon energy loss rates in silicon
Solid-State Electronics 103 (2015) 40–43
Contents lists available at ScienceDirect
Solid-State Electronics journal homepage: www.elsevier.com/locate/sse
Letter
Comparison of electron–phonon and hole–phonon energy loss rates in silicon J.S. Richardson-Bullock a,⇑, M.J. Prest a, V.A. Shah a, D. Gunnarsson b, M. Prunnila b, A. Dobbie a, M. Myronov a, R.J.H. Morris a, T.E. Whall a, E.H.C. Parker a, D.R. Leadley a a b
Department of Physics, University of Warwick, Coventry CV4 7AL, United Kingdom VTT Technical Research Centre of Finland, P.O. Box 1000, FI-02044 VTT Espoo, Finland
a r t i c l e
i n f o
Article history: Received 5 June 2014 Received in revised form 7 September 2014 Accepted 10 September 2014
a b s t r a c t The hole-phonon energy loss rate in silicon is measured at phonon temperatures ranging from 300 mK to 700 mK. We demonstrate that it is approximately an order of magnitude higher than the corresponding electron–phonon energy loss rate over an identical temperature range. Ó 2014 Elsevier Ltd. All rights reserved.
The review of this paper was arranged by Prof. S. Cristoloveanu Keywords: Hole Electron Phonon Coupling Energy loss rate
1. Introduction In the low temperature (sub 1 K) regime, charge carriers are heated only weakly by the crystal lattice due to the strong temperature dependence of the carrier-phonon coupling. However, phonon heating of charge carriers is still a major factor in the heat balance for electron cooling applications [1] and is also responsible for the phonon noise equivalent power, an important parameter for measurement of electromagnetic radiation in astronomical detectors [2]. Previous studies in this field have illustrated the dependence of the electron–phonon coupling on mechanical strain [3]. In this work we have sought to illustrate the effect of carrier type on the carrier-phonon coupling and investigate both hole and electron devices. Our hole sample consisted of a 30 nm silicon layer with a boron doping concentration of 4 1019 cm3 (verified by Hall measurements, see below) grown by reduced pressure chemical vapour deposition (RP-CVD). Replacing the dopant with phosphorus, an otherwise identical sample was grown to serve as our electron control. Aside from this change in dopant type the two samples underwent the same fabrication process in order to allow for a direct ⇑ Corresponding author. Tel.: +44 02476150356. E-mail address: [email protected] (J.S. Richardson-Bullock). http://dx.doi.org/10.1016/j.sse.2014.09.002 0038-1101/Ó 2014 Elsevier Ltd. All rights reserved.
comparison between the two. We assume that material quality is similar for both n and p samples, given that both samples were grown in-house on high quality substrate, using the same CVD reactor and using appropriate high purity gasses. The fabrication method is outlined below and is given in detail in Ref. [3]. The device geometry is depicted in Fig. 1. The mesa was patterned by photolithography followed by a plasma etch, leaving a raised rectangular pillar 100 nm tall with dimensions 205 nm by 5 nm. The active layer is confined to the top 30 nm, thus the degenerately doped material is effectively isolated and the mesa geometry well defined. The surface was then cleaned in 1% HF before aluminium was deposited via sputtering and patterned to form contacts at both the ends and the middle of the semiconductor bar. The semiconductor (silicon) – superconductor (aluminium) junctions formed by this process are well understood [4] and behave in much the same way as a normal metal – insulator – superconductor junction [5,6]. The parameters of the two samples used in this experiment are presented in Table 1, with the mobility, carrier density and sheet resistance deduced from resistivity and Hall measurements carried out at 10 K, where the carrier gas is degenerate and the Hall scattering factor is unity [7]. The sample thickness was obtained from secondary ion mass spectrometry measurements and used to convert sheet carrier density to a volume carrier density.
41
J.S. Richardson-Bullock et al. / Solid-State Electronics 103 (2015) 40–43 Table 1 Sample parameters from Hall measurements made at 10 K. Sample
Mobility (cm2 V1 s1)
Carrier density (1019 cm3)
Sheet resistance (X h1)
Hole Electron
68 192
4.3 3.1
354 350
(a)
(b)
30 nm
205 nm
5 nm
Fig. 2. Current voltage measurements of the S–Sm–S thermometer on our n-doped sample. 300 mK data is shown in blue and room temperature data in red. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
0.35
(c)
0.3
30 nm
doped Si
100 nm Si (100) substrate
Fig. 1. (a) An SEM micrograph of a carrier-phonon test structure. (b) The device schematic. Aluminium leads for the heating of the bar are shown in red whilst the thermometer leads are coloured blue. Each individual junction has an area of 16 lm2. The central green area is the highlighted mesa bar structure. (c) A schematic depicting the cross-section of the device and layer thickness. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
Voltage sensitivity (mV)
Al 0.25
0.2
0.15
0.1
0.05 10 −1
10 0
10 1
10 2
10 3
Thermometer bias current (nA)
The S–Sm–S junctions positioned in the middle of the mesa have a minimal cooling power and are used to measure the electronic temperature (Te) of the semiconductor bar. At millikelvin temperatures and under conditions kBTe << D and 0 << eV < D, the current through such junctions due to thermally activated tunnelling is given by [8,9]
IðVÞ I0 exp½ðeV DÞ=kB T e
ð1Þ 1/2
where I0 = (D/eRn)(pkBTe/2D) and Rn is the normal state resistance. The junction is biased with a constant current such that the voltage response becomes approximately linearly dependent on electronic temperature, according to
dV kB I ln dT e I0 e
ð2Þ
The bias current is selected to provide the maximum voltage response to a change in temperature whilst having only a minimal heating effect on the bar itself. Figs. 2 and 3 show the current voltage behavior of the thermometer junctions at high and low temperature. It can be seen that the optimum current corresponding to the widest voltage range between the two temperature extremes is between 10 and 100 nA. For this experiment we use the lowest value in this range.
Fig. 3. A plot of thermometer bias current versus the maximum change in thermometer voltage across the entire range of operational temperatures. This enables the identification of the optimum current. The bias used in this experiment is marked by the green dashed line. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
The current bias must be isolated from the varying heating current supplied to the bar. To this end a pair of lock-in amplifiers was used in the configuration shown in Fig. 4. The signal from lock-in 1 was capacitively coupled to the thermometer so as not to disturb its dc bias. To enable this, the ac signal was applied to one contact and its inverse (180° out of phase) to the other. The resulting differential bias, balanced across the thermometer is in phase with this signal and double its amplitude. Lock-in 1 is used to measure the voltage across the thermometer whilst the magnitude of the bias current is monitored by lock-in 2, synchronised to the signal generated by lock-in 1. The small junction thermometers are calibrated against a conventional ruthenium oxide thermometer mounted in the cryostat, with the uncertainty in this calibration (2%) being the dominant source of error in our measurement. Starting at a set bath temperature (TB), a variable current bias is applied to inject a range of heating powers through the semiconductor bar which act to heat the charge carriers above the local phonon temperature. The
42
J.S. Richardson-Bullock et al. / Solid-State Electronics 103 (2015) 40–43
10 kΩ 10 kΩ
1 GΩ
4.7 μF
1 kΩ
4.7 μF
1 kΩ
LM741
DC bias 1 GΩ LM741
Fig. 4. A circuit diagram showing the setup complete with 1 MX setting resistors used to supply current and measure the voltage across the thermometer junctions.
resultant heating powers are calculated for each bias voltage using P = I2 R, where R is the measured resistance of the boron/phosphorus doped silicon. Thus the electronic temperature is measured as a function of applied heating power. This method is repeated over a range of bath temperatures from 300 mK to 700 mK. The current–voltage characteristics of the semiconducting bar are monitored throughout and the IV behavior is found to be both linear and invariant yielding a constant value for resistance over the range of bath temperatures used in this experiment. The heat flow between the carrier gas and the lattice can generally be modelled by the equation [10]
Pe;hph / ðT ae T aB Þ
ð3Þ
where a depends on the characteristics of scattering mechanism with the material under test. The carrier-phonon thermal conductance is thus given by
Ge;hph
@P ¼ / T ea1 @T e;h
(a)
(b)
ð4Þ
Zieve et al. [11] describe situations in which carrier diffusion at the ends of a sample can lower the average carrier temperature, artificially suppressing the temperature exponent extracted from coupling measurements. In such cases, it is necessary to add a second term to Eq. (3) in order to extract the corrected value of a,
Pe;hph ¼ AðT ae T aB Þ þ BðT 2e T 2B Þ
ð5Þ
where the T2 term describes the power flow as a result of diffusive effects. B is given by B = 4K/RSL2n with K being the Lorenz constant, RS being the sheet resistance, L the length of the sample and n the electron density. A calculation of the diffusion heat-loss for our sample at the lowest bath temperature (300 mK), with an electron temperature of Te = 320 mK, yields a value of 5 1017 W, more than six orders of magnitude smaller than the power we observe (1 1010 W). It is therefore unlikely to have a significant effect and, for this reason, we are confident that any measurements of conductance we make are as a result of carrier-phonon coupling only. We therefore calculate G using only Eq. (3).
Fig. 5. (a) Measured hole (red) and electron (blue) temperatures as a function of heating power, for a range of bath temperatures. (b) The hole–phonon (red) and electron–phonon (blue) conductance derived from the power temperature curves shown in Fig. 2. Data markers trace out the lowest power points and include error bars. The solid lines are fits to the low power data and indicate the exponent of the power law. They give a power law of P/T5 and P/T7 for holes and electrons respectively. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
2. Results The main findings of this experiment are presented in Fig. 5(a) and (b). Fig. 5(a) shows how the carrier temperature changes with the injected heating power at a range of different bath temperatures. As applied heating power increases, the hole temperature rises much less rapidly than the electron temperature which indicates that holes are more strongly coupled to the lattice phonons.
From this data one can extract the carrier-phonon thermal conductance according to Eq. (4). This is plotted in Fig. 5(b). At the lower limit of the temperature range the carrier-phonon conductances differ by an order of magnitude. This reduces to a factor of 2 at 0.6 K. Furthermore, it can be seen that the electron–phonon conductance varies as T7, with the exponent being
J.S. Richardson-Bullock et al. / Solid-State Electronics 103 (2015) 40–43
indicated by the gradient of the log(G) log(T) data, whilst the hole conductance varies to a lesser degree, demonstrating a T5 relationship, with an error of 0.06 on each exponent value. We have assumed that the electronic temperature can increase independently from the phonon temperature and that in effect the phonon and bath temperatures are assumed constant and equal in the range of powers applied, in line with [3]. This assumption is expected to become less valid for higher injected powers, indeed more so in the case of our p-type material where the apparent stronger coupling between carriers and phonons will facilitate heat transfer between the two. For this reason we draw our conclusions principally from the lowest power data points, highlighted on the plot, for which our assumption is most valid. We calculate the inverse screening length within our hole gas as 3 109 m1, well within the conditions for strong screening of the carrier phonon interaction [12]. Additionally, the thermal phonon wave vector qT and hole mean free path l are worked out to be 1 107 m1 and 3 109 m respectively. This implies our samples fall well within the impure limit, with carrier scattering dominated by impurities and defects. According to the theory presented in Sergeev et al. [12] we should therefore expect the carrier-phonon coupling to show a T8 dependence in place of the T5 relationship demonstrated by our data. We suggest the disagreement between our results and the theory presented in [12] may originate from its use of the single band model, which neglects interband scattering between the heavy hole and the light hole and spin-orbit split valleys, and which is expected to be unscreened [13]. With these interaction mechanisms providing an additional conduction channel between holes and phonons, one could expect a stronger coupling and a resultant smaller variation in hole temperature with injected power [13]. Unfortunately, a formal theory is still awaited. 3. Conclusion In summary, we have shown that holes in silicon are more strongly coupled to the lattice than the electrons. This result may be useful for phonon thermometry and in the application of Sm– S junctions to cooling of thermally isolated platforms [1]. It is
43
hoped that the present results will stimulate further theoretical work on carrier-phonon coupling, which is also very important for the development of bolometric detectors [2]. Acknowledgements This work has been financially supported by the EPSRC through Grant No. EP/F040784/1, by EC ‘‘Nanofunction’’ Network of Excellence Project #257375 and by the Academy of Finland. References [1] Giazotto F, Heikkilä T, Luukanen A, Savin A, Pekola J. Opportunities for mesoscopics in thermometry and refrigeration: physics and applications. Rev Mod Phys Mar. 2006;78(1):217–74. [2] Golubev D, Kuzmin L. Nonequilibrium theory of a hot-electron bolometer with normal metal-insulator-superconductor tunnel junction. J Appl Phys 2001;89(11):6464. [3] Muhonen JT, Prest MJ, Prunnila M, Gunnarsson D, Shah VA, Dobbie A, et al. Strain dependence of electron–phonon energy loss rate in many-valley semiconductors. Appl Phys Lett 2011;98(18):182103. [4] Savin A, Prunnila M, Kivinen P, Pekola J, Ahopelto J, Manninen AJ. Efficient electronic cooling in heavily doped silicon by quasiparticle tunneling. Appl Phys Lett 2001;79(10):1471. [5] Nahum M, Eiles TM, Martinis JM. Electronic microrefrigerator based on a normal-insulator-superconductor tunnel junction. Appl Phys Lett 1994;65(24):3123. [6] Leivo MM, Pekola JP, Averin DV. Efficient Peltier refrigeration by a pair of normal metal/insulator/superconductor junctions. Appl Phys Lett 1996;68(14):1996. [7] Schroder DK. Semiconductor material and device characterisation. 3rd ed. John Wiley & Sons; 2006. [8] Luukanen A, Leivo MM, Suoknuuti JK, Manninen AJ, Pekola JP. On-chip refrigeration by evaporation of hot electrons at sub-Kelvin temperatures. J Low Temp Phys 2000;120(3):281. [9] Nahum M, Martinis JM. Ultrasensitive-hot-electron microbolometer. Appl Phys Lett 1993;63(22):3075. [10] Prest MJ, Muhonen JT, Prunnila M, Gunnarsson D, Shah VA, Richardson-Bullock JS, et al. Strain enhanced electron cooling in a degenerately doped semiconductor. Appl Phys Lett 2011;99(25):251908. [11] Zieve R, Prober D, Wheeler R. Low-temperature electron–phonon interaction in Si MOSFETs. Phys Rev B Jan. 1998;57(4):2443–6. [12] Sergeev A, Reizer M, Mitin V. Deformation electron–phonon coupling in disordered semiconductors and nanostructures. Phys Rev Lett Apr. 2005;94(13):1–4. [13] Prunnila M. Electron–acoustic-phonon energy-loss rate in multicomponent electron systems with symmetric and asymmetric coupling constants. Phys Rev B 2007;75(16):1–8.
Contents lists available at ScienceDirect
Solid-State Electronics journal homepage: www.elsevier.com/locate/sse
Letter
Comparison of electron–phonon and hole–phonon energy loss rates in silicon J.S. Richardson-Bullock a,⇑, M.J. Prest a, V.A. Shah a, D. Gunnarsson b, M. Prunnila b, A. Dobbie a, M. Myronov a, R.J.H. Morris a, T.E. Whall a, E.H.C. Parker a, D.R. Leadley a a b
Department of Physics, University of Warwick, Coventry CV4 7AL, United Kingdom VTT Technical Research Centre of Finland, P.O. Box 1000, FI-02044 VTT Espoo, Finland
a r t i c l e
i n f o
Article history: Received 5 June 2014 Received in revised form 7 September 2014 Accepted 10 September 2014
a b s t r a c t The hole-phonon energy loss rate in silicon is measured at phonon temperatures ranging from 300 mK to 700 mK. We demonstrate that it is approximately an order of magnitude higher than the corresponding electron–phonon energy loss rate over an identical temperature range. Ó 2014 Elsevier Ltd. All rights reserved.
The review of this paper was arranged by Prof. S. Cristoloveanu Keywords: Hole Electron Phonon Coupling Energy loss rate
1. Introduction In the low temperature (sub 1 K) regime, charge carriers are heated only weakly by the crystal lattice due to the strong temperature dependence of the carrier-phonon coupling. However, phonon heating of charge carriers is still a major factor in the heat balance for electron cooling applications [1] and is also responsible for the phonon noise equivalent power, an important parameter for measurement of electromagnetic radiation in astronomical detectors [2]. Previous studies in this field have illustrated the dependence of the electron–phonon coupling on mechanical strain [3]. In this work we have sought to illustrate the effect of carrier type on the carrier-phonon coupling and investigate both hole and electron devices. Our hole sample consisted of a 30 nm silicon layer with a boron doping concentration of 4 1019 cm3 (verified by Hall measurements, see below) grown by reduced pressure chemical vapour deposition (RP-CVD). Replacing the dopant with phosphorus, an otherwise identical sample was grown to serve as our electron control. Aside from this change in dopant type the two samples underwent the same fabrication process in order to allow for a direct ⇑ Corresponding author. Tel.: +44 02476150356. E-mail address: [email protected] (J.S. Richardson-Bullock). http://dx.doi.org/10.1016/j.sse.2014.09.002 0038-1101/Ó 2014 Elsevier Ltd. All rights reserved.
comparison between the two. We assume that material quality is similar for both n and p samples, given that both samples were grown in-house on high quality substrate, using the same CVD reactor and using appropriate high purity gasses. The fabrication method is outlined below and is given in detail in Ref. [3]. The device geometry is depicted in Fig. 1. The mesa was patterned by photolithography followed by a plasma etch, leaving a raised rectangular pillar 100 nm tall with dimensions 205 nm by 5 nm. The active layer is confined to the top 30 nm, thus the degenerately doped material is effectively isolated and the mesa geometry well defined. The surface was then cleaned in 1% HF before aluminium was deposited via sputtering and patterned to form contacts at both the ends and the middle of the semiconductor bar. The semiconductor (silicon) – superconductor (aluminium) junctions formed by this process are well understood [4] and behave in much the same way as a normal metal – insulator – superconductor junction [5,6]. The parameters of the two samples used in this experiment are presented in Table 1, with the mobility, carrier density and sheet resistance deduced from resistivity and Hall measurements carried out at 10 K, where the carrier gas is degenerate and the Hall scattering factor is unity [7]. The sample thickness was obtained from secondary ion mass spectrometry measurements and used to convert sheet carrier density to a volume carrier density.
41
J.S. Richardson-Bullock et al. / Solid-State Electronics 103 (2015) 40–43 Table 1 Sample parameters from Hall measurements made at 10 K. Sample
Mobility (cm2 V1 s1)
Carrier density (1019 cm3)
Sheet resistance (X h1)
Hole Electron
68 192
4.3 3.1
354 350
(a)
(b)
30 nm
205 nm
5 nm
Fig. 2. Current voltage measurements of the S–Sm–S thermometer on our n-doped sample. 300 mK data is shown in blue and room temperature data in red. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
0.35
(c)
0.3
30 nm
doped Si
100 nm Si (100) substrate
Fig. 1. (a) An SEM micrograph of a carrier-phonon test structure. (b) The device schematic. Aluminium leads for the heating of the bar are shown in red whilst the thermometer leads are coloured blue. Each individual junction has an area of 16 lm2. The central green area is the highlighted mesa bar structure. (c) A schematic depicting the cross-section of the device and layer thickness. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
Voltage sensitivity (mV)
Al 0.25
0.2
0.15
0.1
0.05 10 −1
10 0
10 1
10 2
10 3
Thermometer bias current (nA)
The S–Sm–S junctions positioned in the middle of the mesa have a minimal cooling power and are used to measure the electronic temperature (Te) of the semiconductor bar. At millikelvin temperatures and under conditions kBTe << D and 0 << eV < D, the current through such junctions due to thermally activated tunnelling is given by [8,9]
IðVÞ I0 exp½ðeV DÞ=kB T e
ð1Þ 1/2
where I0 = (D/eRn)(pkBTe/2D) and Rn is the normal state resistance. The junction is biased with a constant current such that the voltage response becomes approximately linearly dependent on electronic temperature, according to
dV kB I ln dT e I0 e
ð2Þ
The bias current is selected to provide the maximum voltage response to a change in temperature whilst having only a minimal heating effect on the bar itself. Figs. 2 and 3 show the current voltage behavior of the thermometer junctions at high and low temperature. It can be seen that the optimum current corresponding to the widest voltage range between the two temperature extremes is between 10 and 100 nA. For this experiment we use the lowest value in this range.
Fig. 3. A plot of thermometer bias current versus the maximum change in thermometer voltage across the entire range of operational temperatures. This enables the identification of the optimum current. The bias used in this experiment is marked by the green dashed line. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
The current bias must be isolated from the varying heating current supplied to the bar. To this end a pair of lock-in amplifiers was used in the configuration shown in Fig. 4. The signal from lock-in 1 was capacitively coupled to the thermometer so as not to disturb its dc bias. To enable this, the ac signal was applied to one contact and its inverse (180° out of phase) to the other. The resulting differential bias, balanced across the thermometer is in phase with this signal and double its amplitude. Lock-in 1 is used to measure the voltage across the thermometer whilst the magnitude of the bias current is monitored by lock-in 2, synchronised to the signal generated by lock-in 1. The small junction thermometers are calibrated against a conventional ruthenium oxide thermometer mounted in the cryostat, with the uncertainty in this calibration (2%) being the dominant source of error in our measurement. Starting at a set bath temperature (TB), a variable current bias is applied to inject a range of heating powers through the semiconductor bar which act to heat the charge carriers above the local phonon temperature. The
42
J.S. Richardson-Bullock et al. / Solid-State Electronics 103 (2015) 40–43
10 kΩ 10 kΩ
1 GΩ
4.7 μF
1 kΩ
4.7 μF
1 kΩ
LM741
DC bias 1 GΩ LM741
Fig. 4. A circuit diagram showing the setup complete with 1 MX setting resistors used to supply current and measure the voltage across the thermometer junctions.
resultant heating powers are calculated for each bias voltage using P = I2 R, where R is the measured resistance of the boron/phosphorus doped silicon. Thus the electronic temperature is measured as a function of applied heating power. This method is repeated over a range of bath temperatures from 300 mK to 700 mK. The current–voltage characteristics of the semiconducting bar are monitored throughout and the IV behavior is found to be both linear and invariant yielding a constant value for resistance over the range of bath temperatures used in this experiment. The heat flow between the carrier gas and the lattice can generally be modelled by the equation [10]
Pe;hph / ðT ae T aB Þ
ð3Þ
where a depends on the characteristics of scattering mechanism with the material under test. The carrier-phonon thermal conductance is thus given by
Ge;hph
@P ¼ / T ea1 @T e;h
(a)
(b)
ð4Þ
Zieve et al. [11] describe situations in which carrier diffusion at the ends of a sample can lower the average carrier temperature, artificially suppressing the temperature exponent extracted from coupling measurements. In such cases, it is necessary to add a second term to Eq. (3) in order to extract the corrected value of a,
Pe;hph ¼ AðT ae T aB Þ þ BðT 2e T 2B Þ
ð5Þ
where the T2 term describes the power flow as a result of diffusive effects. B is given by B = 4K/RSL2n with K being the Lorenz constant, RS being the sheet resistance, L the length of the sample and n the electron density. A calculation of the diffusion heat-loss for our sample at the lowest bath temperature (300 mK), with an electron temperature of Te = 320 mK, yields a value of 5 1017 W, more than six orders of magnitude smaller than the power we observe (1 1010 W). It is therefore unlikely to have a significant effect and, for this reason, we are confident that any measurements of conductance we make are as a result of carrier-phonon coupling only. We therefore calculate G using only Eq. (3).
Fig. 5. (a) Measured hole (red) and electron (blue) temperatures as a function of heating power, for a range of bath temperatures. (b) The hole–phonon (red) and electron–phonon (blue) conductance derived from the power temperature curves shown in Fig. 2. Data markers trace out the lowest power points and include error bars. The solid lines are fits to the low power data and indicate the exponent of the power law. They give a power law of P/T5 and P/T7 for holes and electrons respectively. (For interpretation of the references to colour in this figure legend, the reader is referred to the web version of this article.)
2. Results The main findings of this experiment are presented in Fig. 5(a) and (b). Fig. 5(a) shows how the carrier temperature changes with the injected heating power at a range of different bath temperatures. As applied heating power increases, the hole temperature rises much less rapidly than the electron temperature which indicates that holes are more strongly coupled to the lattice phonons.
From this data one can extract the carrier-phonon thermal conductance according to Eq. (4). This is plotted in Fig. 5(b). At the lower limit of the temperature range the carrier-phonon conductances differ by an order of magnitude. This reduces to a factor of 2 at 0.6 K. Furthermore, it can be seen that the electron–phonon conductance varies as T7, with the exponent being
J.S. Richardson-Bullock et al. / Solid-State Electronics 103 (2015) 40–43
indicated by the gradient of the log(G) log(T) data, whilst the hole conductance varies to a lesser degree, demonstrating a T5 relationship, with an error of 0.06 on each exponent value. We have assumed that the electronic temperature can increase independently from the phonon temperature and that in effect the phonon and bath temperatures are assumed constant and equal in the range of powers applied, in line with [3]. This assumption is expected to become less valid for higher injected powers, indeed more so in the case of our p-type material where the apparent stronger coupling between carriers and phonons will facilitate heat transfer between the two. For this reason we draw our conclusions principally from the lowest power data points, highlighted on the plot, for which our assumption is most valid. We calculate the inverse screening length within our hole gas as 3 109 m1, well within the conditions for strong screening of the carrier phonon interaction [12]. Additionally, the thermal phonon wave vector qT and hole mean free path l are worked out to be 1 107 m1 and 3 109 m respectively. This implies our samples fall well within the impure limit, with carrier scattering dominated by impurities and defects. According to the theory presented in Sergeev et al. [12] we should therefore expect the carrier-phonon coupling to show a T8 dependence in place of the T5 relationship demonstrated by our data. We suggest the disagreement between our results and the theory presented in [12] may originate from its use of the single band model, which neglects interband scattering between the heavy hole and the light hole and spin-orbit split valleys, and which is expected to be unscreened [13]. With these interaction mechanisms providing an additional conduction channel between holes and phonons, one could expect a stronger coupling and a resultant smaller variation in hole temperature with injected power [13]. Unfortunately, a formal theory is still awaited. 3. Conclusion In summary, we have shown that holes in silicon are more strongly coupled to the lattice than the electrons. This result may be useful for phonon thermometry and in the application of Sm– S junctions to cooling of thermally isolated platforms [1]. It is
43
hoped that the present results will stimulate further theoretical work on carrier-phonon coupling, which is also very important for the development of bolometric detectors [2]. Acknowledgements This work has been financially supported by the EPSRC through Grant No. EP/F040784/1, by EC ‘‘Nanofunction’’ Network of Excellence Project #257375 and by the Academy of Finland. References [1] Giazotto F, Heikkilä T, Luukanen A, Savin A, Pekola J. Opportunities for mesoscopics in thermometry and refrigeration: physics and applications. Rev Mod Phys Mar. 2006;78(1):217–74. [2] Golubev D, Kuzmin L. Nonequilibrium theory of a hot-electron bolometer with normal metal-insulator-superconductor tunnel junction. J Appl Phys 2001;89(11):6464. [3] Muhonen JT, Prest MJ, Prunnila M, Gunnarsson D, Shah VA, Dobbie A, et al. Strain dependence of electron–phonon energy loss rate in many-valley semiconductors. Appl Phys Lett 2011;98(18):182103. [4] Savin A, Prunnila M, Kivinen P, Pekola J, Ahopelto J, Manninen AJ. Efficient electronic cooling in heavily doped silicon by quasiparticle tunneling. Appl Phys Lett 2001;79(10):1471. [5] Nahum M, Eiles TM, Martinis JM. Electronic microrefrigerator based on a normal-insulator-superconductor tunnel junction. Appl Phys Lett 1994;65(24):3123. [6] Leivo MM, Pekola JP, Averin DV. Efficient Peltier refrigeration by a pair of normal metal/insulator/superconductor junctions. Appl Phys Lett 1996;68(14):1996. [7] Schroder DK. Semiconductor material and device characterisation. 3rd ed. John Wiley & Sons; 2006. [8] Luukanen A, Leivo MM, Suoknuuti JK, Manninen AJ, Pekola JP. On-chip refrigeration by evaporation of hot electrons at sub-Kelvin temperatures. J Low Temp Phys 2000;120(3):281. [9] Nahum M, Martinis JM. Ultrasensitive-hot-electron microbolometer. Appl Phys Lett 1993;63(22):3075. [10] Prest MJ, Muhonen JT, Prunnila M, Gunnarsson D, Shah VA, Richardson-Bullock JS, et al. Strain enhanced electron cooling in a degenerately doped semiconductor. Appl Phys Lett 2011;99(25):251908. [11] Zieve R, Prober D, Wheeler R. Low-temperature electron–phonon interaction in Si MOSFETs. Phys Rev B Jan. 1998;57(4):2443–6. [12] Sergeev A, Reizer M, Mitin V. Deformation electron–phonon coupling in disordered semiconductors and nanostructures. Phys Rev Lett Apr. 2005;94(13):1–4. [13] Prunnila M. Electron–acoustic-phonon energy-loss rate in multicomponent electron systems with symmetric and asymmetric coupling constants. Phys Rev B 2007;75(16):1–8.