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Computer aids for electronic equipment design
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E. W o l f e n d a l e
Computer aids for electronic equipment design Computer-aided design is rapidly becoming established as a powerful tool in the electronics industry. This paper surveys the present state of the art as applied by the design team lead by the author at Racal Research Ltd., Tewkesbury. Various techniques are discussed including the use of an interactive graphics system and the importance of establishing a Data Bank.
Experience has established the computer as a powerful aid for network analysis and network synthesis, but this is generally only a small part of the design process which takes an initial concept and translates it into hardware. Analysis is, of course, essential for exact design and is the basis for optimisation and tolerancing, but a large amount of engineering time is also spent on, first of all, obtaining information on which to base the design and then having completed the analysis, on laying out the circuit and adding the necessary mechanical design to put the circuit into its equipment environment. It is in this area that automation of the physical layout and calculation of performance in the equipment environment will considerably reduce troubles in early production. Computer-aided design is therefore required to assist the whole design process and a method by which this
TELETYPE
I DESIGNER
COMPUTER I CRT D I S P L A Y ] / AND r LIGHT PEN l
PROGRAM (1) Test to loose specification (2) Optimiseto a tighter specification, (3) Tolerance to a development specification.
(4) LayoUtproductiontO a specification.
12
STORE I"Systems Analysis. Calculation ,~ Logic Simulation. language. LCircuit AnalysisTechniques. Calculation Optimisation Techniques. language /Data Bank. informationon practical components. "1Calculation Sensitivity Analysis and I language. Tolerancing Techniques, ' (I.e. Mask Patternsand Drawing | Rules. language,
,~Thick Film Rules. iMinimum Crossover and ~
Placement Techniques.
Calculation ./Stray C and L Screening language. -L EarthCurrents. Fig. I
could be done is shown in Fig. I. The Designer has access to the computer through a Teletype, and a CRT Display with a light pen (sometimes known as a Graphics Terminal). At the moment the CRT has to be close to the computer, but in the not too distant future it will be available for operation over a Post Office line to a computer at a remote point. The Teletype and CRT display enable the designer to communicate with the computer quickly and easily provided that the necessary software is stored in the computer store. The designer will either create an overall program to try and carry out his design from start to finish with as little intervention as possible, or he will create individual programs taking the design from one stage to the next. In either case if he wishes to operate quickly and efficiently he must have at his disposal a large amount of information and a large number of programs and procedures in the computer backing store. This will be illustrated by taking the design process through stage by stage. The first step in the design process is to test the initial concept to a rather loose specification to see whether it is worthwhile proceeding in detail. In the case of a fairly large system this will require some method of system analysis, for example, logic simulation or in the case of a complicated circuit, several methods of circuit analysis. In both cases it will be necessary to string together a large number of programs and procedures. The designer will therefore need an overall calculation language which will enable him to easily put together the basic program blocks to perform the test that he requires. The results of the computer test will be output on the teletype or displayed on the CRT, The designer will then modify his circuit or system and repeat the test. Having satisfied a loose specification it will be necessary to optimise the system or the circuit to meet a tighter specification. The designer could do this through his teletype and C R T display, but this would be very time consuming. He will therefore call upon automatic optimisation procedures which will be stored in the computer backing store. At this stage he will turn from the theoretical concept to the practical realisation of it. To do this he must use information on practical components and either he or his program will access the data bank which contains full
COMPUTER AIDED DESIGN
information on all the practical components he is likely to wish to use. This information includes electrical performance, spreads, distributions, mechanical performance, dimensions, price, and reliability. Having obtained the desired information the design must be toleranced to meet a development specification. The calculation language will be used to access tolerancing and sensitivity analysis procedures which are stored in the computer backing store. The advantage of a computer process can now clearly
be seen because apart from the computer taking out and performing a lot of the routine time consuming work, at this stage, if it is not possible to meet the development specification, and the design needs to be modified, the modifications can be quickly incorporated and practically the same program used over again to go through the process of looking at the loose specification, the tighter specification and the development specification. In other words the method by which the designer carries out his design is automatically stored in his program. If we assume that the development specification has been met, the next stage will be to transfer the design to a mechanical layout suitable for production. Here two processes are involved, the physical process of drawing the layout, and the analysis process to check the performance of the design in the layout. The CRT display and light pen is such a powerful aid for the drawing of the layout, it is unlikely that the designer would go through the drawing office. He will use a drawing language which will enable him to call on integrated circuit and MOS mask patterns and rules, thick film component rules, techniques for obtaining a minimum number of crossovers and techniques for the placement of practical components within a given area. As he uses the drawing language he will call upon a calculation language to calculate such things as stray capacitance and inductance, the effectiveness of screening and the patterns of earth currents in a casting or a chassis. Once again all these methods are stored in his program, hence, even at this stage, if it is necessary to go back and start again he has the design method established so that he can very quickly make changes and go through the whole process from start to finish. The success of the design operation depends not only on the ingenuity of the designer but also on the information and techniques stored in the computer backing store. In this article I will show by examples what electronic design software is currently available and describe what will become available in the very near future.
Data Bank A Data Bank is being prepared and will be available early in 1969. This will supply the component data which is so essential for the accurate design of electronic circuits. The data will be extracted from the computer backing store by circuit design programs embodying retrieval procedures or by designers placing specific requests which will use the retrieval procedures. The retrieval procedures will allow for components to be selected on a performance basis including price and reliability. F o r example, the request could be: 'State manufacturer and reference number of the cheapest diode having the following characteristics, maximum forward current not less than 120 mA, maximum reverse voltage not less than 200 V and a total power dissipation of 300 mW at an ambient temperature of 50°C. ' This would be written in a coded AUTUMN 1966
form using some of the identifiers and parameters as shown in the parameter lists.
An Outline of the System Each component type stored will have associated with it a parameter list giving the parameter description and the test condition where applicable. Certain components, because of their complex shape, will be defined by drawing, the computer outputting the appropriate dimensions. Some components will be subdivided into several types. This is necessary where components of the same generic type are designed to meet widely different applications. The transistor is an example, this will be grouped into linear low power, switching low power and linear medium power. Other categories may be added. To give an example of the type of information to be stored, the table below shows the parameters which will be stored for fixed capacitors.
Parameters for fixed capacitors Identifier
Parameter Description
S1
Type
$4
Manufacturer
$7 S13
Manufactmers ref. number Construction details
S16
Supplier
S19
Country of
$21
manufacturer Humidity rating
12 13 14 15
16 17 18 19 20 21
Price for 1 off based on max. of 9 Price for 1 off based on max. of 99 Price for 1 off based on max. of 999 R e l i a b i l i t y (MIL217A at 0.I rated stress 35 ° ground environment.) Max. operating temp. Min. operating temp. Max. storage temp. Min. storage temp. Range type
22
Min. value stored
23
Max. value stored
24 25
Max. tolerance Min. tolerance
Method of Representation Max. 10 A / N characters, e.g. T R A N S I S T O R Max. 10 A / N characters, e.g. M U L L A R D Max. 22 A/N characters, e.g. 472LWA402CA Max. 10 A/N characters, e.g. T A N T A L U M Max. 10 A / N characters, e.g. CELDIS Max. 6 A ] N characters, e.g. P K S T A N Max. 6 A/N characters, e.g. H6BS11 Real number in pence Real number in pence Real number in pence Real number 106 hr
failures/
Real number °C Real number °C Real number °C Real number °C Real number non-dimens. Real number I2 or Farads Real number t2 or Farads Real number Real number Yo
13
Description
Ic [enl fiel
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 to 45 46 to 63 64 65
Units
Polarised/non-polarised (1 = Pol., Non-dim O = Non-Pol.) V If polarised max. reverse volts oC Max. d.c. voltage °C Knee temp. for d.c. volts t V/°C Derating factor for d.c. volts v. temp. V Max. a.c. voltage (r.m.s.) °C Knee temp. for a.c. volts V/°C Derating factor for a.c. volts v. temp. Hz Knee frequency for a.c. volts log V/ Derating factor for a.c. volts v. freq. log Hz A Max. leakage current over operating temp. range Max. Deviation in capacity R.T. to Voo T. max. Max. Deviation in capacity R.T. to 700 T. min. Max. loss factor over operating Non-dim temp. range Stability (conditions to be defined) 70 High frequency charactersitics including the equivalent circuit Distribution. Manufacturers distribution of nominal value Reference drawing number Relevant dimensions m.m
The parameters which have their distributions stored will be presented in the following way:
Identifier numbers appropriate to type Mean value Standard deviation Lower 5 percentile Upper 5 percentile Lower 10 percentile Upper 10 percentile Lower 25 percentile Upper 25 percentile Median i.e. 50 700 Lower gap value Upper gap value Depth of gap
As 700 of mean
Means outside of 5 percentiles Upper and Lower absolute limits
As 700 of mean
Sample size As the first issue of the data bank will be limited by the effort that can be allocated to the preparation of the information, it is intended initially to store the following components. (I) Fixed Resistors (1.1) Metal Oxide Electrosil TR4 and TR5 2 and 5 70 Welwyn MR4 and MR5 2 and 5 70 14
107o (1.2) Carbon Composition Erie Type 15 Erie Type 16 10 70 Morganite S 107o Morganite XL 107o Dubilier BTT 1070 Vitrohm UBT 1070 (1.3) Wirewound Welwyn W21 570 Painton M V I A 570 (2) Fixed Capacitors (2.1) Ceramic Erie, XD, AD, BC, CD 5, 10 and 2070 Erie YD 5, 10 and 2070 861,831,801,811 5, 10 and 2070 (2.2) Sih,er Mica Johnson Matthey C5F to C77F 5 , 2 a n d 170 S.T.C. 454-LUA-50 to 55 5, 2 and ! 70 (2.3) Polystyrene G.E.C. (Salford) P.F. 10, 5 and 270 125 and 63U G.E.C. (Salford) R.P.F. 10, 5 and 2½7o 160U and 63V Sinflex H.S. 10, 5 and 2½70 160U and 63V (2.4) Met. Polyester Wima Tropyfol M 1070 160V Mullard C280 TCC PMX (2.5) Met. Polycarbonate Wima F K C 270 160U Wima MKB3 2070 160V Union Carbide Kemet J (2.6) Solid Tam Union Carbide Kemet E STC 472 L W A Series (3) Transistors 2N918 Texas and Mullard 2N930 Texas 2N2369 Mullard 2N2369A Texas D 1559 Texas 2N4124 Motorola 2N4126 Motorola 2N3904 Motorola 2N3906 Motorola BFY78 Fairchild BFI 15 Mullard 2N3662 Gen. Elec. BSY95A STC BC122 Siemens Halske BSX20 Mullards 2N2894 Texas Thereafter the data bank will be expanded rapidly. The information on the components is obtained from three sources: (l) from the manufacturer's published data; (ii) by direct contact with the manufacturer's quality control department; and (iii) by measurements made on batches of devices spread over a period. The measurements are made at Tewkesbury and converted by the computer into the appropriate electrical equivalent. The initial work was concentrated on producing the hybrid ~- parameters of a range of transistors but work is now continuing on higher frequency equivalents over a wide range of d.c. conditions. The work includes the high frequency equivalents of a range of passive components. COMPUTER AIDED DESIGN
T h e d a t a b a n k will also c o n t a i n the failure rate characteristics f r o m the M I L H a n d b o o k 217A. T h e characteristics h a v e been curve fitted a n d the resulting p o l y n o m i n a l s stored in the d a t a b a n k . A p r o g r a m h a s been written which will extract the a p p r o p r i a t e failure rates given inf o r m a t i o n o n the stresses o f the individual c o m p o n e n t s in e q u i p m e n t . T h e p r o g r a m o u t p u t s the total failure rate for each c o m p o n e n t g r o u p a n d a r r a n g e s these in descending order. T h o s e areas possessing the lowest reliability c a n then be o b s e r v e d easily a n d corrective action t a k e n accordingly.
I~
R2
Fixed c o m p o s i t i o n resistor Variable c o m p o s i t i o n resistor Toggle switch N P N silicon t r a n s i s t o r R e c t a n g u l a r resistant c o n n e c t o r V a r i a b l e ceramic c a p a c i t o r Silicon diode Polystyrene c a p a c i t o r Fixed film resistor G e n e r a l ceramic c a p a c i t o r A l u m i n i u m electrolytic c a p a c i t o r Air trimmer capacitor Failure rate o f circuit mtbf
N u m e r i c a l circuit analysis includes d.c. analysis, a.c. analysis, n o n - l i n e a r a n d transient analysis a n d noise analysis. T o describe these in detail would take far too long, h e n c e a simple example will be used to s h o w the effectiveness o f the various analysis p r o g r a m s . Fig. 2 s h o w s the circuit d i a g r a m o f a direct coupled amplifier consisting of a differential amplifier followed by a n e m i t t e r follower with frequency selective feed-back f r o m the o u t p u t to the input o f the first transistor.
Result of d.c. analysis using REDAP 15 (DCAP1) D.C. analysis o f Amplifier T e m p e r a t u r e 20.00°C Node 3 4 5 6 7 8 9 10 11 12
AUTUMN
1968
®
TR1
TR2 ®
0 OV
RT~IK
R~lt2k
R,
Component
Analysis
Resistor 1 2 3 4 5 6 7 8 9
' 10 k
R3 Rt
Reliability of a Test Circuit Failure R a t e Q u a n t i t y ~o/I000 h r 8.400. + 00 35 4.640. + 00 2 4.600. + 00 I 2.730. + 00 6 8.000. - 01 1 7.503. - 01 3 6.700. - 01 1 1.600. - 01 8 1.440. - 01 12 1.200. - 01 5 1.020. - 01 2 4.300. - 02 1 23.16. + 00 4318 hr
ilOk
.12V
Voltage - 7.94110 6.08710 + - 6.74010 - 6.4241o 6.48410 6.8811o + - 3.2151o - 8.05710 - 3.37610 6.4651o -
03 O0 Ol 02 O1 00 03 03 03 01
Current 7.94110 - 06 5.91310 - 04 5.1191o - 04 9.43810 - 04 2.54010 - 03 5.63010 - 06 3.21510 - 06 1.2651o - 04 1.6481o - 04
® -12v
0'lp.F
Fig. 2
Transistor 1 2 3
Emitter Current 4.288xo - 04 5.15110 - 04 2.53410 - 03
Base Current 2.31210 - 06 3.2151o - 06 3.8331o - 05
Collector Current 4.20410 - 04 5.05010 - 04 2.48410 - 03
Result of a.c. linear analysis using R E D A P I A (GCAP2P) Table of Results ZS
0.00010 + 00
J 0.00010 + 00
ZL
1.0001o + 08
J 0.00010 + 00
Frequency Voltage Gain HZ DB PHASE 10.0000 17.94 177 15.8489 17.92 175 25.1189 17.85 173 39.8107 17.70 169 63.0957 17.34 163 I00.000 16.55 155 158.489 15.08 146 251.189 12.86 139 398.107 10.21 138 630.957 7.723 142 1000.00 5.868 150 1584.89 4.771 159 2511.89 4.232 166 3981.07 3.995 171 6309.57 3.897 174 I0000.0 3.857 176 15848.9 3.841 178 25118.9 3.835 178 39810.7 3.832 179 63095.7 3.831 179 100000 3.831 179 T h e a.c. linear analysis p r o g r a m R E D A P 1A ( G C A P 2 P ) also has a plotting o p t i o n a n d the results as plotted b y the c o m p u t e r are s h o w n in Figs. 3 a n d 4.
Results of noise analysis using REDAP 18 (CATNAP) Catnap noise analysis of d.c. amplifier T e m p e r a t u r e = 2.93010 + 02 deg. a b s Source Resistance = 5.0000xo + 01 o h m s . 15
200
10
200
Mod
2 1.0
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IIlll[
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i
Irtlll
2"0
i
t
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trllel
3"0
i
t
i IlZl,
/,.-0
130
F.io9 Hz
Fig. 3 FREQUENCY HZ 1.0001o + 5.00010 + 1.0001o + 1.50010 + 2.000z0 + 5.00010 + 7.00010 + 8.00010 + 1.00010 + 1.00010 + 1.O00xo + 1.0001o + l.O00to +
NOISE O U T P U T RMS F I G U R E NOISE VOLTAGE DB 1.8001o + Ol 5.6611o- 08 1.8011o + 01 5.40410- 08 1.80610 + 01 4.79710- 08 1.8131o + 01 4.15410- 08 1.8221o + 01 3.61210-- 08 1.89410 + 01 2.15710- 08 1.93810 + 01 1.8651o- 08 1.95610 + 01 1.78210"- 08 1.98410 + 01 1.67710- 08 2.07010 + O1 1.4641o- 08 2.07010 + O1 1.4641o- 08 2.078xo + O1 1.4841o- 08 2.3821o + O1 3.1691o- 08
Ol 01 02 02 02 02 02 02 03 05 06 07 08
Transient analysis of amplifier using REDAP 16 (NTAP1) The results of this program are available in graphic or tabular form. In this case we will show the response of the amplifier to a square wave by graphical output as shown in Fig. 5. Redap 16 will also handle non linear elements. Any element may be made a function (x) of the voltage or current of any branch. Function (x) can be made to assume any of the following forms: (a) P o w e r series parameter = ao + a l x + a2x ~ + . .an-zX n-1
where n is the total number of terms. (n cannot exceed 11.) (b)
Exponential diode law
parameter = 1 = Is [exp(k x) - 1] It is obvious that this can be used to represent a diode having an exponential characteristic, in which case Is is the reverse leakage current, k = q / K T , x is the voltage across the diode and 'parameter' is the current through the diode. (c)
Junction capacitance
parameter C = Kx (O + x)-, (d)
Charge controlled current source
parameter I = ko + k t Q
-30 50
r
r
I
r II1111 6'0
p
I 1,1,11
I
i
7'0
l illll]
I
8'0
I
I
i I i
-50
9"0
F.Iog Hz
Fig. 4
of 'parameter' against x. A maximum of eleven sets of values are allowed.
A circuit calculation language In all of the above programs a very simple data structure enables an engineer to quickly set up his problem for the computer to perform the analysis. A series of integers tells the computer which parameters of the circuit the designer requires to be calculated. The circuit information is put in nodal form allowing quick changes and the easy insertion of new components. Simple instructions such as repeat, store, plot and exchange, enable the designer to rapidly prepare data to optimise, to perform sensitivity analysis, and to tolerance the circuit. The linear analysis program will, in the near future, have built in sensitivity analysis and tolerancing procedures. This is a good start, but is still not sufficient for sophisticated design. For example if one wishes to tolerance the a.c. performance of a linear circuit including a spread of ambient temperature, it will be necessary to set up the junction temperatures of all the devices at each ambient temperature taking into account the thermal resistance of the devices; to calculate the d.c. conditions in the circuit with these junction temperatures; to update the a.c. equivalent to suit these new d.c. conditions and, finally, to calculate the spread in the a.c. performance. This involves a combination of two of the analysis programs together with a procedure for updating the electrical equivalents from the change in the d.c. conditions. The d.c. analysis program REDAP 15 will be updated to incorporate thermal resistance in the near future and, by the end of the year, a circuit calculation language will be made available enabling the designer to combine a number of the analysis programs, and will in the long-run allow h~m to combine all the analysis programs. This gives a major step in the right direction but the language will do even more than this because it will enable the designer to perform optimisation by procedure. He will be able to optimise the values of a number of components in the circuit for a particular output parameter such as gain, band width, etc. This language will be extended next year to become a really powerful tool for the analysis, optimisation and tolerancing of all types of circuits.
= ko+kxidt
where Q is the total charge stored in the capacitor through which the controlling current i flows. (e)
Tables o f values
This enables the user to represent the nonlinearity of 'parameter' by a table of n sets of values (Pl, xi)
16
Symbolic algebraic analysis There are many cases where symbolic algebraic analysis will assist the designer to a greater extent than numerical analysis. It may be that he wishes to see the form of the final algebraic solution. It may be that he wishes to make
COMPUTER AIDED DESIGN
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R3 C2 :
R7
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Fig. 6
Fig. 5
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approximations before proceeding to the numerical solution. He may wish to program the algebraic solution so as to avoid using matrix techniques. In all these cases he will require a program which will handle the algebra in symbolic form. Such a program, has been written and its use is shown by the following example. We wish to obtain the solution of the following system of three equations in terms of x and eliminating y and z. AX+ BY+ CZD= 0 EX + FY + GZH= 0 IX + JY + KZL = O
D,2 R2 A
(3) Q : The Q is defined as ~
(4)
The program manipulates the three equations and gives the solution as follows: (CFLX=
(-
DFK + DGJ-
CEJ + BEK -
BGL -
CHJ + BHK)
A F K + CF1 - B G I + A G J )
(5) This is the beginning of what will undoubtedly become a very powerful method of analysis. It is hoped to extend this very shortly to include complex variables and then to extend the use to the solution of polynomials and, possibly, even to the solution of differential equations. (6)
Design programs Where the design procedure for a circuit is difficult and the circuit may be required many times to perform different specifications, it is worthwhile to store the designers experience in the form of a design program. The writing of the design program may well take longer than a single design but thereafter it only takes a matte[ of seconds or minutes of computer time to produce the answers for a wide range of specifications. One particular area where the design process is far from easy is the area of active filters. The new microelectronic techniques combining the use of thick film and medium scale integration are making the designer eliminate inductors wherever possible hence a range of design programs covering active filters using both transistors and operational amplifiers will not only be a valuable design aid but will also enable a designer to push these circuits to the limit of their performance. An example of the first of such a range of programs is REDAP 14, a program for the design of a twintee frequency selective amplifier (TEFSA). The circuit diagram is shown in Fig. 6. The program optimises the component values to produce a band pass response with a specified centre frequency and band width. The data to be supplied by the user is as follows: (1) Title: This is a list of not more than 100 characters. (2) Centre frequency: This should be specified in Hz with a maximum upper limit of 0.5 MHz.
AUTUMN 1968 B
(7) (8)
fo
and a maximum value
of 20 is allowed. The sensitivity of the circuit's frequency response to component drifts is dependent, to a very large extent, on the required Q. Source resistance: The program attempts to match the input network of the amplifier to this figure. This figure should be in the range 1 k f2 to 10 k l). If there is no specification on this item, it should bet set to 2 k f2. Total board current and transistor standing current: There is an upper limit on transistor standing current of 1 mA, due to restrictions on transistor data. If there is no specification on both or either of these two items, they should be set to 3 and 1 mA respectively. Operating temperature range specified in degrees centigrade: This must be specified in the following order: Upper and Lower temperatures. The maximum operating range is - 2 0 ° C to 70°C. Supply voltage and a percentage regulation of this figure: The supply voltage should not exceed 20 V. Resistor tolerances: Since the circuit is intended for use in thick or thin film form, there are four figures to be specified here: i Applies to all untrimmed (a) the tolerance (~o) (b) the correlation of components components, ~i.e. R1, R2, R3, on a board (~o) R4, RE, RS
i(see Fig. 1) ~Applies to (c) the trimming accuracy (~o) trimmed (d) the temperature co-efficient ~components, (ppm/°C) i.e. R5, R6, R7 (see Fig. 1) (9) Capacitor tolerances: These correspond to items 'c' and 'd' in list 9 except that if discrete capacitors are to be used in the twintee (C1, C2, C3) then a selection tolerance (~o) should be substituted for the trimming accuracy. To assist the user a data form is supplied and an example of this is filled in for a particular requirement, is shown below. 17
Example Parameter 1.
Title
2. 3. 4. 5(a) (b) 6. 7(a) (b) 8. 9.
Centre frequency Q Input resistance Board current Transistor current Temperature range Supply voltage Regulation Resistor specification Capacitor specification
Value
Limits
EXAMPLE OF TEFSA FO = 50 kHz, Q = 15 5 × 104
< 100
BIAS COMPONENTS RE 1,2001o + 02 RS 1.7031o + 04 RI 1.1161o + 04 R2 1,5241o + 02 R3 2.55010 + 04 R4 4,780~o + 03
< 0.5 HMz
!
15 2000
< 20 I kF~ < Ri,< 1 0 k ~
3 × 10-a 1 x 10 -a
none I e < l × 10-a
(a) 50, (b) 0
- 20 < Top < 70°C
12 0'5 (a) 15, (b) 7, (c) 1, (d) 150 (a) 2.5, (b) 15o
Vcc < 20
TWINTEE COMPONENTS R5 2.45010 + 03 R6 2.45010 + 03 R7 1.2271o + 03 CI 1,2001o - 09 C2 2.0001o - 09 C3 2.7001o - 09 WORSTCASE (l) IE IC1 IC2 VCE1 VCE2 FO Q
The computer takes this specification, together with data on the devices to be used (which will in the future be input from the data bank) and then carries out the process shown in Fig. 7. The output from the computer is shown in the next column.
Input specification and additional data
(2) IE ICI IC2 VCE1 VCE2 FO Q
)
Set d.c.circuit to give adequate d.c. stability and required input impedance
I [ I
Carry out worst case d.c. analysis
Carry out worst case a.c. analysis
(
O/P component list and results of worst case analysis Fig. 7
18
CONDITIONS 1.26310 - 03 1.25010 - 03 1.238x0 - 03 1.49110+ 00 8.1191o+ 00 5.245~o + 04 2.335,o + 01 4'89410 4"885xo 4"872xo8'522104"88010+ 4"76510 + 7.5081o +
04 04 04 0l 00 04 oo
Layout
Adjust Twintee components to give amplifier required a.c.response
I
of TEFSA
FO= 50KHZ, Q = 15 Twintee frequency selectiveamplifier Component list
)
When laying out a circuit the designer is concerned with both the mechanical operation of placement of components, and the drawing of, the printed circuit board, or the masks for the thick film substrate, or the masks for the integrated circuit. In addition to this he is also concerned with the effect of the layout on the performance of his circuit. The designer therefore needs two aids: a drawing aid and a calculation aid. The calculation aid should enable him to determine all the things about the layout which are likely to affect his circuit performance, including stray capacitance, lead inductance, stray mutual coupling, the effectiveness of screening the effect of near field screening on the circuit and the flow of earth currents in the earth plane or chassis. Two programs already exist for the calculation of mutual capacitance and self and mutual inductance and these are being extended to include the calculation not only between more complex patterns of conductors but also between discrete components. REDAP 2 calculates capacitance and REDAP 3 calculates inductance. The designer feeds the information about his layout into the computer by breaking down his conductors into sub-areas and then by feeding the co-ordinates of these sub-areas to the computer. Fig. 8 shows an example pattern prepared for the capacitance calculation and the results of the calculation are shown below.
COMPUTER AIDED DESIGN
16
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SUB-AREAS ARE NUMBERED
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CONSECUTIVELY FROM 1 TO 47
. I
I
[
2
4
6
I
8
l
I
I
I
I
I
I
l
10
12
14
16
18
20
22
24
Fig. 8
Capacitance Computations Locco Example 1 No. o f sub-areas = 47. Relative Dielectric Constant of Surrounding M e d i u m = 1000 Relative Dielectric Constant o f Substrate/P.C. Board = 5"170 Thickness of Substrate/P.C. Board = 1.590 MM CONDUCTOR I C 1 2 = 3.84971u- 01 PF C 1 3 = 1.23311o - 01 PF CONDUCTOR 2 C 2 1 = 3.84971o - 01 PF C 2 3 = 1.91091o -- 01 PF CONDUCTOR 3 C 3 l = 1.23311o -- 01 PF C 3 2 = 1.91091o - 01 PF The redundant information in the printout is useful when there are a large number of conductors. The program can handle a three dimensional problem by placing sub-areas over the surface of the conductor. It is immediately obvious that one of the problems with this type of program is the production of the table of co-ordinates to provide the information for the computer to work on. The provision of this could be speeded up tremendously by an automated drawing aid and the natural tool for this is the C R T display with the light pen. Fig. 9 shows a portion of an integrated circuit mask created by the use of a CRT. Fig. 10 shows an expanded version of a
AUTUMN 1968
X(mm)
portion of this mask and this will be used to illustrate the method adopted which makes this an extremely powerful aid in layout design. Although it is called a drawing aid, in fact nothing has been drawn. Everything on the mask has been placed by the computer and the designer to an accuracy of one m~cron. The shapes have been created from basic rectangles. The rectangles are called by typing the length, width and layer number on a typewriter and placed on the C R T to an approximate position indicated by the designer with a light pen. The computer places it to an exact position as it stores the co-ordinates of the rectangle on a grid of one micron square. Then, by expanding the picture to maximum expansion and displaying a portion of this grid on the face of the C R T the designer can place the rectangle to an accuracy of one micron anywhere on the picture representing the 4000 micron chip. Complicated shapes can be built up by merging the rectangles and by reproducing shapes and merging them together. Items can be named and may be moved by name or reproduced by name. Different mask layers can be brightened or dimmed, shapes can be rotated, complex patterns can be stored and called for as required and a very complex drawing can be built up very rapidly by the designer working with the computer through the C R T display. Other layout programs adjust the connecting pattern for minimum crossovers and enable discrete components to be moved around on the face of the C R T without losing the connections to them. In all these programs the geometric information is stored in the computer so at any time it should be possible to use calculation programs to determine the layout parameters which are likely to alter the performance of the circuit in its layout. These para-
19
Fig. 9
Fig. 10
meters can then be put to the analysis p r o g r a m s and the overall effect o f the circuit layout calculated. A t the m o m e n t this has to be d o n e by the designer extracting the necessary i n f o r m a t i o n and inputting that i n f o r m a t i o n into the a p p r o p r i a t e program. In the future a control language will be available to assist him to p e r f o r m this operation.
The Future A great deal o f what has been described is already available in the R E D A C service. With 30 engineers and m a t h e m a t i c i a n s w o r k i n g on the service next year, what has been described as possible for the future will rapidly b e c o m e reality. A t the m o m e n t the service is offered on a bureau basis by post, telephone or t h r o u g h the Datel 200 system, or on users o w n c o m p u t e r s by i m p l e m e n t i n g the software for their machines. F a s t e r transmission links are available and will be i m p l e m e n t e d into the service during 1969. D u r i n g 1970 it s h o u l d be possible for r e m o t e users to have n o t only the fast data transmission but also a r e m o t e graphic terminal to enable them to use the vast range o f software which will by then be available for layout and system design. D u r i n g 1969 all the procedures which have been written and used to build up the software d e v e l o p m e n t will be m a d e available for on line users to create their own programs.
Acknowledgments This article has been written a b o u t the w o r k o f a very enthusiastic t e a m o f electronic designers and m a t h e m a ticians at R a c a l R e s e a r c h Ltd. I would have liked to ack n o w l e d g e t h e m individually but this w o u l d take too long. I w o u l d however, like to take this o p p o r t u n i t y o f expressing m y a p p r e c i a t i o n for the way they h a v e w o r k e d together to p r o d u c e w h a t is already a very fine s o f t w a r e package for electronic design. I w o u l d like also to express my appreciation for the assistance o f the Ministry o f T e c h n o l o g y in financing h a l f the p r o g r a m m e o f work, and also for the c o - o p e r a t i o n and assistance we have received f r o m the R o y a l A i r c r a f t E s t a b l i s h m e n t and f r o m the Signals R e s e a r c h and D e v e l o p m e n t Establishment. I a m also grateful for the assistance given to us by T h e Telep h o n e M a n u f a c t u r i n g C o m p a n y Ltd. for the p r e p a r a t i o n o f the integrated circuit layout p r o g r a m . Finally I a m very grateful for the support and e n c o u r a g e m e n t I have received f r o m m y C h a i r m a n , Mr. E. T. Harrison. 1 Kuo, F. F. and Kaiser, J. F.: 'Systems Analysis Computer', R E D A C Users Manual, Volume Research Ltd. ~- Wolfendale, E.: 'Computer-aided Design of Circuits (Iliffe 1968). :~ Calahan, D. A.: Computer Aided Network Design Hill 1968).
by Digital 1, Racal Electronic (McGraw-
Received August, 1868
E. Wolfendale B.Sc.(Eng.), F.I.E.E., F.I.E.R.E., had his introduction to electronics as a Lieutenant in the Royal Signals during the last war. He graduated w i t h a First Class Honours Degree at Battersea College of T e c h n o l o g y and spent six years at the Mullard Research Laboratories on s e m i c o n d u c t o r application research. In 1957 he transferred to Mullard°s S o u t h a m p t o n Works, as Chief A p p l i c a t i o n s Engineer, w h e r e he established the s e m i c o n d u c t o r measurement and application laboratories. I n 1961 he w e n t to Nairobi to organise the Electronics Courses at the University College. On returning in 1965, he j o i n e d Racal Research Ltd., w h e r e he is n o w D e p u t y M a n a g i n g Director. As well as establishing d e v e l o p m e n t and p r o d u c t i o n facilities w i t h this Company, he is also actively engaged in research into the use of digital c o m p u t e r techniques for electronic design.
29
COMPUTER AIDED DESIGN
E. W o l f e n d a l e
Computer aids for electronic equipment design Computer-aided design is rapidly becoming established as a powerful tool in the electronics industry. This paper surveys the present state of the art as applied by the design team lead by the author at Racal Research Ltd., Tewkesbury. Various techniques are discussed including the use of an interactive graphics system and the importance of establishing a Data Bank.
Experience has established the computer as a powerful aid for network analysis and network synthesis, but this is generally only a small part of the design process which takes an initial concept and translates it into hardware. Analysis is, of course, essential for exact design and is the basis for optimisation and tolerancing, but a large amount of engineering time is also spent on, first of all, obtaining information on which to base the design and then having completed the analysis, on laying out the circuit and adding the necessary mechanical design to put the circuit into its equipment environment. It is in this area that automation of the physical layout and calculation of performance in the equipment environment will considerably reduce troubles in early production. Computer-aided design is therefore required to assist the whole design process and a method by which this
TELETYPE
I DESIGNER
COMPUTER I CRT D I S P L A Y ] / AND r LIGHT PEN l
PROGRAM (1) Test to loose specification (2) Optimiseto a tighter specification, (3) Tolerance to a development specification.
(4) LayoUtproductiontO a specification.
12
STORE I"Systems Analysis. Calculation ,~ Logic Simulation. language. LCircuit AnalysisTechniques. Calculation Optimisation Techniques. language /Data Bank. informationon practical components. "1Calculation Sensitivity Analysis and I language. Tolerancing Techniques, ' (I.e. Mask Patternsand Drawing | Rules. language,
,~Thick Film Rules. iMinimum Crossover and ~
Placement Techniques.
Calculation ./Stray C and L Screening language. -L EarthCurrents. Fig. I
could be done is shown in Fig. I. The Designer has access to the computer through a Teletype, and a CRT Display with a light pen (sometimes known as a Graphics Terminal). At the moment the CRT has to be close to the computer, but in the not too distant future it will be available for operation over a Post Office line to a computer at a remote point. The Teletype and CRT display enable the designer to communicate with the computer quickly and easily provided that the necessary software is stored in the computer store. The designer will either create an overall program to try and carry out his design from start to finish with as little intervention as possible, or he will create individual programs taking the design from one stage to the next. In either case if he wishes to operate quickly and efficiently he must have at his disposal a large amount of information and a large number of programs and procedures in the computer backing store. This will be illustrated by taking the design process through stage by stage. The first step in the design process is to test the initial concept to a rather loose specification to see whether it is worthwhile proceeding in detail. In the case of a fairly large system this will require some method of system analysis, for example, logic simulation or in the case of a complicated circuit, several methods of circuit analysis. In both cases it will be necessary to string together a large number of programs and procedures. The designer will therefore need an overall calculation language which will enable him to easily put together the basic program blocks to perform the test that he requires. The results of the computer test will be output on the teletype or displayed on the CRT, The designer will then modify his circuit or system and repeat the test. Having satisfied a loose specification it will be necessary to optimise the system or the circuit to meet a tighter specification. The designer could do this through his teletype and C R T display, but this would be very time consuming. He will therefore call upon automatic optimisation procedures which will be stored in the computer backing store. At this stage he will turn from the theoretical concept to the practical realisation of it. To do this he must use information on practical components and either he or his program will access the data bank which contains full
COMPUTER AIDED DESIGN
information on all the practical components he is likely to wish to use. This information includes electrical performance, spreads, distributions, mechanical performance, dimensions, price, and reliability. Having obtained the desired information the design must be toleranced to meet a development specification. The calculation language will be used to access tolerancing and sensitivity analysis procedures which are stored in the computer backing store. The advantage of a computer process can now clearly
be seen because apart from the computer taking out and performing a lot of the routine time consuming work, at this stage, if it is not possible to meet the development specification, and the design needs to be modified, the modifications can be quickly incorporated and practically the same program used over again to go through the process of looking at the loose specification, the tighter specification and the development specification. In other words the method by which the designer carries out his design is automatically stored in his program. If we assume that the development specification has been met, the next stage will be to transfer the design to a mechanical layout suitable for production. Here two processes are involved, the physical process of drawing the layout, and the analysis process to check the performance of the design in the layout. The CRT display and light pen is such a powerful aid for the drawing of the layout, it is unlikely that the designer would go through the drawing office. He will use a drawing language which will enable him to call on integrated circuit and MOS mask patterns and rules, thick film component rules, techniques for obtaining a minimum number of crossovers and techniques for the placement of practical components within a given area. As he uses the drawing language he will call upon a calculation language to calculate such things as stray capacitance and inductance, the effectiveness of screening and the patterns of earth currents in a casting or a chassis. Once again all these methods are stored in his program, hence, even at this stage, if it is necessary to go back and start again he has the design method established so that he can very quickly make changes and go through the whole process from start to finish. The success of the design operation depends not only on the ingenuity of the designer but also on the information and techniques stored in the computer backing store. In this article I will show by examples what electronic design software is currently available and describe what will become available in the very near future.
Data Bank A Data Bank is being prepared and will be available early in 1969. This will supply the component data which is so essential for the accurate design of electronic circuits. The data will be extracted from the computer backing store by circuit design programs embodying retrieval procedures or by designers placing specific requests which will use the retrieval procedures. The retrieval procedures will allow for components to be selected on a performance basis including price and reliability. F o r example, the request could be: 'State manufacturer and reference number of the cheapest diode having the following characteristics, maximum forward current not less than 120 mA, maximum reverse voltage not less than 200 V and a total power dissipation of 300 mW at an ambient temperature of 50°C. ' This would be written in a coded AUTUMN 1966
form using some of the identifiers and parameters as shown in the parameter lists.
An Outline of the System Each component type stored will have associated with it a parameter list giving the parameter description and the test condition where applicable. Certain components, because of their complex shape, will be defined by drawing, the computer outputting the appropriate dimensions. Some components will be subdivided into several types. This is necessary where components of the same generic type are designed to meet widely different applications. The transistor is an example, this will be grouped into linear low power, switching low power and linear medium power. Other categories may be added. To give an example of the type of information to be stored, the table below shows the parameters which will be stored for fixed capacitors.
Parameters for fixed capacitors Identifier
Parameter Description
S1
Type
$4
Manufacturer
$7 S13
Manufactmers ref. number Construction details
S16
Supplier
S19
Country of
$21
manufacturer Humidity rating
12 13 14 15
16 17 18 19 20 21
Price for 1 off based on max. of 9 Price for 1 off based on max. of 99 Price for 1 off based on max. of 999 R e l i a b i l i t y (MIL217A at 0.I rated stress 35 ° ground environment.) Max. operating temp. Min. operating temp. Max. storage temp. Min. storage temp. Range type
22
Min. value stored
23
Max. value stored
24 25
Max. tolerance Min. tolerance
Method of Representation Max. 10 A / N characters, e.g. T R A N S I S T O R Max. 10 A / N characters, e.g. M U L L A R D Max. 22 A/N characters, e.g. 472LWA402CA Max. 10 A/N characters, e.g. T A N T A L U M Max. 10 A / N characters, e.g. CELDIS Max. 6 A ] N characters, e.g. P K S T A N Max. 6 A/N characters, e.g. H6BS11 Real number in pence Real number in pence Real number in pence Real number 106 hr
failures/
Real number °C Real number °C Real number °C Real number °C Real number non-dimens. Real number I2 or Farads Real number t2 or Farads Real number Real number Yo
13
Description
Ic [enl fiel
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 to 45 46 to 63 64 65
Units
Polarised/non-polarised (1 = Pol., Non-dim O = Non-Pol.) V If polarised max. reverse volts oC Max. d.c. voltage °C Knee temp. for d.c. volts t V/°C Derating factor for d.c. volts v. temp. V Max. a.c. voltage (r.m.s.) °C Knee temp. for a.c. volts V/°C Derating factor for a.c. volts v. temp. Hz Knee frequency for a.c. volts log V/ Derating factor for a.c. volts v. freq. log Hz A Max. leakage current over operating temp. range Max. Deviation in capacity R.T. to Voo T. max. Max. Deviation in capacity R.T. to 700 T. min. Max. loss factor over operating Non-dim temp. range Stability (conditions to be defined) 70 High frequency charactersitics including the equivalent circuit Distribution. Manufacturers distribution of nominal value Reference drawing number Relevant dimensions m.m
The parameters which have their distributions stored will be presented in the following way:
Identifier numbers appropriate to type Mean value Standard deviation Lower 5 percentile Upper 5 percentile Lower 10 percentile Upper 10 percentile Lower 25 percentile Upper 25 percentile Median i.e. 50 700 Lower gap value Upper gap value Depth of gap
As 700 of mean
Means outside of 5 percentiles Upper and Lower absolute limits
As 700 of mean
Sample size As the first issue of the data bank will be limited by the effort that can be allocated to the preparation of the information, it is intended initially to store the following components. (I) Fixed Resistors (1.1) Metal Oxide Electrosil TR4 and TR5 2 and 5 70 Welwyn MR4 and MR5 2 and 5 70 14
107o (1.2) Carbon Composition Erie Type 15 Erie Type 16 10 70 Morganite S 107o Morganite XL 107o Dubilier BTT 1070 Vitrohm UBT 1070 (1.3) Wirewound Welwyn W21 570 Painton M V I A 570 (2) Fixed Capacitors (2.1) Ceramic Erie, XD, AD, BC, CD 5, 10 and 2070 Erie YD 5, 10 and 2070 861,831,801,811 5, 10 and 2070 (2.2) Sih,er Mica Johnson Matthey C5F to C77F 5 , 2 a n d 170 S.T.C. 454-LUA-50 to 55 5, 2 and ! 70 (2.3) Polystyrene G.E.C. (Salford) P.F. 10, 5 and 270 125 and 63U G.E.C. (Salford) R.P.F. 10, 5 and 2½7o 160U and 63V Sinflex H.S. 10, 5 and 2½70 160U and 63V (2.4) Met. Polyester Wima Tropyfol M 1070 160V Mullard C280 TCC PMX (2.5) Met. Polycarbonate Wima F K C 270 160U Wima MKB3 2070 160V Union Carbide Kemet J (2.6) Solid Tam Union Carbide Kemet E STC 472 L W A Series (3) Transistors 2N918 Texas and Mullard 2N930 Texas 2N2369 Mullard 2N2369A Texas D 1559 Texas 2N4124 Motorola 2N4126 Motorola 2N3904 Motorola 2N3906 Motorola BFY78 Fairchild BFI 15 Mullard 2N3662 Gen. Elec. BSY95A STC BC122 Siemens Halske BSX20 Mullards 2N2894 Texas Thereafter the data bank will be expanded rapidly. The information on the components is obtained from three sources: (l) from the manufacturer's published data; (ii) by direct contact with the manufacturer's quality control department; and (iii) by measurements made on batches of devices spread over a period. The measurements are made at Tewkesbury and converted by the computer into the appropriate electrical equivalent. The initial work was concentrated on producing the hybrid ~- parameters of a range of transistors but work is now continuing on higher frequency equivalents over a wide range of d.c. conditions. The work includes the high frequency equivalents of a range of passive components. COMPUTER AIDED DESIGN
T h e d a t a b a n k will also c o n t a i n the failure rate characteristics f r o m the M I L H a n d b o o k 217A. T h e characteristics h a v e been curve fitted a n d the resulting p o l y n o m i n a l s stored in the d a t a b a n k . A p r o g r a m h a s been written which will extract the a p p r o p r i a t e failure rates given inf o r m a t i o n o n the stresses o f the individual c o m p o n e n t s in e q u i p m e n t . T h e p r o g r a m o u t p u t s the total failure rate for each c o m p o n e n t g r o u p a n d a r r a n g e s these in descending order. T h o s e areas possessing the lowest reliability c a n then be o b s e r v e d easily a n d corrective action t a k e n accordingly.
I~
R2
Fixed c o m p o s i t i o n resistor Variable c o m p o s i t i o n resistor Toggle switch N P N silicon t r a n s i s t o r R e c t a n g u l a r resistant c o n n e c t o r V a r i a b l e ceramic c a p a c i t o r Silicon diode Polystyrene c a p a c i t o r Fixed film resistor G e n e r a l ceramic c a p a c i t o r A l u m i n i u m electrolytic c a p a c i t o r Air trimmer capacitor Failure rate o f circuit mtbf
N u m e r i c a l circuit analysis includes d.c. analysis, a.c. analysis, n o n - l i n e a r a n d transient analysis a n d noise analysis. T o describe these in detail would take far too long, h e n c e a simple example will be used to s h o w the effectiveness o f the various analysis p r o g r a m s . Fig. 2 s h o w s the circuit d i a g r a m o f a direct coupled amplifier consisting of a differential amplifier followed by a n e m i t t e r follower with frequency selective feed-back f r o m the o u t p u t to the input o f the first transistor.
Result of d.c. analysis using REDAP 15 (DCAP1) D.C. analysis o f Amplifier T e m p e r a t u r e 20.00°C Node 3 4 5 6 7 8 9 10 11 12
AUTUMN
1968
®
TR1
TR2 ®
0 OV
RT~IK
R~lt2k
R,
Component
Analysis
Resistor 1 2 3 4 5 6 7 8 9
' 10 k
R3 Rt
Reliability of a Test Circuit Failure R a t e Q u a n t i t y ~o/I000 h r 8.400. + 00 35 4.640. + 00 2 4.600. + 00 I 2.730. + 00 6 8.000. - 01 1 7.503. - 01 3 6.700. - 01 1 1.600. - 01 8 1.440. - 01 12 1.200. - 01 5 1.020. - 01 2 4.300. - 02 1 23.16. + 00 4318 hr
ilOk
.12V
Voltage - 7.94110 6.08710 + - 6.74010 - 6.4241o 6.48410 6.8811o + - 3.2151o - 8.05710 - 3.37610 6.4651o -
03 O0 Ol 02 O1 00 03 03 03 01
Current 7.94110 - 06 5.91310 - 04 5.1191o - 04 9.43810 - 04 2.54010 - 03 5.63010 - 06 3.21510 - 06 1.2651o - 04 1.6481o - 04
® -12v
0'lp.F
Fig. 2
Transistor 1 2 3
Emitter Current 4.288xo - 04 5.15110 - 04 2.53410 - 03
Base Current 2.31210 - 06 3.2151o - 06 3.8331o - 05
Collector Current 4.20410 - 04 5.05010 - 04 2.48410 - 03
Result of a.c. linear analysis using R E D A P I A (GCAP2P) Table of Results ZS
0.00010 + 00
J 0.00010 + 00
ZL
1.0001o + 08
J 0.00010 + 00
Frequency Voltage Gain HZ DB PHASE 10.0000 17.94 177 15.8489 17.92 175 25.1189 17.85 173 39.8107 17.70 169 63.0957 17.34 163 I00.000 16.55 155 158.489 15.08 146 251.189 12.86 139 398.107 10.21 138 630.957 7.723 142 1000.00 5.868 150 1584.89 4.771 159 2511.89 4.232 166 3981.07 3.995 171 6309.57 3.897 174 I0000.0 3.857 176 15848.9 3.841 178 25118.9 3.835 178 39810.7 3.832 179 63095.7 3.831 179 100000 3.831 179 T h e a.c. linear analysis p r o g r a m R E D A P 1A ( G C A P 2 P ) also has a plotting o p t i o n a n d the results as plotted b y the c o m p u t e r are s h o w n in Figs. 3 a n d 4.
Results of noise analysis using REDAP 18 (CATNAP) Catnap noise analysis of d.c. amplifier T e m p e r a t u r e = 2.93010 + 02 deg. a b s Source Resistance = 5.0000xo + 01 o h m s . 15
200
10
200
Mod
2 1.0
I
I
I
I
IIlll[
I
i
Irtlll
2"0
i
t
I
trllel
3"0
i
t
i IlZl,
/,.-0
130
F.io9 Hz
Fig. 3 FREQUENCY HZ 1.0001o + 5.00010 + 1.0001o + 1.50010 + 2.000z0 + 5.00010 + 7.00010 + 8.00010 + 1.00010 + 1.00010 + 1.O00xo + 1.0001o + l.O00to +
NOISE O U T P U T RMS F I G U R E NOISE VOLTAGE DB 1.8001o + Ol 5.6611o- 08 1.8011o + 01 5.40410- 08 1.80610 + 01 4.79710- 08 1.8131o + 01 4.15410- 08 1.8221o + 01 3.61210-- 08 1.89410 + 01 2.15710- 08 1.93810 + 01 1.8651o- 08 1.95610 + 01 1.78210"- 08 1.98410 + 01 1.67710- 08 2.07010 + O1 1.4641o- 08 2.07010 + O1 1.4641o- 08 2.078xo + O1 1.4841o- 08 2.3821o + O1 3.1691o- 08
Ol 01 02 02 02 02 02 02 03 05 06 07 08
Transient analysis of amplifier using REDAP 16 (NTAP1) The results of this program are available in graphic or tabular form. In this case we will show the response of the amplifier to a square wave by graphical output as shown in Fig. 5. Redap 16 will also handle non linear elements. Any element may be made a function (x) of the voltage or current of any branch. Function (x) can be made to assume any of the following forms: (a) P o w e r series parameter = ao + a l x + a2x ~ + . .an-zX n-1
where n is the total number of terms. (n cannot exceed 11.) (b)
Exponential diode law
parameter = 1 = Is [exp(k x) - 1] It is obvious that this can be used to represent a diode having an exponential characteristic, in which case Is is the reverse leakage current, k = q / K T , x is the voltage across the diode and 'parameter' is the current through the diode. (c)
Junction capacitance
parameter C = Kx (O + x)-, (d)
Charge controlled current source
parameter I = ko + k t Q
-30 50
r
r
I
r II1111 6'0
p
I 1,1,11
I
i
7'0
l illll]
I
8'0
I
I
i I i
-50
9"0
F.Iog Hz
Fig. 4
of 'parameter' against x. A maximum of eleven sets of values are allowed.
A circuit calculation language In all of the above programs a very simple data structure enables an engineer to quickly set up his problem for the computer to perform the analysis. A series of integers tells the computer which parameters of the circuit the designer requires to be calculated. The circuit information is put in nodal form allowing quick changes and the easy insertion of new components. Simple instructions such as repeat, store, plot and exchange, enable the designer to rapidly prepare data to optimise, to perform sensitivity analysis, and to tolerance the circuit. The linear analysis program will, in the near future, have built in sensitivity analysis and tolerancing procedures. This is a good start, but is still not sufficient for sophisticated design. For example if one wishes to tolerance the a.c. performance of a linear circuit including a spread of ambient temperature, it will be necessary to set up the junction temperatures of all the devices at each ambient temperature taking into account the thermal resistance of the devices; to calculate the d.c. conditions in the circuit with these junction temperatures; to update the a.c. equivalent to suit these new d.c. conditions and, finally, to calculate the spread in the a.c. performance. This involves a combination of two of the analysis programs together with a procedure for updating the electrical equivalents from the change in the d.c. conditions. The d.c. analysis program REDAP 15 will be updated to incorporate thermal resistance in the near future and, by the end of the year, a circuit calculation language will be made available enabling the designer to combine a number of the analysis programs, and will in the long-run allow h~m to combine all the analysis programs. This gives a major step in the right direction but the language will do even more than this because it will enable the designer to perform optimisation by procedure. He will be able to optimise the values of a number of components in the circuit for a particular output parameter such as gain, band width, etc. This language will be extended next year to become a really powerful tool for the analysis, optimisation and tolerancing of all types of circuits.
= ko+kxidt
where Q is the total charge stored in the capacitor through which the controlling current i flows. (e)
Tables o f values
This enables the user to represent the nonlinearity of 'parameter' by a table of n sets of values (Pl, xi)
16
Symbolic algebraic analysis There are many cases where symbolic algebraic analysis will assist the designer to a greater extent than numerical analysis. It may be that he wishes to see the form of the final algebraic solution. It may be that he wishes to make
COMPUTER AIDED DESIGN
/L
vcc
R5
CI"_
R3 C2 :
R7
c
/ / / /
x
I
I
I
I
I
I
I
lip I
0/p
Xscare = t. x 1153/in
Fig. 6
Fig. 5
'
-
VT2 R L
approximations before proceeding to the numerical solution. He may wish to program the algebraic solution so as to avoid using matrix techniques. In all these cases he will require a program which will handle the algebra in symbolic form. Such a program, has been written and its use is shown by the following example. We wish to obtain the solution of the following system of three equations in terms of x and eliminating y and z. AX+ BY+ CZD= 0 EX + FY + GZH= 0 IX + JY + KZL = O
D,2 R2 A
(3) Q : The Q is defined as ~
(4)
The program manipulates the three equations and gives the solution as follows: (CFLX=
(-
DFK + DGJ-
CEJ + BEK -
BGL -
CHJ + BHK)
A F K + CF1 - B G I + A G J )
(5) This is the beginning of what will undoubtedly become a very powerful method of analysis. It is hoped to extend this very shortly to include complex variables and then to extend the use to the solution of polynomials and, possibly, even to the solution of differential equations. (6)
Design programs Where the design procedure for a circuit is difficult and the circuit may be required many times to perform different specifications, it is worthwhile to store the designers experience in the form of a design program. The writing of the design program may well take longer than a single design but thereafter it only takes a matte[ of seconds or minutes of computer time to produce the answers for a wide range of specifications. One particular area where the design process is far from easy is the area of active filters. The new microelectronic techniques combining the use of thick film and medium scale integration are making the designer eliminate inductors wherever possible hence a range of design programs covering active filters using both transistors and operational amplifiers will not only be a valuable design aid but will also enable a designer to push these circuits to the limit of their performance. An example of the first of such a range of programs is REDAP 14, a program for the design of a twintee frequency selective amplifier (TEFSA). The circuit diagram is shown in Fig. 6. The program optimises the component values to produce a band pass response with a specified centre frequency and band width. The data to be supplied by the user is as follows: (1) Title: This is a list of not more than 100 characters. (2) Centre frequency: This should be specified in Hz with a maximum upper limit of 0.5 MHz.
AUTUMN 1968 B
(7) (8)
fo
and a maximum value
of 20 is allowed. The sensitivity of the circuit's frequency response to component drifts is dependent, to a very large extent, on the required Q. Source resistance: The program attempts to match the input network of the amplifier to this figure. This figure should be in the range 1 k f2 to 10 k l). If there is no specification on this item, it should bet set to 2 k f2. Total board current and transistor standing current: There is an upper limit on transistor standing current of 1 mA, due to restrictions on transistor data. If there is no specification on both or either of these two items, they should be set to 3 and 1 mA respectively. Operating temperature range specified in degrees centigrade: This must be specified in the following order: Upper and Lower temperatures. The maximum operating range is - 2 0 ° C to 70°C. Supply voltage and a percentage regulation of this figure: The supply voltage should not exceed 20 V. Resistor tolerances: Since the circuit is intended for use in thick or thin film form, there are four figures to be specified here: i Applies to all untrimmed (a) the tolerance (~o) (b) the correlation of components components, ~i.e. R1, R2, R3, on a board (~o) R4, RE, RS
i(see Fig. 1) ~Applies to (c) the trimming accuracy (~o) trimmed (d) the temperature co-efficient ~components, (ppm/°C) i.e. R5, R6, R7 (see Fig. 1) (9) Capacitor tolerances: These correspond to items 'c' and 'd' in list 9 except that if discrete capacitors are to be used in the twintee (C1, C2, C3) then a selection tolerance (~o) should be substituted for the trimming accuracy. To assist the user a data form is supplied and an example of this is filled in for a particular requirement, is shown below. 17
Example Parameter 1.
Title
2. 3. 4. 5(a) (b) 6. 7(a) (b) 8. 9.
Centre frequency Q Input resistance Board current Transistor current Temperature range Supply voltage Regulation Resistor specification Capacitor specification
Value
Limits
EXAMPLE OF TEFSA FO = 50 kHz, Q = 15 5 × 104
< 100
BIAS COMPONENTS RE 1,2001o + 02 RS 1.7031o + 04 RI 1.1161o + 04 R2 1,5241o + 02 R3 2.55010 + 04 R4 4,780~o + 03
< 0.5 HMz
!
15 2000
< 20 I kF~ < Ri,< 1 0 k ~
3 × 10-a 1 x 10 -a
none I e < l × 10-a
(a) 50, (b) 0
- 20 < Top < 70°C
12 0'5 (a) 15, (b) 7, (c) 1, (d) 150 (a) 2.5, (b) 15o
Vcc < 20
TWINTEE COMPONENTS R5 2.45010 + 03 R6 2.45010 + 03 R7 1.2271o + 03 CI 1,2001o - 09 C2 2.0001o - 09 C3 2.7001o - 09 WORSTCASE (l) IE IC1 IC2 VCE1 VCE2 FO Q
The computer takes this specification, together with data on the devices to be used (which will in the future be input from the data bank) and then carries out the process shown in Fig. 7. The output from the computer is shown in the next column.
Input specification and additional data
(2) IE ICI IC2 VCE1 VCE2 FO Q
)
Set d.c.circuit to give adequate d.c. stability and required input impedance
I [ I
Carry out worst case d.c. analysis
Carry out worst case a.c. analysis
(
O/P component list and results of worst case analysis Fig. 7
18
CONDITIONS 1.26310 - 03 1.25010 - 03 1.238x0 - 03 1.49110+ 00 8.1191o+ 00 5.245~o + 04 2.335,o + 01 4'89410 4"885xo 4"872xo8'522104"88010+ 4"76510 + 7.5081o +
04 04 04 0l 00 04 oo
Layout
Adjust Twintee components to give amplifier required a.c.response
I
of TEFSA
FO= 50KHZ, Q = 15 Twintee frequency selectiveamplifier Component list
)
When laying out a circuit the designer is concerned with both the mechanical operation of placement of components, and the drawing of, the printed circuit board, or the masks for the thick film substrate, or the masks for the integrated circuit. In addition to this he is also concerned with the effect of the layout on the performance of his circuit. The designer therefore needs two aids: a drawing aid and a calculation aid. The calculation aid should enable him to determine all the things about the layout which are likely to affect his circuit performance, including stray capacitance, lead inductance, stray mutual coupling, the effectiveness of screening the effect of near field screening on the circuit and the flow of earth currents in the earth plane or chassis. Two programs already exist for the calculation of mutual capacitance and self and mutual inductance and these are being extended to include the calculation not only between more complex patterns of conductors but also between discrete components. REDAP 2 calculates capacitance and REDAP 3 calculates inductance. The designer feeds the information about his layout into the computer by breaking down his conductors into sub-areas and then by feeding the co-ordinates of these sub-areas to the computer. Fig. 8 shows an example pattern prepared for the capacitance calculation and the results of the calculation are shown below.
COMPUTER AIDED DESIGN
16
, , , ( , ' -~
1
/.,11 A
',.
j.
lO.
/I
I I
i I
9
.
I
i I
8
.
I
I
(~¢
1/-.
i I
?
.
. 5
i I
! I
I
I
I
.
'
4
I
.3 I
I I
2
.
I
~1
1.
I
il
~'~"CONDUCTOR I
1.2
Y
(ram)
CONDUCTOR 2 10
37136:35 RECTANGLE No. SHOWN T H U S ' ( ~ ) " ~ "
'~
SUB-AREAS ARE NUMBERED
JCTOR 3 (1"38
CONSECUTIVELY FROM 1 TO 47
. I
I
[
2
4
6
I
8
l
I
I
I
I
I
I
l
10
12
14
16
18
20
22
24
Fig. 8
Capacitance Computations Locco Example 1 No. o f sub-areas = 47. Relative Dielectric Constant of Surrounding M e d i u m = 1000 Relative Dielectric Constant o f Substrate/P.C. Board = 5"170 Thickness of Substrate/P.C. Board = 1.590 MM CONDUCTOR I C 1 2 = 3.84971u- 01 PF C 1 3 = 1.23311o - 01 PF CONDUCTOR 2 C 2 1 = 3.84971o - 01 PF C 2 3 = 1.91091o -- 01 PF CONDUCTOR 3 C 3 l = 1.23311o -- 01 PF C 3 2 = 1.91091o - 01 PF The redundant information in the printout is useful when there are a large number of conductors. The program can handle a three dimensional problem by placing sub-areas over the surface of the conductor. It is immediately obvious that one of the problems with this type of program is the production of the table of co-ordinates to provide the information for the computer to work on. The provision of this could be speeded up tremendously by an automated drawing aid and the natural tool for this is the C R T display with the light pen. Fig. 9 shows a portion of an integrated circuit mask created by the use of a CRT. Fig. 10 shows an expanded version of a
AUTUMN 1968
X(mm)
portion of this mask and this will be used to illustrate the method adopted which makes this an extremely powerful aid in layout design. Although it is called a drawing aid, in fact nothing has been drawn. Everything on the mask has been placed by the computer and the designer to an accuracy of one m~cron. The shapes have been created from basic rectangles. The rectangles are called by typing the length, width and layer number on a typewriter and placed on the C R T to an approximate position indicated by the designer with a light pen. The computer places it to an exact position as it stores the co-ordinates of the rectangle on a grid of one micron square. Then, by expanding the picture to maximum expansion and displaying a portion of this grid on the face of the C R T the designer can place the rectangle to an accuracy of one micron anywhere on the picture representing the 4000 micron chip. Complicated shapes can be built up by merging the rectangles and by reproducing shapes and merging them together. Items can be named and may be moved by name or reproduced by name. Different mask layers can be brightened or dimmed, shapes can be rotated, complex patterns can be stored and called for as required and a very complex drawing can be built up very rapidly by the designer working with the computer through the C R T display. Other layout programs adjust the connecting pattern for minimum crossovers and enable discrete components to be moved around on the face of the C R T without losing the connections to them. In all these programs the geometric information is stored in the computer so at any time it should be possible to use calculation programs to determine the layout parameters which are likely to alter the performance of the circuit in its layout. These para-
19
Fig. 9
Fig. 10
meters can then be put to the analysis p r o g r a m s and the overall effect o f the circuit layout calculated. A t the m o m e n t this has to be d o n e by the designer extracting the necessary i n f o r m a t i o n and inputting that i n f o r m a t i o n into the a p p r o p r i a t e program. In the future a control language will be available to assist him to p e r f o r m this operation.
The Future A great deal o f what has been described is already available in the R E D A C service. With 30 engineers and m a t h e m a t i c i a n s w o r k i n g on the service next year, what has been described as possible for the future will rapidly b e c o m e reality. A t the m o m e n t the service is offered on a bureau basis by post, telephone or t h r o u g h the Datel 200 system, or on users o w n c o m p u t e r s by i m p l e m e n t i n g the software for their machines. F a s t e r transmission links are available and will be i m p l e m e n t e d into the service during 1969. D u r i n g 1970 it s h o u l d be possible for r e m o t e users to have n o t only the fast data transmission but also a r e m o t e graphic terminal to enable them to use the vast range o f software which will by then be available for layout and system design. D u r i n g 1969 all the procedures which have been written and used to build up the software d e v e l o p m e n t will be m a d e available for on line users to create their own programs.
Acknowledgments This article has been written a b o u t the w o r k o f a very enthusiastic t e a m o f electronic designers and m a t h e m a ticians at R a c a l R e s e a r c h Ltd. I would have liked to ack n o w l e d g e t h e m individually but this w o u l d take too long. I w o u l d however, like to take this o p p o r t u n i t y o f expressing m y a p p r e c i a t i o n for the way they h a v e w o r k e d together to p r o d u c e w h a t is already a very fine s o f t w a r e package for electronic design. I w o u l d like also to express my appreciation for the assistance o f the Ministry o f T e c h n o l o g y in financing h a l f the p r o g r a m m e o f work, and also for the c o - o p e r a t i o n and assistance we have received f r o m the R o y a l A i r c r a f t E s t a b l i s h m e n t and f r o m the Signals R e s e a r c h and D e v e l o p m e n t Establishment. I a m also grateful for the assistance given to us by T h e Telep h o n e M a n u f a c t u r i n g C o m p a n y Ltd. for the p r e p a r a t i o n o f the integrated circuit layout p r o g r a m . Finally I a m very grateful for the support and e n c o u r a g e m e n t I have received f r o m m y C h a i r m a n , Mr. E. T. Harrison. 1 Kuo, F. F. and Kaiser, J. F.: 'Systems Analysis Computer', R E D A C Users Manual, Volume Research Ltd. ~- Wolfendale, E.: 'Computer-aided Design of Circuits (Iliffe 1968). :~ Calahan, D. A.: Computer Aided Network Design Hill 1968).
by Digital 1, Racal Electronic (McGraw-
Received August, 1868
E. Wolfendale B.Sc.(Eng.), F.I.E.E., F.I.E.R.E., had his introduction to electronics as a Lieutenant in the Royal Signals during the last war. He graduated w i t h a First Class Honours Degree at Battersea College of T e c h n o l o g y and spent six years at the Mullard Research Laboratories on s e m i c o n d u c t o r application research. In 1957 he transferred to Mullard°s S o u t h a m p t o n Works, as Chief A p p l i c a t i o n s Engineer, w h e r e he established the s e m i c o n d u c t o r measurement and application laboratories. I n 1961 he w e n t to Nairobi to organise the Electronics Courses at the University College. On returning in 1965, he j o i n e d Racal Research Ltd., w h e r e he is n o w D e p u t y M a n a g i n g Director. As well as establishing d e v e l o p m e n t and p r o d u c t i o n facilities w i t h this Company, he is also actively engaged in research into the use of digital c o m p u t e r techniques for electronic design.
29
COMPUTER AIDED DESIGN