Construction and qualification of the Power Supply system of the AMS-02 Tracker detector

Construction and qualification of the Power Supply system of the AMS-02 Tracker detector

Nuclear Physics B (Proc. Suppl.) 166 (2007) 234–240 www.elsevierphysics.com Construction and qualification of the Power Supply system of the AMS-02 T...

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Nuclear Physics B (Proc. Suppl.) 166 (2007) 234–240 www.elsevierphysics.com

Construction and qualification of the Power Supply system of the AMS-02 Tracker detector M. Menichellia, L. Accardoa, G. Ambrosia, R. Battistona, M. Bizzarria, S. Blaskoa, D. Cossona, E. M. Fioria, O. Marisa, A. Papia, G. Scolieria. a INFN, Sez. Di Perugia, via Pascoli, 06100 Perugia (Italy). The AMS-02 Tracker power supply system, described in this paper, has been designed optimizing noise performances, modularity and efficiency. The power is distributed starting from a 28V line coming from the power distribution system is converted into the needed voltages by means of DC-DC converters, and for bias supply and front-end voltages is post-regulated by means of linear regulators. Components Off The Shelf (COTS) have been extensively used in the construction of this power supply, however various radiation test campaigns have been performed in order to verify the reliability of these components. The power supply architecture developed for the tracker detector has been used as a guideline for the development of the power supplies for the other detectors in the experiment.

1.

Introduction

The Alpha Magnetic Spectrometer (AMS) experiment will measure the cosmic ray spectrum from 0.5 GeV up to several TeV in space, looking for anti-matter, dark matter and strange quark matter it will be installed on the International Space Station (ISS) in year 2008. The scientific objectives of the experiment are the searches for dark matter, strange quark matter and antimatter. It will also measure the chemical composition for particle charge up to Z=26 and the isotopic composition of Helium, Berillium and Carbon isotopes. A preliminary version of the AMS experiment (known as AMS-01) has been flown on the Space Shuttle Discovery in June 1998 collecting a large set of experimental data (108 triggers), helping the collaboration to validate the instrument and the data analysis procedure. The whole detector is composed by several subdetectors. A superconducting magnet will provide a bending power of BL2 = 0.86 Tm2. Inside this magnet, eight layers (more than 6 m2) of silicon detectors will track the particles with high charge and spatial resolution. The instrument is completed by a TOF, a Ring Imaging Cherenkov detector, a TRD and a calorimeter. The AMS experiment is described in details in ref. [1]

0920-5632/$ – see front matter © 2006 Elsevier B.V. All rights reserved. doi:10.1016/j.nuclphysbps.2006.12.015

2.

The AMS tracker detector

The tracking system of the AMS-02 instrument is based on silicon sensors. Each sensor is a doublesided microstrip silicon detector having dimensions: 40 x 70 mm; and 300 Pm thickness. The sensor are designed using capacitive charge coupling to distribute charge among the various strips which have an implantation pitch of 27.5 Pm on the p-side and 108 Pm on the n-side, while the actual readout pitch is 110 Pm on p-side and 216 Pm on the n-side. The sensors are assembled into ladders. Each ladder is composed of a row of sensors bonded on the long side. On the n-side the strips in the detectors are connected through a Upilex cable that also carries the bias. The n-side of a ladder is also called K-side while the p-side is also called S-side. Under the Upilex cable a foam supports the ladders. Depending on the placement inside the magnet, ladders can be formed by 7 to 15 detectors. Each ladder side is bonded to one PCB: the PCB that hosts the front-end readout circuits for the n-side is called TFEK (Tracker Front End K-side), and the other that hosts the front-end readout circuits for the p-side is called TFES (Tracker Front End S-side). These PCBs contain VA64_HDR9 readout chips from IDEAS. Every front-end chip has 64 readout channels, 16 chips in each ladder: 10 on the TFES

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and 6 on the TFEK. The PCBs that host the frontend chips also host the thermal sensors, the drivers for the analog signal towards the readout electronics, a chip that handles digital commands to the frontend chips (HCC hybrid circuit controller) and decoupling capacitor chips. The entire tracker has 192 ladders distributed in 8 planes, 6 inside the magnetic field one, on the top and one on the bottom for a total of about 200000 channels. The ladders are connected through cables to the readout cards named TDR (Tracker Data Reduction). Since the decoupling capacitor cannot withstand the bias potential (that varies from 60 to 80 Volts), the digitization circuit for the n-side are connected to a potential close to the bias. The decoupling takes place after the ADC using inductive decouplers. The power supply and readout electronics is distributed into 8 subunits, each subunit includes a crate and a tracker power distributor (TPD). Each subunit is capable of independent readout and power distribution for 24 ladders.

3.

The power supply system

3.1. The TPD The power conversion and distribution unit (TPD tracker power distributor) includes the DC-DC converters for the generation of the different voltages needed to operate the tracker detector system (fig.1). It also includes a slow control interface, and an input filter. It takes power from the PDS that transforms the power from the main ISS bus at 124 VDC into a secondary 28VDC power and distributes it to the various AMS-02 detectors. There are three different kind of DC-DC converters in the TPD, all take input from the 28 V coming from the PDS through the S9011B TPD filter:

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Fig.1 the TPD. The S9051 providing r2.5V for the front-end bias and +5.6V for the ADC inside the TDR. Each module displayed is dual and non redundant. There are a total of 4 dual modules 2 for the S-side and 2 for the K-side one single unit of converter for each power group. Each output has 15 mVpp ripple (below 20 MHz) and cross regulation better then 5%.The maximum efficiency is around 78% x The S9055 providing +120V for the bias and r6V for the linear regulator and current measuring system inside the TBS. There are a total of 2 dual S9055 each power half a crate (one TBS) and is cold redundant. The output ripple is 20 mVpp on all output (below 20 MHz) and the cross regulation is below 1% for the bias output and less then 10% for the r6V outputs. x The S9053 providing 3.4 V for the digital electronics. There are a total of 2 dual S9053 each power half a crate (6 TDR) and half a JINF and is cold redundant. The output ripple is 20 mVpp on all output (below 20 MHz) and the load regulation is below 4%. The maximum efficiency is around 79%. The S9011B Tracker Power Distributor Filter is the input filter of each crate. It is fed with one +28VDC power supply by the PDS (Power Distribution Box) and includes two sections for the

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distribution and filtering for the two +28 V power supply branches inside the TPD. Besides the filters, the S9011B includes the circuitry to limit the input capacitors in-rush current at power on. The S9011A Tracker Power Distributor Controller controls the operation and the status of DC-DC converters,. The TPD controller receives two 3.3 V r2% power supplies. These are two completely independent branches, one for each Actel FPGA A54SX32A. A 2.5 V power supply for the FPGA core is obtained from the 3.3 V. The protection is provided by a dedicated SSF (Solid State Fuse). The S9011A TPD controller board communicates with the slow control logic via a MHV100 LeCroy protocol using LVDS physical layer.

Through the TPSFE it is possible to switch off or restart a TDR board.

Fig.2 The TPSFE

3.2. The crate The crate (TEC Tracker Electronic crate) hosting 12 readout and data reduction boards (TDR), 4 linear post-regulator boards for the power distribution to the front-end circuits (TPSFE tracker power supply front-end) 2 post regulator cards for the distribution of the bias (TBS tracker bias supply) and the higher level data reduction and slow control interface (JINF). The Tracker power supply front end (TPSFE) and the Tracker Bias Supply (TBS) are two VMElike boards hosted in the crate that also contains readout, data reduction and the slow control interface board. These boards have VME standard mechanics but different pin assignment in the connectors J1 and J2. The TPSFE (fig.2) is a 12 channel linear regulator board. Each channel provides a +2.1V and a -2.1V volts output; the channels are arranged into two six-channel groups, named K-Side and S-Side respectively. The K-side linear regulator will be kept at the bias voltage of the silicon ladders (60V-80V) from now on called Vbias; the S-side will be kept at ground level (0V) from now on called Ground. Each group features a common floating return (gnd K and gnd S). The linear regulators also have burp mode current protection. The status of each regulator can be monitored via slow control.

The TBS (fig.3) is the board which manages the regulation, control and monitoring of the bias voltages of the silicon detectors. The board regulates and distributes the bias for the detectors. Each board supplies 2 Power Groups (PG).

Fig.3 The TBS. The bias linear regulator receives +120 V r10% from the TPD and regulates it at 80 V r5 %, which can be brought to 60 V r5 % via a control input connected to the FPGA. Moreover the circuit features an OFF/ON input and an output for the voltage monitor.

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The regulator is protected by a foldback limitation with a 500 μA maximum current and a 350PA (@80 V) short circuit current. The regulator ramps up to 80 V in about 7 seconds (with 30 PF on the output). The return regulators have two purposes: establish the operation point of the ladders at –2 V and measure the absorbed current. As for the TPSFE, also for this board the control logic is embedded into a HOT and a COLD FPGA, which are two Actel mod. A54SX32A contained in a TQFP144, and the communication protocol is MHV100 LeCroy protocol through a LVDS physical layer. For a more detailed description of the tracker power supply system see ref.[3]

4.

The qualification tests

In terms of space qualification the power supply system boards have been produced in 4 phases: Phase 1 is Engineering Model (EM) where board are developed and only functional tests are performed, Phase 2 is qualification model 1 (QM1) where the boards are tested for thermo-vacuum, vibration and EMI/EMC at single board level. Phase 3 is qualification model 2 (QM2) where the boards are tested for thermo-vacuum, vibration (ESS test) and EMI/EMC at crate level. Phase 4 flight/spare model (FM/FS) where the boards undergo reduced vibration and thermovacuum test. The qualification tests have been performed in Taiwan, at the military centre CSIST (Chungshan Institute of Science and Technology), and in Terni, Italy, at the SERMS (Studio degli Effetti delle Radiazioni sui Materiali nello Spazio) laboratory. Using the developed slow control and DAQ systems, functional tests have been performed before, during and after all the tests. Before the development of EM radiation test are performed in order to select the electronic components for the design and construction of the boards.

4.1. Radiation tests The use of carefully tested commercial off-theshelf components (COTS) in space payloads flying

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Fig.4 variation of VTH in various type of N-channel MOSFET during the various phases of a TD test . on Low Earth Orbits (LEO) is a possible alternative in order to reduce costs and use state-of-the-art components which are not usually available in space qualified version shortly after their commercial release. However proper testing according to space qualification rules should be performed in order to prove the reliability of the component in the space environment. In our tests, performed for the AMS02 experiment, we have tested several components for

Fig. 5 variation of VTH in two types of Pchannel MOSFET during the various phases of a TD test .

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total dose and single event effects. For total dose we performed our test at the Casaccia (Rome, Italy) [5] laboratory of the ENEA following the guidelines of the ESA specifications [6]. The component is irradiated in three steps the first step is at 1/3 of the total dose of interest the second step is at the dose of interest the third step is at 3 times the dose of interest, then the component undergo annealing at 20 °C for one week and then aging at 80 °C for another week We tested over 100 semiconductor components and the results have been published in several papers [2],[7],[8]. In this paper we would like to mention

gate charging in the two different transistor structures. SEE test have been performed both in Darmstadt (SEL, single event latchup and SEU single event upset) and in Catania (SEGR, single event gate rupture). SEE test have been performed for 77 components and the results are shown on the following papers: [8],[9],[10]. As an example here we would like to show the test SEU for the ACTEL A54SX32A, a component which is widely used in the power supply boards as a glue logic, the cross section is below 2 x 10-4 cm2 (fig. 6).

4.2. The ESS test. The ESS (Environmental stress screening) it is composed of three phases. The first phase is a thermal cycling test in air with the scheme presented in fig. 7 with 10 intermediate thermal cycles. The second phase includes a vibration test lasting 10 minutes for each vibration axe (total 9 minutes) the vibration spectrum is shown in fig. 8.

Fig 6 Cross section versus LET for FPGA ACTEL A54SX32A. the test of several MOFET types, in Fig.4 and 5 the value of VTH for both n-channel and p-channel transistors are shown during the various phases of the test. We can note the decrease of the variation of VTH in N-channel MOSFET and the increase in the P-channel MOSFET due to the different effect of

Fig.8 random vibration spectrum at which the TPD and the crate were tested. The third phase repeats phase one with 5 intermediate cycles. Those test have been performed at CSIST (Chungshan Institute of Science and Technology), Taiwan. Both the TPD and the crate passed the test.

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Fig. 7 thermal cycling scheme of the ESS the table shows the value both for the QM phase (already performed) and for the FM/FS acceptance test (to be performed in the flight hardware. emissions: CE01, CE03, Radiated susceptibility: RS02: RS03: and radiated emissions: RE02. All test were passed except RS03 that has to be repeated with improved shielding.

4.3. The thermo vacuum test After the ESS screening the TPD and the T-crate were tested in thermo-vacuum machine in order to check their capability to efficiently dissipate in vacuum the heat generated during operation. The test was performed in Terni, Italy, at the SERMS (Studio degli Effetti delle Radiazioni sui Materiali nello Spazio) laboratory. TPD and T-crate were thermo-cycled according to the scheme in fig. 9 and no hot spot and thermal runaway were observed; all boards remained functional for the entire duration of the test. The pressure inside the thermo vacuum chamber after a stabilization phase remained under 5 x 10-6 bar.

Fig.9 Thermo-vacuum TEST cycles.

5. 4.4. The EMC/EMI test Various EMI/EMC test were performed at SERMS following the requirement described in the Ref.[4,11].The test were about conducted susceptibility: CS01, CS02, CS06, conducted

Conclusions

The power supply system of the AMS-02 silicon tracker detector has been built and qualified at QM2 level. The only open issue remain the repetition of RS03 test with improved shielding. The construction of the FM/FS boards have started (July 2006). For the acceptance qualification

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test of the flight production a reduced set of qualification test are foreseen and these are the following: x ESS test with the same number of thermal cycles before and after the vibration but with temperature indicated in fig.7 (high storage and operating temperatures lower by 5 °C low storage and operating temperatures higher by 5°C) , vibration test with the same spectrum but time reduced to 2 minutes. x Same thermovacuum test but with temperatures as indicated in the previous point x No EMC/EMI test.

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