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Contact resistance extraction in pentacene thin film transistors
Solid-State Electronics 47 (2003) 259–262 www.elsevier.com/locate/sse
Contact resistance extraction in pentacene thin film transistors Peter V. Necliudov a, Michael S. Shur a,*, David J. Gundlach b, Thomas N. Jackson b a
Rensselaer Polytechnic Institute, CIEEM, Room 9019, CII, 110 8th Street, Troy, NY 12180-3590, USA b Pennsylvania State University, 121 Electrical Engineering East, University Park, PA 16802, USA Received 28 December 2001; received in revised form 7 February 2002; accepted 16 April 2002
Abstract We report on the contact resistances for pentacene thin film transistors with two different designs: top and bottom contact configurations (referred to as TC and BC TFTs, respectively) for two different contact metals (gold and palladium). The extraction was done based on the dependencies of the channel resistances on the gate length and gate voltage. The extracted gold TC TFT contact resistance depends on VGS , but shows no dependence on the drain bias. The TC TFT contact resistance is comparable to or exceeds the channel resistance for channels shorter than approximately 10 lm. The contact resistance of BC TFTs depends both on gate and drain bias. We propose a circuit simulating the BC TFT contact resistance and verify the circuit applicability by extracting and comparing the TFT channel resistances at different drain voltages. Our results reveal an important role played by contact resistances and provide an accurate model of the contact phenomena suitable for implementation in Spice or other circuit simulators. Ó 2002 Elsevier Science Ltd. All rights reserved.
1. Introduction A remarkable progress has been achieved in organic thin film transistor (OTFT) technology (see, for example, a resent report of the field effect mobility as high as 3.2 cm2 /V s [1]). OTFT contact resistance must be also improved in order to make these devices competitive with more conventional amorphous Si and poly-Si TFTs. It was shown earlier [2] that the OTFT design affected the contact performance. Preliminary results of OTFT contact resistance extraction by Klauck [3] demonstrated that OTFT contact resistance was a substantial part of the total TFT resistance; especially for relatively short channel ðL < 15 lmÞ OTFTs. In this paper we present results of contact resistance extraction in the pentacene OTFTs. We also present a
*
Corresponding author. Tel.: +1-518-276-2518; fax: +1-518276-2990. E-mail address: [email protected] (M.S. Shur).
circuit model, simulating contact behavior of pentacene TFTs of two different designs.
2. Top contact and bottom contact pentacene TFT design Both types of the OTFTs, studied in this paper, have a heavily doped nþþ -type silicon substrate serving as a common gate electrode. Thermally grown silicon dioxide of 290 nm thickness serves as the gate dielectric. Pentacene active layer of 50 nm thickness was thermally deposited in vacuum from commercially available prepurified pentacene powder. The fabrication details can be found in Ref. [4]. The pentacene TFT design, referred as top-contact (TC) TFT is presented in Fig. 1(a). The TFTs have either gold or palladium contacts deposited through a shadow mask on top of the as-grown pentacene active layer. The shadow mask was fabricated from a molybdenum foil by laser ablation. The resulting TFT gate lengths, L, defined as a distance between the adjacent parallel contacts, were 160, 110, 90, 80, 60, and 30 lm. The contact width, W, was 1200 lm.
0038-1101/02/$ - see front matter Ó 2002 Elsevier Science Ltd. All rights reserved. PII: S 0 0 3 8 - 1 1 0 1 ( 0 2 ) 0 0 2 0 4 - 6
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Fig. 1. The TC (a) and BC (b) pentacene TFT layouts.
The BC TFTs have palladium contacts, pre-patterned by lift-off process and deposited on the gate dielectric prior to the pentacene active layer deposition (see Fig. 1(b)). The contact metal of 50 nm thickness was deposited by ion-beam sputtering process. The contacts and gate dielectric were clean by ozone and treated by a selfassembling agent before the pentacene active layer deposition [5]. The resulting BC TFTs had L ¼ 110, 60, 30 and 20 lm, with W ¼ 250 lm.
(source þ drain contacts) in series with the channel resistance RCh , which (at low VDS values) is a function of L and VGS . Therefore, the RC is given by the intercept of the total TFT resistance RT ¼ RC þ RCh vs. L plot at L ¼ 0 (see Fig. 3). The extracted RC as a function of VGS is shown in Fig. 4. The RT vs. L graph slope yields a
3. Gold TC TFT contact resistance extraction Fig. 2 shows the output characteristics of the gold (Au) and palladium (Pd) TC TFTs and the Pd BC TFT (L ¼ 60 lm) at the gate–source voltage VGS ¼ 60 V. The Pd TC and BC TFT has a pronounced non-linearity of the output characteristic at low drain–source voltage VDS (jVDS j < 2 V), in contrast to the Au TC TFT characteristic, as Fig. 2 illustrates. Since the Au TC TFT output characteristics do not exhibit the above-mentioned non-linearity, the TC TFT can be modeled as a total contact resistance RC
Fig. 2. The TC and BC pentacene TFT (L ¼ 60 lm) output characteristics (VGS ¼ 60 V).
Fig. 3. Gold TC TFT (W ¼ 1200 lm) total resistance at different VGS as a function of L.
Fig. 4. Extracted gold TC TFT RC and RCh per 10 lm of the channel length (W ¼ 1200 lm).
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value of the intrinsic channel resistance RCh per 1 lm of the gate length. Fig. 4 compares the total contact resistance RC and the channel resistance RCh per 10 lm of the TC TFT gate length (W ¼ 1200 lm). The RCh becomes comparable with the RC at jVGS j > 40 V and therefore performance of TFT with L < 10 lm can be limited by contacts rather than by the intrinsic channel resistance, especially at high gate–source voltages.
4. Palladium TC and BC TFT contact model and resistance extraction Fig. 5 presents the Pd BC TFT ðL ¼ 60 lmÞ output characteristics in the double log scale. The figure shows that the drain current ID / ðVDS Þc (c ¼ 1) up to VDS ¼ 0:1 V. Therefore, we propose a model, consisting of a pair of anti parallel Schottky diodes in series with the contact resistance RC and intrinsic channel resistance RCh , similar to the model we have already proposed for pentacene Pd BC TFT DC characteristic simulations in Ref. [2]. The model, which we use in this paper, has also a pair of shunt resistors RS parallel to the Schottky diodes as well as two resistors RL , responsible for the gate leakage current (see Fig. 6). The RL , related to 1 lm of the contact perimeter, is estimated to be of the order of 1013 X lm and is too large to affect the drain current
Fig. 5. The Pd BC TFT (L ¼ 60 lm) output characteristics in a double log scale.
Fig. 6. A circuit model simulating the BC TFT DC characteristics.
Fig. 7. The channel resistance per 1 lm of the gate length (multiplied by W), extracted for the Pd TC and BC TFTs, as well as for the Au TC TFT.
noticeably. At low jVDS j 6 0:1 V, each Schottky diode contributes to the current conduction very little and, therefore, the BC TFT can be viewed as a pair of resistors RS in series with the RC and Rch . From a plot of RT vs. L, similar to that shown in Fig. 3, it is possible to extract RC;Total ¼ 2RS þ 2RC resistance as well as the intrinsic channel resistance RCh ðVGS Þ, shown in Fig. 7. The extracted Pd BC TFT RC;Total , related to the unit contact width, is about 2:7 109 X lm for the VGS range of interest. When VDS exceeds the circuit Schottky diode turn-on voltage (about 0.6 V), the TFT at jVDS j < jVGS VT j, where VT is the TFT threshold voltage, is a combination of the contact resistance RC and the intrinsic channel resistance RCh . From the graph of the total differential resistance oVDS =oID in the ‘‘linear’’ TFT regime (at 0:6 V < jVDS j < jVGs VT j) vs. L, we extracted RC RS . Therefore, RC;Total 2RS . The RCh per 1 lm of the BC TFT channel length, extracted from the slope of RTotal ðLÞ characteristics, is plotted in Fig. 7. It is comparable to the RCh extracted from the BC TFT output characteristics at small VDS , taking into account measurement errors, in particular due to the threshold voltage shift with the TFT operation time [6]. This result can be interpreted that the proposed TFT equivalent circuit and the resistance extraction procedure are adequate to explain the measured TFT DC characteristics. The RC , extracted as a difference between the total BC TFT differential resistance in the ‘‘linear’’ TFT regime and the channel resistance RCh L, is of the order of 108 X lm and does not depend on VGS , as Fig. 8 illustrates. The Pd TC TFT output characteristics look qualitatively similar to the Pd BC TFT ones, shown in Fig. 5. Because of the TC TFT design, the RS and RC in circuit in Fig. 6 are the VGS dependent, similar to the RC of the Au TC TFTs (see Fig. 4). We can speculate that the external electric field, induced by VGS bias, modifies the current conduction properties of the TFT regions under contacts. Fig. 7 shows the RCh (extracted at
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Fig. 8. The RC values (multiplied by W) extracted for the Pd TC and BC TFTs.
jVDS j ¼ 0:1 V and in ‘‘linear’’ TFT regime) per 1 lm of the channel length for the Pd TC TFTs and compares it with those for the Pd BC and Au TC TFTs. The Pd and Au TC TFT RCh dependencies on VGS are similar, as expected, as those samples were fabricated during the same fabrication run and therefore have the same active region material. The difference in the RCh (multiplied by W) for the TC and BC TFT is primarily due to the channel mobility difference for those samples, fabricated by different fabrication runs. It is also possible to extract the TFT intrinsic channel mobility from the RCh data. The mobility values and extraction procedure are beyond the scope of this paper, and will be published elsewhere. The Pd TC TFT RC value, extracted as described above, is shown in Fig. 8 as function of VGS . The RC value for the Pd BC TFT does not depend on VGS , and exceeds that for the Pd TC TFT at jVGS j > 20 V, as Fig. 8 illustrates.
5. Conclusion We presented results of the contact resistance extraction for Pd and gold TC and Pd BC pentacene
TFTs. The extracted gold TC TFT contact resistance depends on VGS , but shows no dependence on VDS . The TFT contact resistance is comparable to or exceeds the channel one at L < 10 lm. Therefore, performance of a relatively short-channel (L < 10 lm) Au TC TFT can be limited by the contacts instead of the channel. We propose a circuit simulating the BC TFT contact resistance, which is drain bias and gate bias dependent. We verified the circuit applicability by extracting and comparing the TFT channel resistances at jVDS j ¼ 0:1 V and in the ‘‘linear’’ 0:1 V < jVDS j < 1 V regime of the TFT operation. Despite higher initial series resistance RS for the Pdcontact TFTs, the series resistance RC in the ‘‘linear’’ region of the TFT operation is much smaller and only several times larger that the gold TC TFT series resistance. In addition, the series resistance RC for the Pd TC TFT depends on VGS and can be several times smaller than that for the Pd BC TFT at jVGS j > 20 V.
Acknowledgements DARPA (Program Monitor Dr. G. Henderson) has supported this research under contract #N 61331-98-C0021 via subcontract from Sarnoff Corporation.
References [1] Schon JH, Kloc Ch, Batlogg B. Org Electron 2000;1:57. [2] Necliudov PV, Shur MS, Gundlach DJ, Jackson TN. J Appl Phys 2000;88:6594. [3] Klauk H, private communications. [4] Lin YY, Gundlach DJ, Nelson SF, Jackson TN. IEEE Trans Electron Dev 1997;44(8):320–5. [5] Jackson TN, Lin YY, Gundlach DJ, Klauk H. IEEE J Sel Top Quant Electron 1998;4:100. [6] Necliudov PV, Shur MS, Gundlach DJ, Jackson TN. MRS Fall 2000 Meeting, Symposium JJ, Abstract #JJ 7.10, 2000.
Contact resistance extraction in pentacene thin film transistors Peter V. Necliudov a, Michael S. Shur a,*, David J. Gundlach b, Thomas N. Jackson b a
Rensselaer Polytechnic Institute, CIEEM, Room 9019, CII, 110 8th Street, Troy, NY 12180-3590, USA b Pennsylvania State University, 121 Electrical Engineering East, University Park, PA 16802, USA Received 28 December 2001; received in revised form 7 February 2002; accepted 16 April 2002
Abstract We report on the contact resistances for pentacene thin film transistors with two different designs: top and bottom contact configurations (referred to as TC and BC TFTs, respectively) for two different contact metals (gold and palladium). The extraction was done based on the dependencies of the channel resistances on the gate length and gate voltage. The extracted gold TC TFT contact resistance depends on VGS , but shows no dependence on the drain bias. The TC TFT contact resistance is comparable to or exceeds the channel resistance for channels shorter than approximately 10 lm. The contact resistance of BC TFTs depends both on gate and drain bias. We propose a circuit simulating the BC TFT contact resistance and verify the circuit applicability by extracting and comparing the TFT channel resistances at different drain voltages. Our results reveal an important role played by contact resistances and provide an accurate model of the contact phenomena suitable for implementation in Spice or other circuit simulators. Ó 2002 Elsevier Science Ltd. All rights reserved.
1. Introduction A remarkable progress has been achieved in organic thin film transistor (OTFT) technology (see, for example, a resent report of the field effect mobility as high as 3.2 cm2 /V s [1]). OTFT contact resistance must be also improved in order to make these devices competitive with more conventional amorphous Si and poly-Si TFTs. It was shown earlier [2] that the OTFT design affected the contact performance. Preliminary results of OTFT contact resistance extraction by Klauck [3] demonstrated that OTFT contact resistance was a substantial part of the total TFT resistance; especially for relatively short channel ðL < 15 lmÞ OTFTs. In this paper we present results of contact resistance extraction in the pentacene OTFTs. We also present a
*
Corresponding author. Tel.: +1-518-276-2518; fax: +1-518276-2990. E-mail address: [email protected] (M.S. Shur).
circuit model, simulating contact behavior of pentacene TFTs of two different designs.
2. Top contact and bottom contact pentacene TFT design Both types of the OTFTs, studied in this paper, have a heavily doped nþþ -type silicon substrate serving as a common gate electrode. Thermally grown silicon dioxide of 290 nm thickness serves as the gate dielectric. Pentacene active layer of 50 nm thickness was thermally deposited in vacuum from commercially available prepurified pentacene powder. The fabrication details can be found in Ref. [4]. The pentacene TFT design, referred as top-contact (TC) TFT is presented in Fig. 1(a). The TFTs have either gold or palladium contacts deposited through a shadow mask on top of the as-grown pentacene active layer. The shadow mask was fabricated from a molybdenum foil by laser ablation. The resulting TFT gate lengths, L, defined as a distance between the adjacent parallel contacts, were 160, 110, 90, 80, 60, and 30 lm. The contact width, W, was 1200 lm.
0038-1101/02/$ - see front matter Ó 2002 Elsevier Science Ltd. All rights reserved. PII: S 0 0 3 8 - 1 1 0 1 ( 0 2 ) 0 0 2 0 4 - 6
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Fig. 1. The TC (a) and BC (b) pentacene TFT layouts.
The BC TFTs have palladium contacts, pre-patterned by lift-off process and deposited on the gate dielectric prior to the pentacene active layer deposition (see Fig. 1(b)). The contact metal of 50 nm thickness was deposited by ion-beam sputtering process. The contacts and gate dielectric were clean by ozone and treated by a selfassembling agent before the pentacene active layer deposition [5]. The resulting BC TFTs had L ¼ 110, 60, 30 and 20 lm, with W ¼ 250 lm.
(source þ drain contacts) in series with the channel resistance RCh , which (at low VDS values) is a function of L and VGS . Therefore, the RC is given by the intercept of the total TFT resistance RT ¼ RC þ RCh vs. L plot at L ¼ 0 (see Fig. 3). The extracted RC as a function of VGS is shown in Fig. 4. The RT vs. L graph slope yields a
3. Gold TC TFT contact resistance extraction Fig. 2 shows the output characteristics of the gold (Au) and palladium (Pd) TC TFTs and the Pd BC TFT (L ¼ 60 lm) at the gate–source voltage VGS ¼ 60 V. The Pd TC and BC TFT has a pronounced non-linearity of the output characteristic at low drain–source voltage VDS (jVDS j < 2 V), in contrast to the Au TC TFT characteristic, as Fig. 2 illustrates. Since the Au TC TFT output characteristics do not exhibit the above-mentioned non-linearity, the TC TFT can be modeled as a total contact resistance RC
Fig. 2. The TC and BC pentacene TFT (L ¼ 60 lm) output characteristics (VGS ¼ 60 V).
Fig. 3. Gold TC TFT (W ¼ 1200 lm) total resistance at different VGS as a function of L.
Fig. 4. Extracted gold TC TFT RC and RCh per 10 lm of the channel length (W ¼ 1200 lm).
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value of the intrinsic channel resistance RCh per 1 lm of the gate length. Fig. 4 compares the total contact resistance RC and the channel resistance RCh per 10 lm of the TC TFT gate length (W ¼ 1200 lm). The RCh becomes comparable with the RC at jVGS j > 40 V and therefore performance of TFT with L < 10 lm can be limited by contacts rather than by the intrinsic channel resistance, especially at high gate–source voltages.
4. Palladium TC and BC TFT contact model and resistance extraction Fig. 5 presents the Pd BC TFT ðL ¼ 60 lmÞ output characteristics in the double log scale. The figure shows that the drain current ID / ðVDS Þc (c ¼ 1) up to VDS ¼ 0:1 V. Therefore, we propose a model, consisting of a pair of anti parallel Schottky diodes in series with the contact resistance RC and intrinsic channel resistance RCh , similar to the model we have already proposed for pentacene Pd BC TFT DC characteristic simulations in Ref. [2]. The model, which we use in this paper, has also a pair of shunt resistors RS parallel to the Schottky diodes as well as two resistors RL , responsible for the gate leakage current (see Fig. 6). The RL , related to 1 lm of the contact perimeter, is estimated to be of the order of 1013 X lm and is too large to affect the drain current
Fig. 5. The Pd BC TFT (L ¼ 60 lm) output characteristics in a double log scale.
Fig. 6. A circuit model simulating the BC TFT DC characteristics.
Fig. 7. The channel resistance per 1 lm of the gate length (multiplied by W), extracted for the Pd TC and BC TFTs, as well as for the Au TC TFT.
noticeably. At low jVDS j 6 0:1 V, each Schottky diode contributes to the current conduction very little and, therefore, the BC TFT can be viewed as a pair of resistors RS in series with the RC and Rch . From a plot of RT vs. L, similar to that shown in Fig. 3, it is possible to extract RC;Total ¼ 2RS þ 2RC resistance as well as the intrinsic channel resistance RCh ðVGS Þ, shown in Fig. 7. The extracted Pd BC TFT RC;Total , related to the unit contact width, is about 2:7 109 X lm for the VGS range of interest. When VDS exceeds the circuit Schottky diode turn-on voltage (about 0.6 V), the TFT at jVDS j < jVGS VT j, where VT is the TFT threshold voltage, is a combination of the contact resistance RC and the intrinsic channel resistance RCh . From the graph of the total differential resistance oVDS =oID in the ‘‘linear’’ TFT regime (at 0:6 V < jVDS j < jVGs VT j) vs. L, we extracted RC RS . Therefore, RC;Total 2RS . The RCh per 1 lm of the BC TFT channel length, extracted from the slope of RTotal ðLÞ characteristics, is plotted in Fig. 7. It is comparable to the RCh extracted from the BC TFT output characteristics at small VDS , taking into account measurement errors, in particular due to the threshold voltage shift with the TFT operation time [6]. This result can be interpreted that the proposed TFT equivalent circuit and the resistance extraction procedure are adequate to explain the measured TFT DC characteristics. The RC , extracted as a difference between the total BC TFT differential resistance in the ‘‘linear’’ TFT regime and the channel resistance RCh L, is of the order of 108 X lm and does not depend on VGS , as Fig. 8 illustrates. The Pd TC TFT output characteristics look qualitatively similar to the Pd BC TFT ones, shown in Fig. 5. Because of the TC TFT design, the RS and RC in circuit in Fig. 6 are the VGS dependent, similar to the RC of the Au TC TFTs (see Fig. 4). We can speculate that the external electric field, induced by VGS bias, modifies the current conduction properties of the TFT regions under contacts. Fig. 7 shows the RCh (extracted at
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Fig. 8. The RC values (multiplied by W) extracted for the Pd TC and BC TFTs.
jVDS j ¼ 0:1 V and in ‘‘linear’’ TFT regime) per 1 lm of the channel length for the Pd TC TFTs and compares it with those for the Pd BC and Au TC TFTs. The Pd and Au TC TFT RCh dependencies on VGS are similar, as expected, as those samples were fabricated during the same fabrication run and therefore have the same active region material. The difference in the RCh (multiplied by W) for the TC and BC TFT is primarily due to the channel mobility difference for those samples, fabricated by different fabrication runs. It is also possible to extract the TFT intrinsic channel mobility from the RCh data. The mobility values and extraction procedure are beyond the scope of this paper, and will be published elsewhere. The Pd TC TFT RC value, extracted as described above, is shown in Fig. 8 as function of VGS . The RC value for the Pd BC TFT does not depend on VGS , and exceeds that for the Pd TC TFT at jVGS j > 20 V, as Fig. 8 illustrates.
5. Conclusion We presented results of the contact resistance extraction for Pd and gold TC and Pd BC pentacene
TFTs. The extracted gold TC TFT contact resistance depends on VGS , but shows no dependence on VDS . The TFT contact resistance is comparable to or exceeds the channel one at L < 10 lm. Therefore, performance of a relatively short-channel (L < 10 lm) Au TC TFT can be limited by the contacts instead of the channel. We propose a circuit simulating the BC TFT contact resistance, which is drain bias and gate bias dependent. We verified the circuit applicability by extracting and comparing the TFT channel resistances at jVDS j ¼ 0:1 V and in the ‘‘linear’’ 0:1 V < jVDS j < 1 V regime of the TFT operation. Despite higher initial series resistance RS for the Pdcontact TFTs, the series resistance RC in the ‘‘linear’’ region of the TFT operation is much smaller and only several times larger that the gold TC TFT series resistance. In addition, the series resistance RC for the Pd TC TFT depends on VGS and can be several times smaller than that for the Pd BC TFT at jVGS j > 20 V.
Acknowledgements DARPA (Program Monitor Dr. G. Henderson) has supported this research under contract #N 61331-98-C0021 via subcontract from Sarnoff Corporation.
References [1] Schon JH, Kloc Ch, Batlogg B. Org Electron 2000;1:57. [2] Necliudov PV, Shur MS, Gundlach DJ, Jackson TN. J Appl Phys 2000;88:6594. [3] Klauk H, private communications. [4] Lin YY, Gundlach DJ, Nelson SF, Jackson TN. IEEE Trans Electron Dev 1997;44(8):320–5. [5] Jackson TN, Lin YY, Gundlach DJ, Klauk H. IEEE J Sel Top Quant Electron 1998;4:100. [6] Necliudov PV, Shur MS, Gundlach DJ, Jackson TN. MRS Fall 2000 Meeting, Symposium JJ, Abstract #JJ 7.10, 2000.