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Controllable analog emulator for power system analysis
Electrical Power and Energy Systems 33 (2011) 1675–1685
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Electrical Power and Energy Systems journal homepage: www.elsevier.com/locate/ijepes
Controllable analog emulator for power system analysis Aaron St. Leger a,⇑, Anthony Deese b, Jeffrey Yakaski c, Chika Nwankpa d a
Department of Electrical Engineering and Computer Science, United States Military Academy, West Point, NY, USA Department of Electrical and Computer Engineering, The College of New Jersey, Ewing, NJ, USA c Lockheed Martin Corporation, Moorestown, NJ, USA d Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA b
a r t i c l e
i n f o
Article history: Received 25 January 2008 Received in revised form 22 June 2011 Accepted 12 August 2011 Available online 8 October 2011 Keywords: Analog computers Analog processing circuits Power system modeling Power system simulation
a b s t r a c t This paper details the development of a controllable analog emulator for power system analysis. The emulator consists of reconfigurable analog hardware for power system emulation and a digital computer, along with associated software, for configuration, control, calibration and data acquisition. The analog hardware is fully controllable via the software interface. System parameters, initial conditions, integration, faults and contingencies can be created or altered via the software with no changes or manual intervention to the analog hardware. This advance overcomes one of the larger drawbacks of older analog computers, which was the need for manual configuration and calibration. The emulation methodology is presented in this paper as well as power system modeling, both theoretical and in analog hardware. The software interface and control is also presented. To validate the operation of the emulator two examples are shown from a prototype emulator. The first being a steady state power flow solution, the second computes the critical clearing time of a generator fault for transient stability. Published by Elsevier Ltd.
1. Introduction With current technology the computation of large power systems is time intensive. There are numerous analog and digital computation methods currently utilized but they fail to meet the growing computational demands of power systems, particularly in system operations. For example, transient stability is a continued field of research [1–3] with much focus on faster, more efficient calculation techniques. The power grid is expanding which is increasing the necessity and complexity of contingency studies. Current techniques often rank [4] contingencies and only perform analysis on a subset of the scenarios assumed to be more dangerous. Faster calculation techniques will allow for more thorough contingency analyses. Economic analyses are also demanding a tremendous computational burden. Traditional digital methods are too slow to solve the aforementioned demands quickly at a reasonable cost. Cluster and parallel computing techniques have been proposed [5,6] but the cost increases exponentially with the size of the system and the increase in computation performance does not increase at this same rate. Conversely, existing analog simulators can easily simulate the power system in real time but consist of many analog components and require manual intervention to
⇑ Corresponding author. E-mail address: [email protected] (A. St. Leger). 0142-0615/$ - see front matter Published by Elsevier Ltd. doi:10.1016/j.ijepes.2011.08.007
setup and configure the system for each calculation. A controllable real-time computation tool, or faster than real-time, is preferable. Currently, digital simulation is the prevalent method for several reasons. These include (i) the emergence of personal computers (PC) has made this technology reliable and easy to operate, (ii) advances in very large scale integration (VLSI) technology have allowed the development of new parallel computers with performance comparable to that of supercomputers at a fraction of the cost, and (iii) the highly programmable nature of digital computers. In digital simulation the set of algebraic expressions, which describe power system behavior, are discretized and software algorithms (such as Newton–Raphson) utilize input parameters to calculate the steady-state solution. Presently for large-scale systems, studies are performed with several types of massively parallel computers [7–12]. The use of digital simulation analysis is seriously inhibited by lengthy computational times inherent to the iterative algorithms they employ and the large cost of hardware and operating costs of massively parallel digital computers. New technological developments have facilitated research in the further development of analog computational tools to achieve fast computations at lower cost. A new approach has been proposed as to how analog technology may be utilized to perform analysis for large power systems [13,14]. In addition, recent work has developed general purpose analog processor for use in conjunction with a digital computers [15] to improve computational performance. The main advantage of analog computers is their shorter computational time. In this
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work, through the use of reconfigurable analog tools such as operational transconductance amplifiers (OTAs), accompanying circuit models for power system components such as generators [16], transmission lines [17], loads [18], and control and data acquisition circuitry and software, a fully controllable analog emulator for power system analysis has been developed. This emulator is suitable for transient and steady-state power system analysis. Example applications for this tool would be transient stability and contingency analysis. The next section of this paper provides an overview of the DC emulation methodology utilized in this power system emulator. Following this, details of the power system emulator are presented. An overview is then provided on the power system models in the DC emulation environment. In addition, the associated analog hardware realizations of these models are shown. Next, a summary of the data acquisition, control and calibration of the hardware is presented along with the software interface to the emulator. This is followed by the presentation of a couple examples, discussion and conclusion. 2. DC emulation The emulator presented here utilizes a DC emulation method for power system analysis. This emulation method has been proposed in [13] and is reviewed here for an understanding of the emulator presented in this paper. This approach utilizes multiple DC resistive networks to emulate an AC power system network in rectangular coordinates with DC voltages and currents. With fixed resistor values this emulation method assumes a constant system frequency, although with the hardware realization of these networks parameters can be varied based on frequency, temperature, or other factors. The DC emulation is based on the following equation solved in rectangular coordinates:
I ¼ Y V ¼ IRe þ jIIm
3. Power system emulator The power system emulator is shown in a block diagram form in Fig. 2. The emulator consists of a digital computer with custom software designed for data acquisition and control of the analog emulator, data acquisition and control circuitry and the analog emulation hardware. The next subsections provide details of each component of the emulator. 3.1. Power system model The power system model utilized in this emulator is broken up into three main components: generators, transmission lines, and loads. There is ongoing research developing other components, such as transformers, but the emulator presented here consists of these three elements. The interconnections of these three elements result in the power system model for emulation. The generators and loads are represented as dependent DC voltage sources and the transmission lines as resistive networks whose parameters are relative to line parameters. The generators and loads excite the networks with real and imaginary DC voltage components and the states (voltages and currents) of the resistive networks provide the AC power flows through the network. These components were modeled mathematically within the DC emulation environment and then controllable analog circuits were constructed based on these models. 3.2. Transmission lines Transmission lines constitute the power system network in the emulator. Lumped equivalent models are employed. A pi model is shown in Fig. 3. To translate this into the DC emulation scheme the line parameters are separated into real and imaginary components. This yields the resistor values for the DC emulation networks. For the series elements [17]:
¼ ðY Re V Re Y Im V Im Þfreal currentg þ jðY Im V Re þ Y Im V Re Þ fimaginary currentg
ð1Þ
where the subscripts ‘‘Re’’ and ‘‘Im’’ refer to real and imaginary components respectively. A diagram of the emulation networks highlighting the voltages applied to each network is shown in Fig. 1. Each of the four current components seen in (1) is represented in emulation by a DC voltage dropped across a resistive element. This results in four DC resistive networks. Power injections into the resistive network are modeled as dependant voltage sources.
Fig. 1. DC emulation networks.
1 RReðijÞ ¼ RefY ¼ ij g
RImðijÞ ¼
1 ImfY ij g
¼
R2ij þX 2Lij Rij R2ij þX 2Lij
ð2Þ
:
X Lij
For the shunt elements:
RReðikÞ ¼ RReðjkÞ ¼ RefY1
jk;ik g
RImðikÞ ¼ RImðjkÞ ¼
1 ImfY jk;ik g
¼ r jk ¼ x1 ¼ X C jk C
:
ð3Þ
jk
The emulation networks can be constructed based on the line parameters and Eqs. (2) and (3). The topology of each DC network will mimic the topology of the power system. For example, for the pi model shown here the analogous section DC emulation network will have a pi form. For a network of many transmission lines the required resistance values and network topology are developed in the same fashion. In circuit form a network of resistors, or potentiometers, would require manual intervention to configure and alter the emulator for a given computation. In addition, there is a requirement for negative resistance when modeling shunt capacitive elements of the transmission lines. A hardware design with active devices that achieves remote reconfigurability and negative resistance has been developed. The circuits are OTA-based reconfigurable variable positive and negative resistive circuits. OTAs are voltage controlled current sources (VCCSs) with a controllable transconductance gain (gm). More specifically, io = gmvin where io is the output current and vin the input voltage. The gain is controllable via a bias current (iabc). A double ended OTA variable resistor [19] based on the LM13700 OTA is shown in Fig. 4. The LM13700 was utilized due to its low cost and
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Fig. 2. Power system emulator diagram.
R
i
jω L
j
+
V1
+ 1 jω C
1 jω C
r
V2
r
-
I-V Characteristic
800 600
I2 Line Current (uA)
I1
400 200 0 -200 -400 -600 -800
-
-5
-4
-3
-2
-1
0
1
2
3
4
5
Line Voltage (Volts)
k
Positive OTA Resistor
Negative OTA Resistor
Fig. 3. Pi equivalent transmission line model. Fig. 5. OTA variable resistor circuits I–V characteristic.
representing the line out of service. In addition faults that are modeled by impedances can also be implemented in the DC emulation network utilizing a similar modeling process and analog hardware.
commercial availability. This was important for the purpose of developing a hardware prototype. The circuit shown in Fig. 4 behaves like a potentiometer with the bias current analogous to the wiper terminal. The effective resistance of this circuit (Reff), which is the resistance seen between the terminals V1 and V2 is determined by [17]:
Reff ¼
ðV 1 V 2 Þ 2R þ Ra ¼ i0 Ra g m
3.3. Generators The generators provide power injections into the DC emulation networks and are modeled based largely on the classical generator model. More specifically, the generators are based on the 2nd order swing equation:
ð4Þ
A negative resistance circuit was developed with the same design by switching the polarity of the OTA inputs, which results in reversing the current flow. The I–V characteristic of the OTA positive and negative resistance circuits is plotted in Fig. 5. The device saturates as the output current approaches the bias current but is fairly linear within a small range. In emulation this device is operated in a linear region, which is approximately between ±1 volt. It is necessary to scale power system dependent states through their parameters such that the OTAs operate in the linear region, failing to do so results in computational errors. By constructing the four DC emulation networks with variable resistive circuits the network parameters in the emulator are fully controllable and reconfigurable via the transconductance gain of the OTAs. Line outages can also be obtained by setting the bias current to zero for all OTAs
R
M€d þ Dd_ þ Pe ðdÞ ¼ Pm
ð5Þ
where M is the generator inertia coefficient, D is the damping coefficient, Pe is the electrical power output and Pm is the mechanical input power. The generator angle is solved for based on the difference between the mechanical input power, which is specified, and the electrical power output, which is measured from the DC emulation networks. With damping neglected (D = 0), this results in:
d¼
1 M
Z Z
ðPm Pe ðdÞÞdtdt
where Pe (d) is related to the current injection into the network, specified generator voltage magnitude |E| and the generator angle d as follows [16]:
R RA
+V cc
-
-
+
+
OTA
-V cc
ð6Þ
+
OT A
+ i0
+V cc
V1
iabc
i0
iabc -
V2
V1
i0
-V cc
Fig. 4. OTA variable resistor circuit.
V2
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RefSg ¼ RefV I g Pe ¼ ERe IRe þ EIm IIm
:
ð7Þ
Pe ¼ jEj cos d RefIg þ jEj sin d ImfIg The analog hardware computes the generator angle and applies the appropriate voltages to the DC emulation networks. A block diagram of the analog hardware is shown in Fig. 6. The hardware consists of reconfigurable OTA based integrators to compute the swing equation, reconfigurable voltage sources to specify Pm and |E|, analog adders, multipliers and current sensors to compute Pe along with voltage controlled current sources (VCCSs), voltage controlled voltage sources (VCVSs) and current controlled voltage sources (CCVSs) to condition the signals as necessary. In addition, integration can be remotely controlled to on/off states and initial conditions can be set and applied to the integrators. The process of computation consists of initializing the integrators with initial conditions, applying voltages to the DC emulation networks and then turning on integration. In addition, ground faults can be created at the generator terminal via the switch shown in the diagram. By opening the switch the electrical power in the feedback loop goes to zero simulating a ground fault at the generator terminal.
For the aggregate load model, however, injection may be dependent on several factors including the current injection or load impedance at a given operating point. The power injection, as defined by the popular ZIP model, is shown in (10) [21].
Si ,complex load power injection from bus i Ii ,complex load current injection load from bus i Yi ,complex load impedance load at bus i 2 SInj i ¼ Si þ V i ðIi Þ jV ii j ðY i Þ :
3.4. Loads In this paper, the authors utilize an aggregate load model for which all loads at a given bus are represented by a single complex power injection. The load is modeled as a power injection similar to the generators. A figure showing a power injection into bus i is shown in Fig. 7. The load dynamic behavior is described by a decoupled exponential recovery model based on the operation of induction motor loads. Within this model, bus voltage magnitude and angle are expressed as functions of complex power flow, complex power injection, and time [20].
bMag i bAng i
Fig. 7. Simple description of power system bus i.
The basic design of the load emulator is shown in Fig. 8. It is a compilation of four sub-circuits, of which the first is the network interface. The second sub-circuit utilizes the current flows and load bus voltage supplied by the interface to calculate the complex power flow leaving the load bus, as shown in (12).
Ii ¼ complex current flow from bus i Ii ¼ IiRe þ jIiIm
ð11Þ
Si ¼ Vi Ii ¼ ðV iRe þ jV iIm ÞðIiRe jIiIm Þ ¼ . . .
¼ recovery rate constant of voltage magnitude
. . . ¼ ðV iRe IiRe þ V iIm IiIm Þ þj ðV iIm IiRe V iRe jIiIm Þ |fflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{zfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl} |fflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{zfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}
¼ recovery rate constant of voltage angle
Pi
djV i j ¼ bMag ðQ i Q Inj i Þ i dt
ð8Þ
dhi ðPi PInj ¼ bAng i i Þ: dt
ð9Þ
Fig. 6. Generator model circuit implementation diagram.
ð10Þ
ð12Þ
Qi
The third sub-circuit utilizes this power flow in conjunction with the user defined power injection to update the voltage at the load bus, through integration as defined in (8) and (9). The fourth sub-circuit takes this updated voltage and, using a set of
Fig. 8. Load model circuit implementation diagram.
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cosine and sine shapers, converts it from a polar to a rectangular form, as required by the network interface [22,23]. The load model for emulation, as shown in Fig. 8, is capable of mimicking the behavior of a PQ type load, however it does not incorporate the behavior of the ZIP model shown in Eq. (10). To include this behavior, a set of multipliers and summing devices is used.
conducted only when this digital flag indicates a violation; otherwise the system is operating within predefined limits. With this advancement in data acquisition and control of the analog hardware a flexible calibration process was developed.
3.5. Control and data acquisition
In this section, an overview of the emulator’s calibration capabilities is provided. One of the main problems with classic analog computers was the methods and requirements of calibration. The initial configuration and calibration was accomplished by manual measurements and manipulation of jumpers, gain settings, potentiometers, etc. This process was error prone and time consuming. In addition, as the analog computer was used the temperature of the components changed and altered their behavior due to temperature dependence of parameters. Recalibrations were necessary to properly correct for these effects. Through the use of modern components and the control and data acquisition the calibration and performance of this analog emulator is greatly improved in comparison to classical methods. There has been extensive research into eliminating temperature dependencies in CMOS devices. Methods to compensate for or eliminate temperature effects have been developed and implemented in modern devices. In addition, the effects of temperature on OTAs gain are nearly eliminated through the use of linearizing diodes as exhibited in [19]. By taking advantage of these advancements a modern analog computer will inherently have much better performance than traditional analog computers. Calibration methods have also been enhanced in this work by taking advantage of the controllable analog hardware to improve performance even further. A calibration method has been developed which is quick, accurate and can be automated via software in this analog emulator. The calibration utilizes the remote control and data acquisition of the emulator. For the OTA variable resistors, which emulate the power system network, calibration is conducted by configuring the circuits, applying voltages to the network and finally measuring the line current and computing the actual resistance of the circuit. The circuit is then tuned via the OTA bias current until the circuit resistance matches the desired value. For the generators and loads a similar process is carried out. One calibration test eliminates the effects of the OTA offset in the integrators. To do this for a generator numerous mechanical input powers are specified, applied to the circuit and electric output power measured. Based on the differences between the mechanical input power and measured electrical output power the control (mechanical input power) is tuned to match the behavior of the circuit. These calibrations, among others utilized and in development, can be implemented and automated via the software interface. Calibration can also be run at periodic intervals to help eliminate any drift in the analog components that occur during emulator operation and aging of components.
In this section, we explain the scheme implemented to acquire data and control the power system emulator. The control of the emulator consists of two main stages: configuration/reconfiguration and actuation. Essentially the emulator parameters are all configured, or reconfigured if changes are being made for a subsequent computation, and then when all parameters have been set the computation is actuated. More specifically, the integrators are turned on and the system response provides the solution. The configuration only needs to be done once and multiple computations can be conducted with minimal change in the system. For example, the line parameters once set will not need to be changed every time a power flow case is run. Line or generator outages can be emulated by just turning off the specified line(s) or generator(s) and leaving the rest of the system alone. The control of the analog hardware is handled via a digital computer. A figure showing the control method and interaction between the digital and analog hardware is shown in Fig. 9. It is shown that the digital computer feeds data into a D/A converter, which then goes into a de-multiplexer (DEMUX) to the analog components of the emulator for configuration. For a single D/A converter and DEMUX combination, this is a serial process. The computer provides a single signal to configure a device and the DEMUX is controlled directly by the computer to select which analog device to configure. The DEMUX latches the outputs to maintain the proper configuration as it cycles through the devices. Multiple D/A converters and de-multiplexers can be utilized in parallel to speed up this process. The actuation of the analog hardware is accomplished through a digital signal that turns on the integrators for generators and loads. The system has the capability of individually actuating each component. The data acquisition is also handled via a digital computer. The data acquisition scheme is detailed in Fig. 10. The analog data acquisition hardware extracts and conditions data from the analog emulation hardware for measurement via the digital computer. As system size increases the emulation time has been shown to remain the same [23] although both the data acquisition and configuration time will increase linearly. This process can be sped up via incorporating parallel combinations of A/D converters/multiplexers and D/A converters/de-multiplexers. In addition, for some analyses data acquisition is not necessary for all computations. For example, when conducting contingency analysis a digital flag can be used in hardware to indicate a system violation (e.g. over current, under voltage, etc.). Data acquisition needs to be
3.6. Calibration
Fig. 9. Emulator control scheme.
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Fig. 10. Emulator data acquisition scheme.
3.7. Software interface An overview has been provided on the hardware configuration, control and data acquisition, and calibration of the power system emulator. This section details the functionality of the software interface. The software interface is where the end user operates the emulator. This software was developed within National Instruments LabVIEW [24] environment. A flow chart of the software operation is shown in Fig. 11. The first step is to input the power system parameters (i.e. system topology, transmission line impedances and limits, generator and load parameters, etc.) along with case information. Case information includes initial conditions, topology for a given case (this will change on a case by case basis during contingency
analysis), power injections, faults and/or system disturbances, etc. Once all of this information is provided, the emulator can be configured and run for all the cases. The running of the emulator consists of a few steps. First and foremost the power system parameters and states must be scaled to appropriate levels for use in the analog hardware. The process for scaling is outlined in [25]. Essentially two main scaling factors are determined, magnitude and time scaling factors. Magnitude scaling factors are utilized to scale the parameters and states (line impedance, power injections, etc.) to appropriate levels which the analog hardware can represent. For example, the analogous resistance values in the DC emulation networks must fall within a range achievable via the OTA based resistor circuits. In addition, current levels seen in the OTA circuits must fall within the linear range of the device to ensure accurate results. A general expression for magnitude scaling is:
X PS ¼ xHW X b
ð13Þ
where XPS is a physical quantity related to the power system, xHW is the same physical quantity in the analog hardware and Xb is the scaling base. The magnitude scaling is calculated based on power system parameters, component voltage/current/power ratings, and deduced operating ranges of the power system components derived from this data and heuristics. This procedure is analogous to per-unit normalization conducted in traditional power system analyses. Scaling factors are calculated to map the expected range of power system states inside the linear operating range of the analog hardware. Saturation of components will only occur when the system goes unstable if scaled properly. Rescaling might be necessary if the system is not scaled correctly. However, this is detectable by monitoring the states of the analog emulator. If saturation occurs for a stable case then an adjustment to scaling is required. Time scaling is conducted in a similar fashion. Generally speaking the relationship between the time of the power system under study and the analog emulation can be represented by:
tHW ¼
Fig. 11. Software process flowchart.
t PS
s
ð14Þ
where tPS represents the time of the power system (real time), tHW represents the analogous time of the analog emulator and s is the time scaling factor relating the emulator to the power system. For power system analysis it is desirable to speed up the computation as much as possible but there are limitations to doing so.
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Fig. 12. Main graphical user interface window.
Fig. 13. Generator input and measurements.
Fig. 14. Transmission line parameter input.
The main limiting factors to time scaling are the analog hardware itself and the data acquisition. The analog hardware is comprised of many active and passive electronic elements and has associated frequency responses. Generally the responses will drop off once the frequency increases to a certain level. In order for
accurate emulation the transients being emulated must be below these frequencies. In addition, the sampling frequency for data acquisition must be higher than the frequency of the fastest transient to be emulated. Rescaling is necessary if the transients seen in emulation are faster than the analog hardware can accurately emulator or the data acquisition system can handle. This can be monitored by tracking the frequency of transients seen in emulation and adjusting the time scaling factor as required. Scaling the power system model to appropriate levels for analog emulation is automated in software. Inputs to the scaling process are information on power system models, including parameters, ratings and expected operating ranges. Similar ratings are provided based on the analog hardware. More specifically, resistance ranges of variable resistor circuits, linear ranges of voltages and currents for all circuits and slew rates of circuits. From this information a mapping is developed that relates the power system to the analog hardware. Scaling factors are calculated which map the power system operating ranges within the linear range of the analog hardware. The calculations are linear in nature and require little computational burden. Determining the inputs to the software requires time and analysis; however, this must only be done once. Once the time and magnitude scaling factors are determined the analog hardware can be initialized remotely via the software, D/A converters and reconfigurable nature of the analog circuits. Once configured the emulation and data acquisition is conducted for a single case. Many cases can be automatically run in a batch mode if necessary. The main panel of the interface for the three bus power system emulator which has been constructed is shown in Fig. 12. From this main panel the system topology can be seen which consists of
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Fig. 15. Emulation control panel.
three transmission lines, two generators (one slack) and a single load. From this screen most of the operation of the emulator is conducted. System parameters are entered and can be adjusted in real time during emulation. Fig. 13 shows a close up view of Table 1 Power system parameters. Component
Parameter
Value
Generator
P |E| H Frequency
130 MW 1.0 per unit 5s 60 Hz
Transmission Line A
R X
0 per unit 0.22 per unit
Transmission Line B
R X
0 per unit 0.15 per unit
Transmission Line C
R X
0 per unit 0.19 per unit
Load
P Q
100 MV 400 MVAR
the generator parameters and data. User input information is real power output in MW, voltage magnitude in per unit, system frequency in Hz, generator moment of inertia and initial condition for the generator angle. The boxes labeled Pe, Qe and angle 2 are measured values from the emulator. For the generator these are real and reactive power output and generator angle, respectively. In a similar manner system parameters are entered and data acquired for the load and transmission lines. Fig. 14 shows the data input for a transmission line. The emulation is also controlled using this screen.
Table 2 PowerWorld and emulator comparison.
Generator real voltage (p.u.) Generator imaginary voltage (p.u.) Generator angle (degrees) Load real voltage (p.u.) Load imaginary voltage (p.u)
Fig. 16. Emulator stable at 150 ls clearing time.
PowerWorld
Emulator
Difference
0.946 0.325 18.97 0.650 0.105
0.938 0.345 20.40 0.655 0.102
0.008 0.020 1.23 0.005 0.003
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A close up of the emulation control panel is shown in Fig. 15. From this panel the transmission network can be swapped between lossy or lossless, initial conditions are applied to the emulator, the scope can be configured for waveform acquisition, and integration can be turned on and off. In addition, a generator fault at bus two can be created for a specified duration of time. Separate tabs in this graphical user interface allow the user to input system scaling parameters, fault durations, system topology information (i.e. which lines or generator to remove from the system for contingency analysis). Another tab allows for the viewing of transient waveforms of the emulator which is shown in the examples section. 4. Examples Two examples from the three bus power system emulator prototype are presented here. First and foremost a basic power flow is run in the analog hardware and compared against a commercially available power flow package. The second example consists of transient analysis to determine the critical clearing time of a ground fault located at the generator terminal. Table 1 details the parameters for the lossless three bus system for these examples. To run a power flow on the emulator the analog hardware was first configured with parameters and initial conditions. Then the integrators were turned on. The equilibrium that is reached once the transients settle down represents the steady state, or power flow, solution for the given case. The choice of initial conditions on the integrators is important and through proper selection can ensure that a stable equilibrium is found for a stable operating point. The results of the emulator are compared to those obtained
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via PowerWorld [26] software in Table 2. From this example the results from this emulator are comparable to those achieved via PowerWorld. Based on multiple emulator runs the results are repeatable and consistent for various cases. Bus voltages are typically within a few percent and angles within a couple of degrees of the results obtained from a digital power flow solver. Further refinement of the hardware and more accurate analog devices would improve these results. To determine the critical clearing time of a ground fault at the generator terminals multiple emulation runs were conducted. For each run stability was determined by monitoring the transient response of the generator. Parameters of the system were scaled in both magnitude and time in order to speed up the computation and ensure the analog hardware functions within its operating ranges. In this case, for the chosen magnitude scaling factors, the appropriate time scaling factor was s = 3340. In other words, emulation was conducted 3340 times faster than real time. Characterization of the analog hardware limitations showed that time scaling >4000 results in errors in the transient response due to slew rate limitation of the hardware. This was accounted for by properly defining the hardware limitation in the scaling process. The time scaling is controllable and can be changed via a different choice in scaling factors or a change in hardware configuration (i.e. different capacitor size for integrators). For this test the fault duration was increased for each run until the system went unstable. Fig. 16 shows a stable case where the fault was cleared after 150 ls in emulation time (501 ms in real time). The fault duration was increased by 1 ls intervals (3.34 ms in real time) until the generator was unable to recover from the fault. This occurred at 170 ls in emulation time (568 ms in real time). This instability at 170 ls
Fig. 17. Emulator unstable at 170 ls clearing time.
Generator Angle (degrees)
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Simulated Stable Case (501ms clearing time)
350 300 250 200 150 100 50 0 -50 0
2
4
6 8 Time (seconds)
10
12
14
Generator Angle (degrees)
Fig. 18. Simulation stable at 501 ms clearing time.
Simulated Unstable Case (575ms clearing time)
350 300 250 200 150 100 50 0
consumption. Field Programmable Analog Arrays are another technology being investigated for translating this work to larger system sizes [28]. It has been shown that the computation time does not increase as the system size increases using this power system emulation method [23]. In addition, more detailed models of the power system components can be introduced without a change in computation time. This is in stark contrast to digital methods which require simplifications of models to speed up computations. A more detailed generator model can be realized by modeling exciters, governors, and power system stabilizers with additional integrators and provide mechanical power and field current inputs to the classical model. Moreover, a more advanced network model has been developed which models parametric variation of transmission line parameters related to temperature and frequency [29]. The increase in computation speed and model accuracy is particularly advantageous for online power system analysis. A more detailed load model can be realized via component-based and measurement-based methods – which more closely mimic physical behavior. The end result is a very fast computational tool which provides a more accurate representation of a power system.
-50 0
2
4
6 8 Time (seconds)
10
12
14
Fig. 19. Simulation unstable at 575 ms clearing time.
of fault duration is shown in Fig. 17. A numerical simulation of the system without time scaling was conducted for comparison to the emulated results. The result for the stable case is shown in Fig. 18 and the unstable case is shown in Fig. 19. For comparison purposes the simulated results are shown with the same y-axis scale in degrees as the emulation results and the time scale of the x-axis is analogous to the time scaled emulation results (4 ms emulated represents 13.36 s real time). For the stable case the emulated response for a clearing time of 501 ms compares favorably to the simulation results. In emulation the swing of the generator angle damped out slightly faster but the response is very similar to the simulation. The critical clearing times were also very close between emulated and simulated and exhibited a similar response in emulation as simulation. The emulation resulted in a critical clearing time of 568 ms and the simulation indicated 575 ms resulting in an error of approximately 1.2%.
6. Conclusion This paper provided details of a controllable analog emulator for power system analysis. It included the emulation methodology, theoretical and analog circuit models of the power system, along with operation of the emulator. A prototype has been developed and examples have been presented which verify the functionality and accuracy of the emulator for power flow and transient stability analyses. With the use of new technology many shortcomings of traditional analog computers have been addressed by this work. Configuration, calibration, data acquisition and control are all automated via a software interface to the analog emulator. Development is underway to further refine the power system model and software interface for this analog power system emulator. Acknowledgements The authors would like to thank the US Department of Energy for their financial support under Grant CH11170 and the US National Science Foundation for their financial support under Grant ECS-0601647.
5. Discussion References The prototype emulator presented, although small-scale, incorporates the methodology and technology necessary for an analog emulator of any size. The same analog hardware models, control and calibration methods, and data acquisition can be applied to a much larger emulator. The hardware and data acquisition requirements increase linearly with the size of the power system to be emulated. The current prototype hardware is on printed circuit boards and can scale in size fairly well by building and connecting additional boards. However, this hardware implementation presented here becomes less feasible as the system size becomes very large. Reasonable performance is expected for system sizes from tens to possibly hundreds of buses, however, the physical construction of the emulator, noise and components mismatch will prohibit this technique from being viable on the order of thousands of buses. For emulation of large scale systems the proposed technique can be utilized, however, a more suitable analog technology for large scale circuits will be required. VLSI implementation has been proposed in [27]. VLSI technology can facilitate a large scale analog emulator with better component matching, noise reduction, an OTA design tailored toward analog computation, and lower power
[1] Karami A. Power system transient stability margin estimation using neural networks. Int J Electr Power Energy Syst 2011;33(5):983–91. [2] Chatterjee D, Ghosh A. Improvement of transient stability of power systems with STATCOM-controller using trajectory sensitivity. Int J Electr Power Energy Syst 2011;33(3):531–9. [3] Li YH et al. Coordinated preventive control of transient stability with multicontingency in power systems using trajectory sensitivities. Int J Electr Power Energy Syst 2011;33(1):147–53. [4] Baghaee HR, Abedi M. Calculation of weighting factors of static security indices used in contingency ranking of power systems based on fuzzy logic and analytical hierarchy process. Int J Electr Power Energy Syst 2011;33(5): 855–60. [5] Chen SD, Chen JF. Fast load flow using multiprocessors. Int J Electr Power Energy Syst 2000;22(5):231–6. [6] Wang XF et al. Parallel solution of Newton’s power flow equations on configurable chips. Int J Electr Power Energy Syst 2007;29(6):422–31. [7] Taoka H et al. Real-time digital simulator with digital analog conversion interface for testing power instruments. IEEE Trans Power Syst 1994;9(5): 862–8. [8] Devaux O et al. An advanced and powerful real-time digital transient network analyser. IEEE Trans Power Deliv 1998;13:421–6. [9] Durie RC, Pottle C. An extensible real-time digital transient network analyzer. IEEE Trans Power Syst 1993;8:84–9. [10] Foley M et al. A real-time power-system simulation laboratory environment. IEEE Trans Power Syst 1990;5(11):1400–6.
A. St. Leger et al. / Electrical Power and Energy Systems 33 (2011) 1675–1685 [11] Jerosolimski M et al. A real time digital transient network analyzer for testing equipment on a general purpose computer. In: International conference on digital power system simulators, College Station, Texas, U.S.A.; 1995. p. 3–8. [12] Larose C et al. A fully digital real-time power system simulator based on PCcluster. Math Comput Simul 2003;63(11):151–9. [13] Fried R et al. Approaches for analog VLSI simulation of the transient stability of large power networks. IEEE Trans Circ Syst I-Fundam Theory Appl 1999; 46(10):1249–63. [14] Fried R et al. Analog VLSI solution to the stability study of power networks. In: ICECS; 1996. p. 239–42. [15] Cowan GER et al. A VLSI analog computer/math co-processor for a digital computer. Proceedings of the 2005 international solid-state circuits conference, vol. 1; 2005. [16] Yakaski J et al. Analog emulation using a reconfigurable classical generator model for load flow analysis. Proceedings of power systems computation conference (PSCC); 2005. [17] St. Leger A, Nwankpa CO. Reconfigurable transmission line model for analog power flow computation. Proceedings of the 15th power systems computation conference (PSCC); 2005. [18] Deese A, Nwankpa CO. Emulation of power system load dynamic behavior through reconfigurable analog circuits. International symposium on circuits and systems (ISCAS); 2006. p. 1691–4. [19] Semiconductor N. LM13700 dual operational transconductance amplifiers with linearizing diodes and buffers; 2000..
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[20] Nwankpa CO et al. A stochastic approach to small disturbance stability analysis. IEEE Proc Power Syst 1992;7(11):1519–28. [21] Kersting WH. Distribution system modeling and analysis. London: CRC Press; 2002. [22] Olaleye MB. Analog behavioral models for the purpose of analog emulation of large scale power systems. Masters, Electrical and Computer Engineering, Drexel University, Philadelphia; 2004. [23] Deese A et al. Effect of system size on analog emulation based steady-state power flow analysis. Proceedings of the 49th IEEE international midwest symposium on circuits and systems; 2006. [24] LabVIEW 8.2; 2007.
Contents lists available at SciVerse ScienceDirect
Electrical Power and Energy Systems journal homepage: www.elsevier.com/locate/ijepes
Controllable analog emulator for power system analysis Aaron St. Leger a,⇑, Anthony Deese b, Jeffrey Yakaski c, Chika Nwankpa d a
Department of Electrical Engineering and Computer Science, United States Military Academy, West Point, NY, USA Department of Electrical and Computer Engineering, The College of New Jersey, Ewing, NJ, USA c Lockheed Martin Corporation, Moorestown, NJ, USA d Department of Electrical and Computer Engineering, Drexel University, Philadelphia, PA, USA b
a r t i c l e
i n f o
Article history: Received 25 January 2008 Received in revised form 22 June 2011 Accepted 12 August 2011 Available online 8 October 2011 Keywords: Analog computers Analog processing circuits Power system modeling Power system simulation
a b s t r a c t This paper details the development of a controllable analog emulator for power system analysis. The emulator consists of reconfigurable analog hardware for power system emulation and a digital computer, along with associated software, for configuration, control, calibration and data acquisition. The analog hardware is fully controllable via the software interface. System parameters, initial conditions, integration, faults and contingencies can be created or altered via the software with no changes or manual intervention to the analog hardware. This advance overcomes one of the larger drawbacks of older analog computers, which was the need for manual configuration and calibration. The emulation methodology is presented in this paper as well as power system modeling, both theoretical and in analog hardware. The software interface and control is also presented. To validate the operation of the emulator two examples are shown from a prototype emulator. The first being a steady state power flow solution, the second computes the critical clearing time of a generator fault for transient stability. Published by Elsevier Ltd.
1. Introduction With current technology the computation of large power systems is time intensive. There are numerous analog and digital computation methods currently utilized but they fail to meet the growing computational demands of power systems, particularly in system operations. For example, transient stability is a continued field of research [1–3] with much focus on faster, more efficient calculation techniques. The power grid is expanding which is increasing the necessity and complexity of contingency studies. Current techniques often rank [4] contingencies and only perform analysis on a subset of the scenarios assumed to be more dangerous. Faster calculation techniques will allow for more thorough contingency analyses. Economic analyses are also demanding a tremendous computational burden. Traditional digital methods are too slow to solve the aforementioned demands quickly at a reasonable cost. Cluster and parallel computing techniques have been proposed [5,6] but the cost increases exponentially with the size of the system and the increase in computation performance does not increase at this same rate. Conversely, existing analog simulators can easily simulate the power system in real time but consist of many analog components and require manual intervention to
⇑ Corresponding author. E-mail address: [email protected] (A. St. Leger). 0142-0615/$ - see front matter Published by Elsevier Ltd. doi:10.1016/j.ijepes.2011.08.007
setup and configure the system for each calculation. A controllable real-time computation tool, or faster than real-time, is preferable. Currently, digital simulation is the prevalent method for several reasons. These include (i) the emergence of personal computers (PC) has made this technology reliable and easy to operate, (ii) advances in very large scale integration (VLSI) technology have allowed the development of new parallel computers with performance comparable to that of supercomputers at a fraction of the cost, and (iii) the highly programmable nature of digital computers. In digital simulation the set of algebraic expressions, which describe power system behavior, are discretized and software algorithms (such as Newton–Raphson) utilize input parameters to calculate the steady-state solution. Presently for large-scale systems, studies are performed with several types of massively parallel computers [7–12]. The use of digital simulation analysis is seriously inhibited by lengthy computational times inherent to the iterative algorithms they employ and the large cost of hardware and operating costs of massively parallel digital computers. New technological developments have facilitated research in the further development of analog computational tools to achieve fast computations at lower cost. A new approach has been proposed as to how analog technology may be utilized to perform analysis for large power systems [13,14]. In addition, recent work has developed general purpose analog processor for use in conjunction with a digital computers [15] to improve computational performance. The main advantage of analog computers is their shorter computational time. In this
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work, through the use of reconfigurable analog tools such as operational transconductance amplifiers (OTAs), accompanying circuit models for power system components such as generators [16], transmission lines [17], loads [18], and control and data acquisition circuitry and software, a fully controllable analog emulator for power system analysis has been developed. This emulator is suitable for transient and steady-state power system analysis. Example applications for this tool would be transient stability and contingency analysis. The next section of this paper provides an overview of the DC emulation methodology utilized in this power system emulator. Following this, details of the power system emulator are presented. An overview is then provided on the power system models in the DC emulation environment. In addition, the associated analog hardware realizations of these models are shown. Next, a summary of the data acquisition, control and calibration of the hardware is presented along with the software interface to the emulator. This is followed by the presentation of a couple examples, discussion and conclusion. 2. DC emulation The emulator presented here utilizes a DC emulation method for power system analysis. This emulation method has been proposed in [13] and is reviewed here for an understanding of the emulator presented in this paper. This approach utilizes multiple DC resistive networks to emulate an AC power system network in rectangular coordinates with DC voltages and currents. With fixed resistor values this emulation method assumes a constant system frequency, although with the hardware realization of these networks parameters can be varied based on frequency, temperature, or other factors. The DC emulation is based on the following equation solved in rectangular coordinates:
I ¼ Y V ¼ IRe þ jIIm
3. Power system emulator The power system emulator is shown in a block diagram form in Fig. 2. The emulator consists of a digital computer with custom software designed for data acquisition and control of the analog emulator, data acquisition and control circuitry and the analog emulation hardware. The next subsections provide details of each component of the emulator. 3.1. Power system model The power system model utilized in this emulator is broken up into three main components: generators, transmission lines, and loads. There is ongoing research developing other components, such as transformers, but the emulator presented here consists of these three elements. The interconnections of these three elements result in the power system model for emulation. The generators and loads are represented as dependent DC voltage sources and the transmission lines as resistive networks whose parameters are relative to line parameters. The generators and loads excite the networks with real and imaginary DC voltage components and the states (voltages and currents) of the resistive networks provide the AC power flows through the network. These components were modeled mathematically within the DC emulation environment and then controllable analog circuits were constructed based on these models. 3.2. Transmission lines Transmission lines constitute the power system network in the emulator. Lumped equivalent models are employed. A pi model is shown in Fig. 3. To translate this into the DC emulation scheme the line parameters are separated into real and imaginary components. This yields the resistor values for the DC emulation networks. For the series elements [17]:
¼ ðY Re V Re Y Im V Im Þfreal currentg þ jðY Im V Re þ Y Im V Re Þ fimaginary currentg
ð1Þ
where the subscripts ‘‘Re’’ and ‘‘Im’’ refer to real and imaginary components respectively. A diagram of the emulation networks highlighting the voltages applied to each network is shown in Fig. 1. Each of the four current components seen in (1) is represented in emulation by a DC voltage dropped across a resistive element. This results in four DC resistive networks. Power injections into the resistive network are modeled as dependant voltage sources.
Fig. 1. DC emulation networks.
1 RReðijÞ ¼ RefY ¼ ij g
RImðijÞ ¼
1 ImfY ij g
¼
R2ij þX 2Lij Rij R2ij þX 2Lij
ð2Þ
:
X Lij
For the shunt elements:
RReðikÞ ¼ RReðjkÞ ¼ RefY1
jk;ik g
RImðikÞ ¼ RImðjkÞ ¼
1 ImfY jk;ik g
¼ r jk ¼ x1 ¼ X C jk C
:
ð3Þ
jk
The emulation networks can be constructed based on the line parameters and Eqs. (2) and (3). The topology of each DC network will mimic the topology of the power system. For example, for the pi model shown here the analogous section DC emulation network will have a pi form. For a network of many transmission lines the required resistance values and network topology are developed in the same fashion. In circuit form a network of resistors, or potentiometers, would require manual intervention to configure and alter the emulator for a given computation. In addition, there is a requirement for negative resistance when modeling shunt capacitive elements of the transmission lines. A hardware design with active devices that achieves remote reconfigurability and negative resistance has been developed. The circuits are OTA-based reconfigurable variable positive and negative resistive circuits. OTAs are voltage controlled current sources (VCCSs) with a controllable transconductance gain (gm). More specifically, io = gmvin where io is the output current and vin the input voltage. The gain is controllable via a bias current (iabc). A double ended OTA variable resistor [19] based on the LM13700 OTA is shown in Fig. 4. The LM13700 was utilized due to its low cost and
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Fig. 2. Power system emulator diagram.
R
i
jω L
j
+
V1
+ 1 jω C
1 jω C
r
V2
r
-
I-V Characteristic
800 600
I2 Line Current (uA)
I1
400 200 0 -200 -400 -600 -800
-
-5
-4
-3
-2
-1
0
1
2
3
4
5
Line Voltage (Volts)
k
Positive OTA Resistor
Negative OTA Resistor
Fig. 3. Pi equivalent transmission line model. Fig. 5. OTA variable resistor circuits I–V characteristic.
representing the line out of service. In addition faults that are modeled by impedances can also be implemented in the DC emulation network utilizing a similar modeling process and analog hardware.
commercial availability. This was important for the purpose of developing a hardware prototype. The circuit shown in Fig. 4 behaves like a potentiometer with the bias current analogous to the wiper terminal. The effective resistance of this circuit (Reff), which is the resistance seen between the terminals V1 and V2 is determined by [17]:
Reff ¼
ðV 1 V 2 Þ 2R þ Ra ¼ i0 Ra g m
3.3. Generators The generators provide power injections into the DC emulation networks and are modeled based largely on the classical generator model. More specifically, the generators are based on the 2nd order swing equation:
ð4Þ
A negative resistance circuit was developed with the same design by switching the polarity of the OTA inputs, which results in reversing the current flow. The I–V characteristic of the OTA positive and negative resistance circuits is plotted in Fig. 5. The device saturates as the output current approaches the bias current but is fairly linear within a small range. In emulation this device is operated in a linear region, which is approximately between ±1 volt. It is necessary to scale power system dependent states through their parameters such that the OTAs operate in the linear region, failing to do so results in computational errors. By constructing the four DC emulation networks with variable resistive circuits the network parameters in the emulator are fully controllable and reconfigurable via the transconductance gain of the OTAs. Line outages can also be obtained by setting the bias current to zero for all OTAs
R
M€d þ Dd_ þ Pe ðdÞ ¼ Pm
ð5Þ
where M is the generator inertia coefficient, D is the damping coefficient, Pe is the electrical power output and Pm is the mechanical input power. The generator angle is solved for based on the difference between the mechanical input power, which is specified, and the electrical power output, which is measured from the DC emulation networks. With damping neglected (D = 0), this results in:
d¼
1 M
Z Z
ðPm Pe ðdÞÞdtdt
where Pe (d) is related to the current injection into the network, specified generator voltage magnitude |E| and the generator angle d as follows [16]:
R RA
+V cc
-
-
+
+
OTA
-V cc
ð6Þ
+
OT A
+ i0
+V cc
V1
iabc
i0
iabc -
V2
V1
i0
-V cc
Fig. 4. OTA variable resistor circuit.
V2
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RefSg ¼ RefV I g Pe ¼ ERe IRe þ EIm IIm
:
ð7Þ
Pe ¼ jEj cos d RefIg þ jEj sin d ImfIg The analog hardware computes the generator angle and applies the appropriate voltages to the DC emulation networks. A block diagram of the analog hardware is shown in Fig. 6. The hardware consists of reconfigurable OTA based integrators to compute the swing equation, reconfigurable voltage sources to specify Pm and |E|, analog adders, multipliers and current sensors to compute Pe along with voltage controlled current sources (VCCSs), voltage controlled voltage sources (VCVSs) and current controlled voltage sources (CCVSs) to condition the signals as necessary. In addition, integration can be remotely controlled to on/off states and initial conditions can be set and applied to the integrators. The process of computation consists of initializing the integrators with initial conditions, applying voltages to the DC emulation networks and then turning on integration. In addition, ground faults can be created at the generator terminal via the switch shown in the diagram. By opening the switch the electrical power in the feedback loop goes to zero simulating a ground fault at the generator terminal.
For the aggregate load model, however, injection may be dependent on several factors including the current injection or load impedance at a given operating point. The power injection, as defined by the popular ZIP model, is shown in (10) [21].
Si ,complex load power injection from bus i Ii ,complex load current injection load from bus i Yi ,complex load impedance load at bus i 2 SInj i ¼ Si þ V i ðIi Þ jV ii j ðY i Þ :
3.4. Loads In this paper, the authors utilize an aggregate load model for which all loads at a given bus are represented by a single complex power injection. The load is modeled as a power injection similar to the generators. A figure showing a power injection into bus i is shown in Fig. 7. The load dynamic behavior is described by a decoupled exponential recovery model based on the operation of induction motor loads. Within this model, bus voltage magnitude and angle are expressed as functions of complex power flow, complex power injection, and time [20].
bMag i bAng i
Fig. 7. Simple description of power system bus i.
The basic design of the load emulator is shown in Fig. 8. It is a compilation of four sub-circuits, of which the first is the network interface. The second sub-circuit utilizes the current flows and load bus voltage supplied by the interface to calculate the complex power flow leaving the load bus, as shown in (12).
Ii ¼ complex current flow from bus i Ii ¼ IiRe þ jIiIm
ð11Þ
Si ¼ Vi Ii ¼ ðV iRe þ jV iIm ÞðIiRe jIiIm Þ ¼ . . .
¼ recovery rate constant of voltage magnitude
. . . ¼ ðV iRe IiRe þ V iIm IiIm Þ þj ðV iIm IiRe V iRe jIiIm Þ |fflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{zfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl} |fflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl{zfflfflfflfflfflfflfflfflfflfflfflfflfflfflfflffl}
¼ recovery rate constant of voltage angle
Pi
djV i j ¼ bMag ðQ i Q Inj i Þ i dt
ð8Þ
dhi ðPi PInj ¼ bAng i i Þ: dt
ð9Þ
Fig. 6. Generator model circuit implementation diagram.
ð10Þ
ð12Þ
Qi
The third sub-circuit utilizes this power flow in conjunction with the user defined power injection to update the voltage at the load bus, through integration as defined in (8) and (9). The fourth sub-circuit takes this updated voltage and, using a set of
Fig. 8. Load model circuit implementation diagram.
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cosine and sine shapers, converts it from a polar to a rectangular form, as required by the network interface [22,23]. The load model for emulation, as shown in Fig. 8, is capable of mimicking the behavior of a PQ type load, however it does not incorporate the behavior of the ZIP model shown in Eq. (10). To include this behavior, a set of multipliers and summing devices is used.
conducted only when this digital flag indicates a violation; otherwise the system is operating within predefined limits. With this advancement in data acquisition and control of the analog hardware a flexible calibration process was developed.
3.5. Control and data acquisition
In this section, an overview of the emulator’s calibration capabilities is provided. One of the main problems with classic analog computers was the methods and requirements of calibration. The initial configuration and calibration was accomplished by manual measurements and manipulation of jumpers, gain settings, potentiometers, etc. This process was error prone and time consuming. In addition, as the analog computer was used the temperature of the components changed and altered their behavior due to temperature dependence of parameters. Recalibrations were necessary to properly correct for these effects. Through the use of modern components and the control and data acquisition the calibration and performance of this analog emulator is greatly improved in comparison to classical methods. There has been extensive research into eliminating temperature dependencies in CMOS devices. Methods to compensate for or eliminate temperature effects have been developed and implemented in modern devices. In addition, the effects of temperature on OTAs gain are nearly eliminated through the use of linearizing diodes as exhibited in [19]. By taking advantage of these advancements a modern analog computer will inherently have much better performance than traditional analog computers. Calibration methods have also been enhanced in this work by taking advantage of the controllable analog hardware to improve performance even further. A calibration method has been developed which is quick, accurate and can be automated via software in this analog emulator. The calibration utilizes the remote control and data acquisition of the emulator. For the OTA variable resistors, which emulate the power system network, calibration is conducted by configuring the circuits, applying voltages to the network and finally measuring the line current and computing the actual resistance of the circuit. The circuit is then tuned via the OTA bias current until the circuit resistance matches the desired value. For the generators and loads a similar process is carried out. One calibration test eliminates the effects of the OTA offset in the integrators. To do this for a generator numerous mechanical input powers are specified, applied to the circuit and electric output power measured. Based on the differences between the mechanical input power and measured electrical output power the control (mechanical input power) is tuned to match the behavior of the circuit. These calibrations, among others utilized and in development, can be implemented and automated via the software interface. Calibration can also be run at periodic intervals to help eliminate any drift in the analog components that occur during emulator operation and aging of components.
In this section, we explain the scheme implemented to acquire data and control the power system emulator. The control of the emulator consists of two main stages: configuration/reconfiguration and actuation. Essentially the emulator parameters are all configured, or reconfigured if changes are being made for a subsequent computation, and then when all parameters have been set the computation is actuated. More specifically, the integrators are turned on and the system response provides the solution. The configuration only needs to be done once and multiple computations can be conducted with minimal change in the system. For example, the line parameters once set will not need to be changed every time a power flow case is run. Line or generator outages can be emulated by just turning off the specified line(s) or generator(s) and leaving the rest of the system alone. The control of the analog hardware is handled via a digital computer. A figure showing the control method and interaction between the digital and analog hardware is shown in Fig. 9. It is shown that the digital computer feeds data into a D/A converter, which then goes into a de-multiplexer (DEMUX) to the analog components of the emulator for configuration. For a single D/A converter and DEMUX combination, this is a serial process. The computer provides a single signal to configure a device and the DEMUX is controlled directly by the computer to select which analog device to configure. The DEMUX latches the outputs to maintain the proper configuration as it cycles through the devices. Multiple D/A converters and de-multiplexers can be utilized in parallel to speed up this process. The actuation of the analog hardware is accomplished through a digital signal that turns on the integrators for generators and loads. The system has the capability of individually actuating each component. The data acquisition is also handled via a digital computer. The data acquisition scheme is detailed in Fig. 10. The analog data acquisition hardware extracts and conditions data from the analog emulation hardware for measurement via the digital computer. As system size increases the emulation time has been shown to remain the same [23] although both the data acquisition and configuration time will increase linearly. This process can be sped up via incorporating parallel combinations of A/D converters/multiplexers and D/A converters/de-multiplexers. In addition, for some analyses data acquisition is not necessary for all computations. For example, when conducting contingency analysis a digital flag can be used in hardware to indicate a system violation (e.g. over current, under voltage, etc.). Data acquisition needs to be
3.6. Calibration
Fig. 9. Emulator control scheme.
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Fig. 10. Emulator data acquisition scheme.
3.7. Software interface An overview has been provided on the hardware configuration, control and data acquisition, and calibration of the power system emulator. This section details the functionality of the software interface. The software interface is where the end user operates the emulator. This software was developed within National Instruments LabVIEW [24] environment. A flow chart of the software operation is shown in Fig. 11. The first step is to input the power system parameters (i.e. system topology, transmission line impedances and limits, generator and load parameters, etc.) along with case information. Case information includes initial conditions, topology for a given case (this will change on a case by case basis during contingency
analysis), power injections, faults and/or system disturbances, etc. Once all of this information is provided, the emulator can be configured and run for all the cases. The running of the emulator consists of a few steps. First and foremost the power system parameters and states must be scaled to appropriate levels for use in the analog hardware. The process for scaling is outlined in [25]. Essentially two main scaling factors are determined, magnitude and time scaling factors. Magnitude scaling factors are utilized to scale the parameters and states (line impedance, power injections, etc.) to appropriate levels which the analog hardware can represent. For example, the analogous resistance values in the DC emulation networks must fall within a range achievable via the OTA based resistor circuits. In addition, current levels seen in the OTA circuits must fall within the linear range of the device to ensure accurate results. A general expression for magnitude scaling is:
X PS ¼ xHW X b
ð13Þ
where XPS is a physical quantity related to the power system, xHW is the same physical quantity in the analog hardware and Xb is the scaling base. The magnitude scaling is calculated based on power system parameters, component voltage/current/power ratings, and deduced operating ranges of the power system components derived from this data and heuristics. This procedure is analogous to per-unit normalization conducted in traditional power system analyses. Scaling factors are calculated to map the expected range of power system states inside the linear operating range of the analog hardware. Saturation of components will only occur when the system goes unstable if scaled properly. Rescaling might be necessary if the system is not scaled correctly. However, this is detectable by monitoring the states of the analog emulator. If saturation occurs for a stable case then an adjustment to scaling is required. Time scaling is conducted in a similar fashion. Generally speaking the relationship between the time of the power system under study and the analog emulation can be represented by:
tHW ¼
Fig. 11. Software process flowchart.
t PS
s
ð14Þ
where tPS represents the time of the power system (real time), tHW represents the analogous time of the analog emulator and s is the time scaling factor relating the emulator to the power system. For power system analysis it is desirable to speed up the computation as much as possible but there are limitations to doing so.
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Fig. 12. Main graphical user interface window.
Fig. 13. Generator input and measurements.
Fig. 14. Transmission line parameter input.
The main limiting factors to time scaling are the analog hardware itself and the data acquisition. The analog hardware is comprised of many active and passive electronic elements and has associated frequency responses. Generally the responses will drop off once the frequency increases to a certain level. In order for
accurate emulation the transients being emulated must be below these frequencies. In addition, the sampling frequency for data acquisition must be higher than the frequency of the fastest transient to be emulated. Rescaling is necessary if the transients seen in emulation are faster than the analog hardware can accurately emulator or the data acquisition system can handle. This can be monitored by tracking the frequency of transients seen in emulation and adjusting the time scaling factor as required. Scaling the power system model to appropriate levels for analog emulation is automated in software. Inputs to the scaling process are information on power system models, including parameters, ratings and expected operating ranges. Similar ratings are provided based on the analog hardware. More specifically, resistance ranges of variable resistor circuits, linear ranges of voltages and currents for all circuits and slew rates of circuits. From this information a mapping is developed that relates the power system to the analog hardware. Scaling factors are calculated which map the power system operating ranges within the linear range of the analog hardware. The calculations are linear in nature and require little computational burden. Determining the inputs to the software requires time and analysis; however, this must only be done once. Once the time and magnitude scaling factors are determined the analog hardware can be initialized remotely via the software, D/A converters and reconfigurable nature of the analog circuits. Once configured the emulation and data acquisition is conducted for a single case. Many cases can be automatically run in a batch mode if necessary. The main panel of the interface for the three bus power system emulator which has been constructed is shown in Fig. 12. From this main panel the system topology can be seen which consists of
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Fig. 15. Emulation control panel.
three transmission lines, two generators (one slack) and a single load. From this screen most of the operation of the emulator is conducted. System parameters are entered and can be adjusted in real time during emulation. Fig. 13 shows a close up view of Table 1 Power system parameters. Component
Parameter
Value
Generator
P |E| H Frequency
130 MW 1.0 per unit 5s 60 Hz
Transmission Line A
R X
0 per unit 0.22 per unit
Transmission Line B
R X
0 per unit 0.15 per unit
Transmission Line C
R X
0 per unit 0.19 per unit
Load
P Q
100 MV 400 MVAR
the generator parameters and data. User input information is real power output in MW, voltage magnitude in per unit, system frequency in Hz, generator moment of inertia and initial condition for the generator angle. The boxes labeled Pe, Qe and angle 2 are measured values from the emulator. For the generator these are real and reactive power output and generator angle, respectively. In a similar manner system parameters are entered and data acquired for the load and transmission lines. Fig. 14 shows the data input for a transmission line. The emulation is also controlled using this screen.
Table 2 PowerWorld and emulator comparison.
Generator real voltage (p.u.) Generator imaginary voltage (p.u.) Generator angle (degrees) Load real voltage (p.u.) Load imaginary voltage (p.u)
Fig. 16. Emulator stable at 150 ls clearing time.
PowerWorld
Emulator
Difference
0.946 0.325 18.97 0.650 0.105
0.938 0.345 20.40 0.655 0.102
0.008 0.020 1.23 0.005 0.003
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A close up of the emulation control panel is shown in Fig. 15. From this panel the transmission network can be swapped between lossy or lossless, initial conditions are applied to the emulator, the scope can be configured for waveform acquisition, and integration can be turned on and off. In addition, a generator fault at bus two can be created for a specified duration of time. Separate tabs in this graphical user interface allow the user to input system scaling parameters, fault durations, system topology information (i.e. which lines or generator to remove from the system for contingency analysis). Another tab allows for the viewing of transient waveforms of the emulator which is shown in the examples section. 4. Examples Two examples from the three bus power system emulator prototype are presented here. First and foremost a basic power flow is run in the analog hardware and compared against a commercially available power flow package. The second example consists of transient analysis to determine the critical clearing time of a ground fault located at the generator terminal. Table 1 details the parameters for the lossless three bus system for these examples. To run a power flow on the emulator the analog hardware was first configured with parameters and initial conditions. Then the integrators were turned on. The equilibrium that is reached once the transients settle down represents the steady state, or power flow, solution for the given case. The choice of initial conditions on the integrators is important and through proper selection can ensure that a stable equilibrium is found for a stable operating point. The results of the emulator are compared to those obtained
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via PowerWorld [26] software in Table 2. From this example the results from this emulator are comparable to those achieved via PowerWorld. Based on multiple emulator runs the results are repeatable and consistent for various cases. Bus voltages are typically within a few percent and angles within a couple of degrees of the results obtained from a digital power flow solver. Further refinement of the hardware and more accurate analog devices would improve these results. To determine the critical clearing time of a ground fault at the generator terminals multiple emulation runs were conducted. For each run stability was determined by monitoring the transient response of the generator. Parameters of the system were scaled in both magnitude and time in order to speed up the computation and ensure the analog hardware functions within its operating ranges. In this case, for the chosen magnitude scaling factors, the appropriate time scaling factor was s = 3340. In other words, emulation was conducted 3340 times faster than real time. Characterization of the analog hardware limitations showed that time scaling >4000 results in errors in the transient response due to slew rate limitation of the hardware. This was accounted for by properly defining the hardware limitation in the scaling process. The time scaling is controllable and can be changed via a different choice in scaling factors or a change in hardware configuration (i.e. different capacitor size for integrators). For this test the fault duration was increased for each run until the system went unstable. Fig. 16 shows a stable case where the fault was cleared after 150 ls in emulation time (501 ms in real time). The fault duration was increased by 1 ls intervals (3.34 ms in real time) until the generator was unable to recover from the fault. This occurred at 170 ls in emulation time (568 ms in real time). This instability at 170 ls
Fig. 17. Emulator unstable at 170 ls clearing time.
Generator Angle (degrees)
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Simulated Stable Case (501ms clearing time)
350 300 250 200 150 100 50 0 -50 0
2
4
6 8 Time (seconds)
10
12
14
Generator Angle (degrees)
Fig. 18. Simulation stable at 501 ms clearing time.
Simulated Unstable Case (575ms clearing time)
350 300 250 200 150 100 50 0
consumption. Field Programmable Analog Arrays are another technology being investigated for translating this work to larger system sizes [28]. It has been shown that the computation time does not increase as the system size increases using this power system emulation method [23]. In addition, more detailed models of the power system components can be introduced without a change in computation time. This is in stark contrast to digital methods which require simplifications of models to speed up computations. A more detailed generator model can be realized by modeling exciters, governors, and power system stabilizers with additional integrators and provide mechanical power and field current inputs to the classical model. Moreover, a more advanced network model has been developed which models parametric variation of transmission line parameters related to temperature and frequency [29]. The increase in computation speed and model accuracy is particularly advantageous for online power system analysis. A more detailed load model can be realized via component-based and measurement-based methods – which more closely mimic physical behavior. The end result is a very fast computational tool which provides a more accurate representation of a power system.
-50 0
2
4
6 8 Time (seconds)
10
12
14
Fig. 19. Simulation unstable at 575 ms clearing time.
of fault duration is shown in Fig. 17. A numerical simulation of the system without time scaling was conducted for comparison to the emulated results. The result for the stable case is shown in Fig. 18 and the unstable case is shown in Fig. 19. For comparison purposes the simulated results are shown with the same y-axis scale in degrees as the emulation results and the time scale of the x-axis is analogous to the time scaled emulation results (4 ms emulated represents 13.36 s real time). For the stable case the emulated response for a clearing time of 501 ms compares favorably to the simulation results. In emulation the swing of the generator angle damped out slightly faster but the response is very similar to the simulation. The critical clearing times were also very close between emulated and simulated and exhibited a similar response in emulation as simulation. The emulation resulted in a critical clearing time of 568 ms and the simulation indicated 575 ms resulting in an error of approximately 1.2%.
6. Conclusion This paper provided details of a controllable analog emulator for power system analysis. It included the emulation methodology, theoretical and analog circuit models of the power system, along with operation of the emulator. A prototype has been developed and examples have been presented which verify the functionality and accuracy of the emulator for power flow and transient stability analyses. With the use of new technology many shortcomings of traditional analog computers have been addressed by this work. Configuration, calibration, data acquisition and control are all automated via a software interface to the analog emulator. Development is underway to further refine the power system model and software interface for this analog power system emulator. Acknowledgements The authors would like to thank the US Department of Energy for their financial support under Grant CH11170 and the US National Science Foundation for their financial support under Grant ECS-0601647.
5. Discussion References The prototype emulator presented, although small-scale, incorporates the methodology and technology necessary for an analog emulator of any size. The same analog hardware models, control and calibration methods, and data acquisition can be applied to a much larger emulator. The hardware and data acquisition requirements increase linearly with the size of the power system to be emulated. The current prototype hardware is on printed circuit boards and can scale in size fairly well by building and connecting additional boards. However, this hardware implementation presented here becomes less feasible as the system size becomes very large. Reasonable performance is expected for system sizes from tens to possibly hundreds of buses, however, the physical construction of the emulator, noise and components mismatch will prohibit this technique from being viable on the order of thousands of buses. For emulation of large scale systems the proposed technique can be utilized, however, a more suitable analog technology for large scale circuits will be required. VLSI implementation has been proposed in [27]. VLSI technology can facilitate a large scale analog emulator with better component matching, noise reduction, an OTA design tailored toward analog computation, and lower power
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