Cost-density analysis of interconnections

Cost-density analysis of interconnections

World Abstracts on Microelectronics and Reliability Novel failure mechanism and anomalous acceleration factor on a beam-lead IC. P. L. SCARFF and M. I...

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World Abstracts on Microelectronics and Reliability Novel failure mechanism and anomalous acceleration factor on a beam-lead IC. P. L. SCARFF and M. IANNUZZIGLOGOVSKY. Annual Proceedings of the Reliability Physics Symposium, San Diego, U.S.A., p.42 (1987). In this paper, we identify a previously unreported corrosion mechanism as a primary cause of field failure in a particular beam-lead sealed-junction IC design. This mechanism has been reproduced under laboratory bias-humidity-temperature (BHT) test conditions. We determine an acceleration factor for this mechanism by comparing the failure distribution obtained in BHT tests with that from a field tracking study. Because a previously published reliability model for BHT aging of beam-lead ICs grossly overestimates this observed acceleration factor, it appears that this model does not adequately describe the corrosion mechanism discussed in this paper. Stress related failures causing open metallization. STEVEN K. GROOTHUIS and WALTER H. SCHROEN. Annual Proceedings of the Reliability Physics Symposium, San Diego, U.S.A., p. 1 (1987). With the ever increasing number of metallization failures caused by voids and subsequent opens, the reliability of narrow AI-Si metal lines has become a crucial factor in very large scale integration (VLSI) integrated circuit (IC) fabrication. The only supporting evidence for void formation in the recent past has been visual inspection of open metallization. Stress-induced void formation can be modeled using nonlinear finite element analysis. Observed failures correlate well with calculated stresses determined by varying intrinsic stress of the passivation, topography, line width, and silicon nodule size. As a result, the model gives physical interpretation for the behavior of voids within AI Si metallization. Highly reliable trench capacitor with SiO2/Si3N4/SiO 2 stacked film. T. WATANABE, N. GOTO, N. YASUHISA, T. YANASE,T. TANAKAand S. SHINOZAKI.Annual Proceedings of the Reliability Physics Symposium, San Diego, U.S.A., p. 50 (1987). This paper deals with the reliability aspects of trench capacitors with the stacked film of SiO2/Si3NjSiO 2. Trench MOS capacitor shows larger leakage current under positive gate bias compared to plane MOS capacitor, because of the electric field enhancement at Si convex corner. In the case of the stacked film, trapped electrons in Si3N 4 relax the electric field near Si corner and suppress the leakage current. The trench MIS capacitor also exhibits higher breakdown voltage of time-zero dielectric breakdown and longer mean time to failure (MTTF) of time dependent dielectric breakdown (TDDB) compared to trench MOS capacitor. Therefore, the stacked film is prominent as an insulator for trench capacitor. Elastoplastic analysis of surface-mount solder joints. JOHN H. LAU, DONALD W. RICE and PHIL A. AVERY. IEEE Trans. Compon. Hybrids mfq Technol. CHMT-10, 346 (1987). Thermal strain in surface-mount chip resistor assemblies is studied by the finite element method using two- and threedimensional models. Emphasis is placed on the effects of interconnection geometry on solder joint fatigue. Nine different solder joint geometries are considered. The effect of Cu addition to AI-Si interconnects on stress induced open-circuit failures. S. MAYUMI, T. UNEMOTO, M. SHISHINO, H. NANATSUE, S. UEDA and M. INOUE. Annual Proceedings of the Reliability Physics Symposium, San Diego, U.S.A., p. 15 (1987). Stress induced open-circuit failures in A1-Si and A1-Si-Cu interconnects are examined in detail. The failure rate increases, as a P-SiN film gets thicker, as an interconnect becomes narrower and thinner and as the mean grain size of an A1 alloy becomes larger. In failure analyses, two kinds of voids in the interconnects are observed. One is the slit-like void which is a very thin crack perpendicular to

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the AI lines. Open failure sites are always observed at slit-like voids. The other is a wedge shaped void which is formed along a grain boundary at the edge of the interconnects. The addition of Cu as low as 0.1%, substantially depresses the open failures. However, further Cu addition causes little change in the failure rate. The failures are suppressed not by Cu precipitates but by Cu atoms dissolved in AI grains. The wedge shaped void and the slit-like void are formed mainly by grain boundary diffusion and lattice diffusion of vacancies, respectively. In AI-Si-Cu alloys, dissolved Cu atoms are bonded to vacancies and suppress the lattice diffusion, resulting in enhancement of the lifetime. Is the incoming physical inspection of microeleetronic components really necessary? B. P. RICHARDSand P. K. FOOTNER. Microelectron. J. 18 (6), 4 (1987). This paper demonstrates the desirability for efficient and extensive inspection procedures for microelectronic components. Some potential component and systems reliability implications of omitting these procedures are discussed. It is shown that many field failures result from the presence of defects not screened at incoming inspection. Case histories of defective commercial products found in inspection exercises, and analyses of service device failures, are used to highlight these points. It is shown that, since many simple materials and processing defects are not screened out before vendor despatch, it is inadvisable to rely on the manufacturer for product inspection. Moreover, many of these simple defects/faults, which can be readily screened using simple inspection techniques, give rise to early life and field failures of components, thus compromising systems reliability. The cost-effectiveness of such inspection procedures, and their relation to burn-in and extended life testing are also discussed. There is increasing evidence to suggest that a similar situation exists in components bought to a military specification. Cost-density analysis of interconnections. GEORGE MESSNER. IEEE Trans. Comport. Hybrids mfq Technol. CHMT-10, 143 (1987). A very rapid increase in the conductor density of various interconnecting substrates makes it desirable to have a uniform method for evaluation of their relative density capabilities. The derivation of one such method of evaluation, based on conductor density per unit of total area of the substrate, is made. This method permits a uniform density analysis of the entire interconnection spectrum from printed to integrated circuits. It is also useful in derivation of a price-density analysis and other figures of merits for assisting in the comparison of various packaging techniques. A description of a generalized approach for development of such a graphic price density analysis is provided. Micro-corrosion of AI-Cu bonding pads. SIMON THOMAS and HOWARD M. BERG. IEEE Trans. Compon. Hybrids mfg Technol. CHMT-10, 252 (1987). Aluminum metallization films with copper additions are found to exhibit highly localized pitting in the presence of moisture. Galvanic action of aluminum surrounding AI2Cu theta phase particles causes localized aluminum corrosion. The thin layer of aluminum hydroxide corrosion product on the bonding pad creates an effective barrier to high-quality wire bonding. Electrical conduction mechanisms of barium-titanate-based thick-film capacitors. IN K. Yoo, LARRY C. BURTON, F. WILLIAM STEPHENSON. IEEE Trans. Compon. Hybrids mfg Technol. CHMT-10, 274 (1987). Electrical characteristics, including degradation, of high K (~500) barium-titanatebased thick-film capacitors were studied. The leakage current of thick-film capacitors made from Ag/Pd thick-film conducting paste and high K dielectric has shown ohmic and super-ohmic (3/2 power voltage dependence) type behavior. Voltage independence of thermal activation energy and time