Solid-State Electronics 44 (2000) 1315±1320
Amorphous/crystalline silicon two terminal photodetector Mario Tucci *, Rosario DeRosa ENEA Research Centre, Portici Localit a Granatello, 80055 Portici (Na), Italy Received 16 August 1999; received in revised form 22 November 1999
Abstract In this article, we investigate a large area heterostructure obtained by growing a p±i±n amorphous silicon junction on a p-type crystalline silicon wafer. This stacked structure behaves as a back-to-back diode if the thickness of the n amorphous layer is thick enough to avoid a complete depletion of the layer. The p amorphous layer is the window layer for incident light. This device is able to discriminate visible and near infrared radiations simply by varying the bias conditions. Due to the dierence in the absorption coecient of amorphous and crystalline materials, when the applied voltage reverse biases the amorphous diode and forward biases the heterostructure diode, the visible spectrum is detected, whereas in the opposite bias condition, the near infrared spectrum is detected, as only a higher wavelength can reach the rear diode. We characterised this device performing steady-state and transient measurements of photocurrent in dierent conditions of incident light wavelength and bias voltage. An analytical model for the photocurrent is used to optimise the thicknesses of the amorphous layers and numerical simulation with SPICE is performed for steady-state and transient measurements in order to evaluate the possibility of integration in a matrix. Ó 2000 Elsevier Science Ltd. All rights reserved. Keywords: Photodetector; Heterojunction; Amorphous silicon
1. Introduction Hydrogenated amorphous silicon (a-Si : H) has been extensively investigated for large area optoelectronic applications such as solar cells and photodetectors. This material takes advantage from the well known plasma enhanced chemical vapour deposition (PECVD) technique, which allows the deposition of good electronic quality material with optical characteristics, easily adjustable in a wide range by changing some deposition parameters such as substrate temperature or plasma chemical composition. In particular, the optical gap of amorphous silicon can be eectively changed by adding controlled amounts of carbon or germanium during deposition, resulting in a variation of the absorption pro®le that allows the detection of selected spectral ranges. Other important features of amorphous silicon
*
Corresponding author. Tel.: +39-081-772-3312; fax: +39081-772-3344. E-mail address:
[email protected] (M. Tucci).
by PECVD are its suitability for deposition on various substrates, including crystalline materials and the low deposition temperature utilised in these processes that make this technology really inexpensive, reliable and compatible with all kinds of VLSI processes for an effective integration with electronic circuitry [1]. With this technology, various photodetectors have been fabricated to detect part of the spectrum ranging from UV to the near IR, tuneable simply by varying external bias conditions [2±5]. In this sense, the realisation of heterostructures of a-Si : H with crystalline silicon in order to enlarge the spectral detection in the near infrared region, appears very attractive for the fabrication of devices to detect part of spectrum ranging from the UV to the NIR and to discriminate the spectral content of the detected light simply by varying the external voltage bias applied to the devices. Also, the modelling of such devices represents a good benchmark for the actual theories on the carrier generation and transport inside amorphous silicon material and at amorphous silicon interfaces. In this work, we describe the realisation and modelling of a two terminal stacked amorphous and
0038-1101/00/$ - see front matter Ó 2000 Elsevier Science Ltd. All rights reserved. PII: S 0 0 3 8 - 1 1 0 1 ( 9 9 ) 0 0 3 2 5 - 1
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M. Tucci, R. DeRosa / Solid-State Electronics 44 (2000) 1315±1320
crystalline silicon heterostructure, able to discriminate between the visible and near infrared spectra. An analytical model of the device is developed in order to optimise the thickness of the amorphous silicon layers. Steady-state and transient behaviour of the devices are presented and compared with SPICE simulation in order to ®nd a simple model for two-dimensional matrix simulation. 2. Experimental
Fig. 1. Sketch of the device with the thickness of dierent layers.
2.1. Device preparation The device is realised starting from a textured p type crystalline wafer with 1 X cm resistivity and á1 0 0ñ orientation. The use of crystalline textured surface reduces the mechanical stress in amorphous silicon, ensures a good adhesion of amorphous ®lm and increases the light absorption. Dry etching cleaning procedure with CF4 /O2 plasma is performed in order to remove the crystalline surface damage and native oxide before amorphous layer deposition. Also, crystalline surface passivation to hydrogen plasma etching and diusion, which occurs during amorphous layer deposition, is obtained [6]. Amorphous silicon layers are deposited by PECVD following the recipe reported in Table 1. Particular care is given to n layer deposition in order to form a good heterojunction with the crystalline substrate. To this aim, we used previous results obtained for heterojunction solar cells [7]. The top contact of the device is ensured by 90 nm thick ITO layer and a silver grid, both deposited by e-beam evaporation. The ITO and silver grid thicknesses are chosen in order to maximise the light transmittance and the photogenerated carrier collection on the basis of previous works [8]. The top grid is patterned by a standard photolithographic process and the active area obtained was 1.26 cm2 . The back contact is obtained by conventional screen printed aluminium silver paste, which also ensures a back surface ®eld for the bottom n amorphous p crystalline silicon heterostructure. Obviously, this layer is realised before amorphous layer deposition, because of the high temperature required to dry the aluminium silver paste and to obtain Table 1 Deposition parameters of amorphous layers Layer
p a-SiC
i a-Si : H
n a-Si : H
Gas ¯ow (sccm)
SiH4 : 20 CH4 : 46.7 B2 H6 : 15
SiH4 : 42
SiH4 : 20 PH3 : 10
Pressure (mTorr) RF (mW/cm2 ) Temperature (°C) Thickness (A)
700 17 220 50
700 23 240 2100
200 14 240 13 000
a good ohmic contact with the crystalline wafer. In Fig. 1, a schematic of the device is reported with the indication of the thicknesses of the amorphous layers. 2.2. Device characterisation The samples are characterised by steady-state and transient measurements. In the steady-state, we performed current voltage (I±V) measurements at room temperature in the dark and in A.M.1.5 illumination conditions ®ltered at 500 and 800 nm with narrow ®lters (full width half maximum, FWHM 10 nm). The light intensity is adjusted to obtain 0.45 mW/cm2 for both radiations. Quantum yield (QY) is also measured under dierent bias conditions to evaluate spectral separation. In the transient measurements, we estimated the response for a time varying bias and continuous wavelength (CW) visible and infrared illumination, to ®nd the times needed for detection of the dierent spectral components. Also, photocurrent voltage characteristics with dierent illumination intensities are performed to evaluate the linear response of the device. 3. Results and discussion 3.1. Device operation The choice of the thickness of amorphous silicon layers is made on the basis of the following considerations: since the p layer is the window layer of the device, it has to be suciently thin and transparent in order to increase the light transmittance into the device; therefore, we used a 5 nm thick silicon carbide (a-SiC) layer. The i layer is an active material for the photogeneration and its thickness is related to the spectrum detection range in the visible light. Choosing a 1.3 lm thick n layer, we satis®ed two aims: the ®rst is to avoid a complete depletion of the layer and transistor eect in the device and obtain an eective separation between p±i±n a-Si : H junction and n±p amorphous crystalline heterojunction, the second is to ®lter the incident light
M. Tucci, R. DeRosa / Solid-State Electronics 44 (2000) 1315±1320
before the crystalline material to increase the spectral separation between the two regions of the spectrum detected by the single diode. Then, the device is similar to a back-to-back diode. The applied voltage at the external electrodes (VA ) forward biases one diode and reverse biases the other one. When a negative bias is applied to the top contact, respect to the grounded back contact, the crystalline p±n junction is reversely biased and limits the current in the device. The visible spectrum of the impinging light was absorbed in the amorphous layers and only the long-wavelength region of the spectrum radiation reached the c-Si junction. Then, the measured current is due to the carriers photogenerated in the p-doped crystalline material, where they moved by diusion. On the other side, when the amorphous p±i±n diode is reversely biased, the measured current is due to the carriers photogenerated in the a-Si : H intrinsic layer, where they move by drift. Short wavelengths are then detected. 3.2. Analytical model A more precise choice of the thicknesses of the amorphous silicon layers, discussed above, is obtained with the aid of a simple analytical model of the photocurrent produced by the two diodes in stacked structure. The photocurrent of the top diode is described taking into account the absorption coecients and thicknesses of the dierent materials, the diusion length in the c-Si (Lc ) and the mobility±lifetime product in the amorphous silicon layers (ls)a . In particular, for the amorphous p±i±n structure, we referred to the Crandall analytical relation between photocurrent and applied voltage at a ®xed wavelength [9]:
lsa Iph;a
k; VA qAGa
k
Vbin ÿ
VA Vc;c di ÿdi2 ; 1 ÿ exp
Vbin ÿ
VA Vc;c
lsa
1 where q is the electron charge, A, the device area, Ga (k), the number of electron±hole pair photogenerated per unit volume per second, Vbin , the built-in voltage of the p±i±n junction, VA the applied voltage, Vc;c , the potential drop across the forward biased crystalline junction and di , the thickness of the intrinsic layer. This equation is valid under the hypothesis of a constant electric ®eld in the intrinsic layer. The generation rate Ga (k) per unit volume per second in the intrinsic amorphous layer is a function of wavelength, k, by the following relation: Ga
k
ÿ N
kTITO
k exp ÿ aa-SiC
kdp di 1 ÿ exp
ÿ aa-Si
kdi ;
2
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where N(k) is the number of incident photons per square centimetre per second, TITO (k), the transmittance of the ITO electrode, aa-SiC (k) and aa-Si (k) are the absorption coecients [10,11] of the a-SiC : H window layer and of the a-Si : H layer, respectively, and dp is the thickness of the p doped amorphous layer. The photocurrent in the amorphous/crystalline silicon heterojunction can be expressed as a sum of two terms. The ®rst is a constant photocurrent arising from the crystalline bulk material, taking into account the ®ltering of the p±i±n amorphous layers. The second is the recombination that occurs in the depletion region of the crystalline silicon and at the heterojunction interface. We considered the depletion region only on the crystalline side because defects at the interface and towards amorphous n layer, dramatically reduce the depletion in the amorphous material. Then, we obtain the following expression: dc ni ÿ
VA ÿ Vc;a ; Iph;c
k; VA qA Gc
kW ÿ exp 2VT 2seff
3 where Gc (k) is the generation per unit volume per second in the crystalline diode, W, the thickness of the heterostructure diode, ni , the intrinsic carrier concentration in the crystalline silicon, dc , the depletion region in the crystalline diode as a square root function of the applied voltage, Vc;a , the potential drop across the forward biased amorphous junction and VT , the thermal equivalent voltage (0.026 V); seff is the eective lifetime that takes into account recombination velocity S at the amorphous crystalline interface and lifetime sr in the depletion region of the crystalline silicon: 1 1 S : seff sr W
4
The generation rate Gc (k) per unit volume per second is expressed by the following equation: Gc
k
N
kTITO
k exp ÿ aa-SiC dp ÿ aa-Si
di dn W exp
ÿ ac-Si dc 1ÿ ; 1 ac-Si Lc
5
where dn is the thickness of n-doped a-Si : H and Lc , the diusion length in the crystalline bulk material and ac-Si (k) is the absorption coecient of the crystalline silicon [12]. Using these photocurrents, we estimated the QY: Iph;a
k; VA ÿ Iph;c
k; VA QY
k; VA :
6 qAN
k In Fig. 2, the photocurrents of the device for two dierent illumination conditions are presented. We used
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M. Tucci, R. DeRosa / Solid-State Electronics 44 (2000) 1315±1320 Table 2 Fitting parameters used in the analytical model
Fig. 2. Analytical model (lines) and measured (markers) photocurrent of the device under 0.45 mW/cm2 incident light, ®ltered at 500 and 800 nm. The active area of the device is 1.26 cm2 .
a halogen lamp ®ltered by two narrow ®lters centred at 500 and 800 nm. (FWHM 10 nm). In the same ®gure, the theoretical model is also depicted. In Fig. 3 is shown the good agreement between measurements and simulation of QY. In the measurements, we consider the internal quantum yield taking into account the re¯ection of the ITO layer. From the photocurrent measurements, we deduced the better bias conditions to perform spectral separation. We ®xed VA 0:5 V because of increasing dark value with the applied voltage that reduces the photocurrent especially in case of the amorphous diode is reversely biased. In Fig. 2, this reduction is quite evident for bias voltage below )1 V. The thicknesses of the amorphous layers used in the model are close (less than 5% variation) to those reported in Table 1. The values of the parameters used in the analytical model are reported in Table 2. We remark
Fig. 3. Analytical model (lines) and measured (markers) QY of the device in dierent bias conditions.
Parameters
Value
Lc (ls)a Vbin Vc;c Vc;a dp di dn dc seff
190 lm 2 ´ 10ÿ9 cm2 /V 1.1 V 0.8 V 0.9 V 5 nm 220 nm 1.3 lm 1 lm 7 ´ 10ÿ9 s
that the value chosen for Vc;a and Vc;c takes into account the potential drop across the forward biased junction ®xed by the photocurrent generated by the reverse biased diode. For the sake of simplicity in the model, we ®xed them to the values assumed when the photocurrent reaches a constant value (i.e. at VA 0.5 V). The ITO transmittance, used in the ®tting procedure, is measured with a Lambda 9 Perkin Elmer spectral photometer. On the basis of Eq. (6), the choice of a 1.3 lm n amorphous layer ensures an overlap less than 20% of the two spectra at 650 nm in the two bias conditions. 3.3. Spice simulation In Fig. 4, the equivalent circuit of the stacked structure used in SPICE simulator is shown. This circuit is based on two back-to-back diode accounting for the p±i±n junction and the n±p heterojunction. Two variable current sources simulate the photogeneration in the device. When the photocurrent in the device is due to an incident radiation at 500 nm I1 is on and I2 is o. On the other hand, if the photocurrent in the device is due to an incident radiation at 800 nm I1 is o and I2 is on. Their current values of the current generators I1 and I2 depend on the incident power density of the light. In particular, when they simulate the photocurrent produced by 450 lW/cm2 at 500 and at 800 nm of the incident light their values are I1 320 lA, I2 480 lA.
Fig. 4. Equivalent circuit used in the SPICE transient simulation.
M. Tucci, R. DeRosa / Solid-State Electronics 44 (2000) 1315±1320
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Table 3 Parameters used in SPICE simulation inside the MODEL of the diodes Parameters IS n RS CJO TT M VJ EG IBV IBVL BV NBVL ISR NR
Description Saturation current Emission coecient Parasitic resistance Zero bias capacitance Transit time Grading coecient Built-in potential Energy gap Reverse breakdown current Low level reverse breakdown current Reverse breakdown voltage Low level reverse breakdown ideality Recombination current parameter Emission coecient for ISR
D1
D2 ÿ8
5 ´ 10 A 1.5 1X 180 nF 100 s 0.2 0.9 V 1.72 eV 1 ´ 10ÿ5 A 1.5 ´ 10ÿ2 A 2.22 V 14 1.2 ´ 10ÿ3 A 300
5 ´ 10ÿ7 A 1.4 1X 250 nF 400 s 0.5 0.8 V 1.1 eV 1 ´ 10ÿ10 A 0 1 1 6 ´ 10ÿ5 A 30
Using this model, with the parameters listed in Table 3 for the two diodes, we obtain an agreement between simulation and current voltage experimental measurement of the device performed in dark, under 500 and 800 nm conditions as shown in Fig. 5. Several parameters in the MODEL of the equivalent diode D1, that simulate the amorphous p±i±n diode, are needed to describe the presence of shunts that increase junction breakdown at a low reverse bias voltage. In particular, the parameters ISR (recombination current) and NR (emission coecient for ISR) are able to describe the voltage dependent collection in the amorphous diode. The response to a square wave input under 150 lW/ cm2 CW 500 and 800 nm and in a dark condition is shown in Fig. 6, together with the input waveform and the results of SPICE simulation. In this case, the current generators I1 and I2 in the equivalent circuit were 140 and 200 lA, respectively.
As the two diodes are dierent in thickness and material composition, dierent time constants are expected during positive or negative pulses. Although the absolute value of the time constant obviously depends on the chosen load resistor (1 kX in our experiment), the ratio between the two time constants depended on the physical structure. Thus, the time response of the device takes into account the equivalent capacitance of the two diodes. As the two diodes have a very dierent thickness, we expect a higher value of CJ0 for the rear diode because of the presence of defects at the interface between amorphous and crystalline silicon that greatly reduce the depletion region inside crystalline material. Also, diusion capacitance in the forward bias condition, de®ned as Cdiff TT dI=dV , where TT is the transit time, is expected higher in the rear diode since the total trapped charge is greater and increase in forward bias [13]. In particular, we found a time constant needed to detect
Fig. 5. Measured (markers) and SPICE simulated (lines) current of the device in dark condition and under 0.45 mW/cm2 incident light, ®ltered at 500 and 800 nm with narrow ®lters (FWHM 10 nm).
Fig. 6. Measured (markers) and SPICE simulated (lines) output waveform under external excitation (Vin ) of the device in the dark condition and under 0.15 mW/cm2 incident light, ®ltered at 500 and 800 nm with narrow ®lters (FWHM 10 nm).
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at the two electrodes. The device has been optimized with the aim of an analytical model of the photocurrent of the stacked structure and is simulated with a SPICE simulator in steady-state and transient conditions. Steady-state measurements have shown high rejection ratios, excellent spectral separation and linearity behaviour over three orders of magnitude of monochromatic incident light, simply by controlling bias conditions. Finally, transient measurements indicate that the speed of the device in the light component detection is much dependent on the speed of the p±i±n amorphous diode. Fig. 7. Linear behaviour of the photocurrent of the device, in the two bias conditions, under dierent light intensities ®ltered at 500 and 800 nm. The line acts as a guide to the eye.
the CW 500 nm much longer than in the case of CW 800 nm. 3.4. Linear behaviour Linear behaviour of the device is measured over three orders of magnitude of the incident light under dierent wavelengths and bias conditions as shown in Fig. 7. Also, in this case, the light is ®ltered by a narrow ®lter (FWHM 10 nm) centred at 500 and 800 nm. The typical linear behaviour of the crystalline silicon is found in the case of photogeneration in the heterojunction diode. While a slight nonlinearity eect occurred in the photocurrent of the amorphous diode in lower and higher power regime. 4. Conclusions We investigated the stacked structure obtained with a p±i±n diode deposited on a p crystalline wafer. This device behaves as a photosensor in the visible and in the infrared spectrum depending on the applied bias voltage
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