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Deep levels in silicon carbide Schottky diodes
Applied Surface Science 187 (2002) 248–252
Deep levels in silicon carbide Schottky diodes A. Castaldinia, A. Cavallinia,*, L. Polentaa, F. Navab, C. Canalic, C. Lanzierid a
INFM and Dipartimento di Fisica, Universita` di Bologna, Viale C. Berti Pichat 6/2, I-40127 Bologna, Italy b INFM and Dipartimento di Fisica, Modena, Italy c INFM and Dipartimento di Scienze dell’Ingegneria, Modena, Italy d ALENIA-MARCONI System, Rome, Italy Received 10 November 2001; accepted 17 November 2001
Abstract Native or process-induced defective states may significantly affect the transport properties of silicon carbide devices. For this reason, it is of major importance to detect them and, when possible, to identify their origin. This contribution deals with the deep levels detected by deep level transient spectroscopy analyses in silicon carbide Schottky detectors. Current–voltage and capacitance–voltage characteristics have also been studied to investigate Schottky barrier properties and diode quality. On the basis of the comparison with literature data, some of the deep levels found can be attributed to impurities introduced during growth. # 2002 Elsevier Science B.V. All rights reserved. Keywords: Silicon carbide; Deep levels; DLTS; ICTS; Capture cross-section
1. Introduction Recently silicon carbide (SiC) has arisen great interest because of its peculiar properties, which are very relevant to technological applications. Indeed, SiC exhibits fundamental properties such as high drift velocity, high breakdown field, high thermal conductivity, high power operations capability and high radiation hardness that make it a prospective material for high power, high temperature and high frequency devices as well as for radiation detectors operating at high temperature. To these applications, it is necessary to know and control the defects introduced within the forbidden gap during growth or due to processes [1–3]. This contribution deals with the electrical characterization by current–voltage (I–V) and capacitance– *
Corresponding author. Tel.: þ39-51-6305108; fax: þ39-51-6305153. E-mail address: [email protected] (A. Cavallini).
voltage (C–V) measurements and by capacitance transient spectroscopies such as DLTS (deep level transient spectroscopy) and ICTS (isothermal capacitance transient spectroscopy) in order to detect and locate the energy levels of defects present in 4H–SiC based Schottky diodes. We found that a few levels are likely due to the Schottky contact preparation. These results remark the well-known problem of reaching a good technological maturation in SiC device fabrication, especially for what concerns contacts realization (ohmic, Schottky, p–n junctions) where a fundamental and systematic research to individuate the best conditions of device realization, is still lacking.
2. Experimental Schottky diodes (Fig. 1) were fabricated by Alenia Marconi Systems on 4H–SiC epitaxial wafers purchased from CREE Research [4]. The n-type active
0169-4332/02/$ – see front matter # 2002 Elsevier Science B.V. All rights reserved. PII: S 0 1 6 9 - 4 3 3 2 ( 0 1 ) 0 0 9 9 3 - X
A. Castaldini et al. / Applied Surface Science 187 (2002) 248–252
Fig. 1. Diode structure.
249
Fig. 2. Current–voltage characteristics and relevant fitting parameters.
layer is 30 mm thick. The doping concentration, determined by the C–V characteristics, is 1:98 1015 cm3. This layer was grown on a 1 mm thick buffer, doped with 1 1018 cm3 nitrogen atoms. The substrate is 320 mm thick, n-type, featuring a dopant (N) concentration of 6:8 1018 cm3. The Schottky contact (wafer frontside) was obtained by e-beam deposition of a gold film (thickness 100 nm, diameter 2 mm). The ohmic contact was obtained by e-beam deposition of Ti/Pt/Au on the backside, carbon surface of the wafer. No heat treatment was performed after metallization.
3. I–V and C–V characteristics The diode ideality factor and the series resistance have been determined from the data fitting [5] of the I–V characteristics obtained at room temperature (Fig. 2). The series resistance rs is 12 O and the ideality factor n is 1.18, values that asset the good quality of the diode. Moreover, the reverse current is very low, keeping below 1010 A up to bias voltages around 50 V. Capacitance–voltage measurements (Fig. 3) have been performed in the range 100 Hz–1 MHz. The C–V characteristics confirm the Neff value of about 2:0 1015 cm3 given by CREE, which evidences that the diode space-charge-region is free of deep states in concentration comparable to doping density. The diode barrier height fB ¼ q (Vin–Vn1/kT) is 1.38 eV, where Vin is the intercept of the experimental
Fig. 3. Capacitance–voltage characteristics at 1 kHz.
point interpolation line on the x-axis and Vn the distance of the Fermi level from the bottom of the conduction band [6].
4. Spectroscopic characterization In order to detect the deep levels possibly present within the forbidden gap, ICTS and DLTS analyses were performed, which measured both the energy position in the gap, capture cross section and concentration of the deep levels. Indeed, the analysis of the capacitance transients performed under isothermal conditions (ICTS) [9] is a powerful method for studying deep levels in
250
A. Castaldini et al. / Applied Surface Science 187 (2002) 248–252
Fig. 4. ICTS diagrams relevant to the S0 trap located at 0.06 eV below the conductance band.
semiconductors that could not be suitably analyzed by DLTS because of their thermal emission characteristics, as will be shown in the following. In ICTS, the transient change of capacitance subsequent to an injection pulse is analyzed in the time domain. The information obtained is equivalent to that of DLTS, but ICTS is more successful to study levels that present low carrier emission in conditions of temperature and/ or emission rate favorable to significantly detect most of the other levels. As an example, by ICTS it was possible to evidence a level located at about 0.06 eV
Fig. 5. DLTS spectrum obtained from cryogenic (20 K) to high temperature (650 K) conditions.
(Fig. 4) below the conduction band even at temperatures higher than the liquid nitrogen temperature, while this level was not detectable at the same temperature by DLTS. The DLTS spectra were also obtained with positive filling bias in order to distinguish between energy levels present in the bulk and levels at the metallization–epilayer interface. As a matter of fact, the presence of an interfacial layer can affect DLTS spectra [7] and the application of a filling forward bias higher than the metal-Fermi
Fig. 6. DLTS spectra performed at different polarization conditions to distinguish between in-depth and surface-located levels.
A. Castaldini et al. / Applied Surface Science 187 (2002) 248–252
251
Table 1 Deep levels detected by DLTS and ICTS techniquesa
Energy (Ev) s (1015 cm2), Arrhenius s (1015 cm2), pulse-width NT (1012 cm3) a
S0
S1
S2
S3
S4
S5
0.06 0.045
0.17 6.5 4.1 8.9
0.32 2600
0.40 3.7
0.77 20
4.5
14
0.92 92 1.1 22
9.6
0.6
S6 1.1 1.5 42
Energy value, capture cross-section and concentration calculated from spectra analyses are reported.
Fig. 7. Pulse-width method for capture cross-section determination. In the inset the peak height trend vs. pulse time is shown.
level [8] makes it possible to fill the interface states and therefore demonstrate their presence. A DLTS spectra performed with a reverse bias equal to 4 V and a positive filling pulse equal to þ1 V is shown in Fig. 5. In such filling conditions both bulk traps and traps at the Schottky contact–bulk interface are detectable. Seven traps are clearly visible in Fig. 5, even if other two traps peaked at about 275 and 440 K were found to be present. As shown in Fig. 6, the two peaks at EC ¼ 0:40 and 0:77 eV (S3 and S4) appear only when using forward filling pulses greater than the reverse bias (then in biasing conditions ranging from negative values to values higher than 0 V). From this finding, we can infer that these peaks are spatially located at the Schottky contact–bulk interface. Table 1 reports activation energy, capture cross-section and, when it is possible to reliably determine them, concentration of
the detected levels. The capture cross-sections were in a few cases determined not only by the Arrhenius plot but also by the filling pulse method (Fig. 7).
5. Discussion The proposed structure relevant to deep levels detected is mainly attributable to impurities on the basis of literature specific studies. It is known that most of the intrinsic defects are located in the upper half of the band gap [3], thus DLTS and ICTS can be considered as exhaustive tools to individuate the majority of them. Defect-nature assignments are not easy in SiC due to the presence of different polytypes and because even in a single polytype, a particular defect can occupy crystallographically nonequivalent (hexagonal
252
A. Castaldini et al. / Applied Surface Science 187 (2002) 248–252
or cubic) lattice sites in the large unit cell, corresponding to different energy levels [1,3]. For this reason, the ‘‘zoology’’ devoted to impurities and intrinsic defects in SiC is quite wide and careful attention has to be paid in result interpretation. At this stage of our research, we can tentatively identify the detected deep levels by comparing their activation energy and capture cross-section resulting from the Arrhenius plot to the data from literature. Furthermore, two of the deep levels revealed in this work can be attributed to the near-surface region even if their origin is at the moment unknown. The labeled S0 level, located at EC 0.06 eV, can be attributed to nitrogen impurities substituting at lattice sites [1–3,10]. In fact, N atoms work as donors in hexagonal (EC 0.052 eV) and cubic sites (EC 0.10 eV), with the lowest ionization energy of all the impurity donor levels. Its energetic location, together with its high solubility in SiC, makes the nitrogen a widely used n-type dopant. Transition metals (TMs) have been studied in great detail in SiC since they are known to be common contaminants in many semiconductors. Indeed, they were found to be important trace impurities, which are unavoidable in the material growth by different techniques [11]. Level S1, located at EC 0.17 eV, corresponds to energy levels attributed to chromium or titanium atoms (acceptor-like behavior) in hexagonal position [1,3,12,13]. Characterized by similar DLTS signatures, these levels need further investigations to clearly assign them a sure identification. S2 level, located at EC 0.32 eV, and the S3 and S4 found in different bias conditions deserve a common discussion. In fact, as already observed [3,14], complex oxygen atoms have been found at EC 0.32 eV, EC 0.44 eV and EC 0.74 eV, energy positions very similar to our levels. Moreover, the S2 peak seems to disappear with positive filling pulse, while S3 and S4 levels prevail, which can be related to the higher concentration of oxygen-related defects near the surface [15] in different configurations and complexes [16]. It is worth noting that while these defects are likely related to oxygen atoms, the high quality of the diodes inferred by its electrical characteristics excludes the significant presence of oxide at the metallization–silicon carbide interface.
The S5, the V-level has been found in relatively high concentration and very well-known impurity in SiC; it forms the acceptor level found at EC 0.91 eV and deeper donor levels which compensates with boron impurities [1]. The V peak is often found in as-grown samples because of growth conditions [3]. Moreover, the S6 level, located at EC 1.1 eV has been attributed to intrinsic defects [1].
6. Conclusions In summary, we performed electrical and spectroscopic characterization of CVD 4H:SiC diodes. Our findings support the existence of a nonhomogeneous interface between metallization and substrate mainly due to oxygen-related defects. Other impurity-related signals have been found.
References [1] [2] [3] [4] [5] [6] [7]
[8] [9] [10] [11]
[12] [13] [14] [15] [16]
A.A. Lebedev, Semiconductors 33 (1999) 107. G. Pensl, W.J. Choyke, Physica B 185 (1993) 264. T. Dalibor et al., Phys. Stat. Sol. A 162 (1997) 199. F. Nava, P. Vanni, C. Lanzieri, C. Canali, Nucl. Instrum. Meth. A 437 (1999) 354. D. Donoval, J. de Sousa Pires, P. Tove, R. Harmen, Solid State Electron. 32 (1989) 961. C. Schro¨ der, W. Hieland, R. Held, W. Loose, Appl. Phys. Lett. 68 (1996) 1957. P. Blood, J.W. Orton, The Electrical Characterization of Semiconductors: Majority Carriers and Electron States, Academic Press, London, 1992. H. Zhang, Y. Aoyagi, S. Iwai, S. Namba, Appl. Phys. A 44 (1987) 273. H. Okushi, Y. Tokomaru, Jpn. J. Appl. Phys. 19 (1980) L335. T. Kimoto et al., Appl. Phys. Lett. 67 (1995) 2833. N.T. Son, A. Ellison, M.F. MacMillan, O. Kordina, W.M. Chen, B. Monemar, E. Janzen, Mater. Sci. Forum 264–268 (1998) 603. N. Achtziger, W. Witthuhn, Appl. Phys. Lett. 71 (1997) 110. T. Dalibor et al., G. Pensl, N. Nordell, A. Scho¨ ner, Phys. Rev. B 55 (1997) 13618. T. Dalibor et al., Mater. Sci. Forum 264–268 (1998) 553. A. Evwaraye, S.R. Smith, M. Skowronski, W.C. Mitchell, J. Appl. Phys. 74 (1993) 5269. J.P. Doyle et al., J. Appl. Phys. 84 (1998) 1354.
Deep levels in silicon carbide Schottky diodes A. Castaldinia, A. Cavallinia,*, L. Polentaa, F. Navab, C. Canalic, C. Lanzierid a
INFM and Dipartimento di Fisica, Universita` di Bologna, Viale C. Berti Pichat 6/2, I-40127 Bologna, Italy b INFM and Dipartimento di Fisica, Modena, Italy c INFM and Dipartimento di Scienze dell’Ingegneria, Modena, Italy d ALENIA-MARCONI System, Rome, Italy Received 10 November 2001; accepted 17 November 2001
Abstract Native or process-induced defective states may significantly affect the transport properties of silicon carbide devices. For this reason, it is of major importance to detect them and, when possible, to identify their origin. This contribution deals with the deep levels detected by deep level transient spectroscopy analyses in silicon carbide Schottky detectors. Current–voltage and capacitance–voltage characteristics have also been studied to investigate Schottky barrier properties and diode quality. On the basis of the comparison with literature data, some of the deep levels found can be attributed to impurities introduced during growth. # 2002 Elsevier Science B.V. All rights reserved. Keywords: Silicon carbide; Deep levels; DLTS; ICTS; Capture cross-section
1. Introduction Recently silicon carbide (SiC) has arisen great interest because of its peculiar properties, which are very relevant to technological applications. Indeed, SiC exhibits fundamental properties such as high drift velocity, high breakdown field, high thermal conductivity, high power operations capability and high radiation hardness that make it a prospective material for high power, high temperature and high frequency devices as well as for radiation detectors operating at high temperature. To these applications, it is necessary to know and control the defects introduced within the forbidden gap during growth or due to processes [1–3]. This contribution deals with the electrical characterization by current–voltage (I–V) and capacitance– *
Corresponding author. Tel.: þ39-51-6305108; fax: þ39-51-6305153. E-mail address: [email protected] (A. Cavallini).
voltage (C–V) measurements and by capacitance transient spectroscopies such as DLTS (deep level transient spectroscopy) and ICTS (isothermal capacitance transient spectroscopy) in order to detect and locate the energy levels of defects present in 4H–SiC based Schottky diodes. We found that a few levels are likely due to the Schottky contact preparation. These results remark the well-known problem of reaching a good technological maturation in SiC device fabrication, especially for what concerns contacts realization (ohmic, Schottky, p–n junctions) where a fundamental and systematic research to individuate the best conditions of device realization, is still lacking.
2. Experimental Schottky diodes (Fig. 1) were fabricated by Alenia Marconi Systems on 4H–SiC epitaxial wafers purchased from CREE Research [4]. The n-type active
0169-4332/02/$ – see front matter # 2002 Elsevier Science B.V. All rights reserved. PII: S 0 1 6 9 - 4 3 3 2 ( 0 1 ) 0 0 9 9 3 - X
A. Castaldini et al. / Applied Surface Science 187 (2002) 248–252
Fig. 1. Diode structure.
249
Fig. 2. Current–voltage characteristics and relevant fitting parameters.
layer is 30 mm thick. The doping concentration, determined by the C–V characteristics, is 1:98 1015 cm3. This layer was grown on a 1 mm thick buffer, doped with 1 1018 cm3 nitrogen atoms. The substrate is 320 mm thick, n-type, featuring a dopant (N) concentration of 6:8 1018 cm3. The Schottky contact (wafer frontside) was obtained by e-beam deposition of a gold film (thickness 100 nm, diameter 2 mm). The ohmic contact was obtained by e-beam deposition of Ti/Pt/Au on the backside, carbon surface of the wafer. No heat treatment was performed after metallization.
3. I–V and C–V characteristics The diode ideality factor and the series resistance have been determined from the data fitting [5] of the I–V characteristics obtained at room temperature (Fig. 2). The series resistance rs is 12 O and the ideality factor n is 1.18, values that asset the good quality of the diode. Moreover, the reverse current is very low, keeping below 1010 A up to bias voltages around 50 V. Capacitance–voltage measurements (Fig. 3) have been performed in the range 100 Hz–1 MHz. The C–V characteristics confirm the Neff value of about 2:0 1015 cm3 given by CREE, which evidences that the diode space-charge-region is free of deep states in concentration comparable to doping density. The diode barrier height fB ¼ q (Vin–Vn1/kT) is 1.38 eV, where Vin is the intercept of the experimental
Fig. 3. Capacitance–voltage characteristics at 1 kHz.
point interpolation line on the x-axis and Vn the distance of the Fermi level from the bottom of the conduction band [6].
4. Spectroscopic characterization In order to detect the deep levels possibly present within the forbidden gap, ICTS and DLTS analyses were performed, which measured both the energy position in the gap, capture cross section and concentration of the deep levels. Indeed, the analysis of the capacitance transients performed under isothermal conditions (ICTS) [9] is a powerful method for studying deep levels in
250
A. Castaldini et al. / Applied Surface Science 187 (2002) 248–252
Fig. 4. ICTS diagrams relevant to the S0 trap located at 0.06 eV below the conductance band.
semiconductors that could not be suitably analyzed by DLTS because of their thermal emission characteristics, as will be shown in the following. In ICTS, the transient change of capacitance subsequent to an injection pulse is analyzed in the time domain. The information obtained is equivalent to that of DLTS, but ICTS is more successful to study levels that present low carrier emission in conditions of temperature and/ or emission rate favorable to significantly detect most of the other levels. As an example, by ICTS it was possible to evidence a level located at about 0.06 eV
Fig. 5. DLTS spectrum obtained from cryogenic (20 K) to high temperature (650 K) conditions.
(Fig. 4) below the conduction band even at temperatures higher than the liquid nitrogen temperature, while this level was not detectable at the same temperature by DLTS. The DLTS spectra were also obtained with positive filling bias in order to distinguish between energy levels present in the bulk and levels at the metallization–epilayer interface. As a matter of fact, the presence of an interfacial layer can affect DLTS spectra [7] and the application of a filling forward bias higher than the metal-Fermi
Fig. 6. DLTS spectra performed at different polarization conditions to distinguish between in-depth and surface-located levels.
A. Castaldini et al. / Applied Surface Science 187 (2002) 248–252
251
Table 1 Deep levels detected by DLTS and ICTS techniquesa
Energy (Ev) s (1015 cm2), Arrhenius s (1015 cm2), pulse-width NT (1012 cm3) a
S0
S1
S2
S3
S4
S5
0.06 0.045
0.17 6.5 4.1 8.9
0.32 2600
0.40 3.7
0.77 20
4.5
14
0.92 92 1.1 22
9.6
0.6
S6 1.1 1.5 42
Energy value, capture cross-section and concentration calculated from spectra analyses are reported.
Fig. 7. Pulse-width method for capture cross-section determination. In the inset the peak height trend vs. pulse time is shown.
level [8] makes it possible to fill the interface states and therefore demonstrate their presence. A DLTS spectra performed with a reverse bias equal to 4 V and a positive filling pulse equal to þ1 V is shown in Fig. 5. In such filling conditions both bulk traps and traps at the Schottky contact–bulk interface are detectable. Seven traps are clearly visible in Fig. 5, even if other two traps peaked at about 275 and 440 K were found to be present. As shown in Fig. 6, the two peaks at EC ¼ 0:40 and 0:77 eV (S3 and S4) appear only when using forward filling pulses greater than the reverse bias (then in biasing conditions ranging from negative values to values higher than 0 V). From this finding, we can infer that these peaks are spatially located at the Schottky contact–bulk interface. Table 1 reports activation energy, capture cross-section and, when it is possible to reliably determine them, concentration of
the detected levels. The capture cross-sections were in a few cases determined not only by the Arrhenius plot but also by the filling pulse method (Fig. 7).
5. Discussion The proposed structure relevant to deep levels detected is mainly attributable to impurities on the basis of literature specific studies. It is known that most of the intrinsic defects are located in the upper half of the band gap [3], thus DLTS and ICTS can be considered as exhaustive tools to individuate the majority of them. Defect-nature assignments are not easy in SiC due to the presence of different polytypes and because even in a single polytype, a particular defect can occupy crystallographically nonequivalent (hexagonal
252
A. Castaldini et al. / Applied Surface Science 187 (2002) 248–252
or cubic) lattice sites in the large unit cell, corresponding to different energy levels [1,3]. For this reason, the ‘‘zoology’’ devoted to impurities and intrinsic defects in SiC is quite wide and careful attention has to be paid in result interpretation. At this stage of our research, we can tentatively identify the detected deep levels by comparing their activation energy and capture cross-section resulting from the Arrhenius plot to the data from literature. Furthermore, two of the deep levels revealed in this work can be attributed to the near-surface region even if their origin is at the moment unknown. The labeled S0 level, located at EC 0.06 eV, can be attributed to nitrogen impurities substituting at lattice sites [1–3,10]. In fact, N atoms work as donors in hexagonal (EC 0.052 eV) and cubic sites (EC 0.10 eV), with the lowest ionization energy of all the impurity donor levels. Its energetic location, together with its high solubility in SiC, makes the nitrogen a widely used n-type dopant. Transition metals (TMs) have been studied in great detail in SiC since they are known to be common contaminants in many semiconductors. Indeed, they were found to be important trace impurities, which are unavoidable in the material growth by different techniques [11]. Level S1, located at EC 0.17 eV, corresponds to energy levels attributed to chromium or titanium atoms (acceptor-like behavior) in hexagonal position [1,3,12,13]. Characterized by similar DLTS signatures, these levels need further investigations to clearly assign them a sure identification. S2 level, located at EC 0.32 eV, and the S3 and S4 found in different bias conditions deserve a common discussion. In fact, as already observed [3,14], complex oxygen atoms have been found at EC 0.32 eV, EC 0.44 eV and EC 0.74 eV, energy positions very similar to our levels. Moreover, the S2 peak seems to disappear with positive filling pulse, while S3 and S4 levels prevail, which can be related to the higher concentration of oxygen-related defects near the surface [15] in different configurations and complexes [16]. It is worth noting that while these defects are likely related to oxygen atoms, the high quality of the diodes inferred by its electrical characteristics excludes the significant presence of oxide at the metallization–silicon carbide interface.
The S5, the V-level has been found in relatively high concentration and very well-known impurity in SiC; it forms the acceptor level found at EC 0.91 eV and deeper donor levels which compensates with boron impurities [1]. The V peak is often found in as-grown samples because of growth conditions [3]. Moreover, the S6 level, located at EC 1.1 eV has been attributed to intrinsic defects [1].
6. Conclusions In summary, we performed electrical and spectroscopic characterization of CVD 4H:SiC diodes. Our findings support the existence of a nonhomogeneous interface between metallization and substrate mainly due to oxygen-related defects. Other impurity-related signals have been found.
References [1] [2] [3] [4] [5] [6] [7]
[8] [9] [10] [11]
[12] [13] [14] [15] [16]
A.A. Lebedev, Semiconductors 33 (1999) 107. G. Pensl, W.J. Choyke, Physica B 185 (1993) 264. T. Dalibor et al., Phys. Stat. Sol. A 162 (1997) 199. F. Nava, P. Vanni, C. Lanzieri, C. Canali, Nucl. Instrum. Meth. A 437 (1999) 354. D. Donoval, J. de Sousa Pires, P. Tove, R. Harmen, Solid State Electron. 32 (1989) 961. C. Schro¨ der, W. Hieland, R. Held, W. Loose, Appl. Phys. Lett. 68 (1996) 1957. P. Blood, J.W. Orton, The Electrical Characterization of Semiconductors: Majority Carriers and Electron States, Academic Press, London, 1992. H. Zhang, Y. Aoyagi, S. Iwai, S. Namba, Appl. Phys. A 44 (1987) 273. H. Okushi, Y. Tokomaru, Jpn. J. Appl. Phys. 19 (1980) L335. T. Kimoto et al., Appl. Phys. Lett. 67 (1995) 2833. N.T. Son, A. Ellison, M.F. MacMillan, O. Kordina, W.M. Chen, B. Monemar, E. Janzen, Mater. Sci. Forum 264–268 (1998) 603. N. Achtziger, W. Witthuhn, Appl. Phys. Lett. 71 (1997) 110. T. Dalibor et al., G. Pensl, N. Nordell, A. Scho¨ ner, Phys. Rev. B 55 (1997) 13618. T. Dalibor et al., Mater. Sci. Forum 264–268 (1998) 553. A. Evwaraye, S.R. Smith, M. Skowronski, W.C. Mitchell, J. Appl. Phys. 74 (1993) 5269. J.P. Doyle et al., J. Appl. Phys. 84 (1998) 1354.