Design and characterization of a monolithic CMOS-MEMS mutually injection-locked oscillator for differential resonant sensing

Design and characterization of a monolithic CMOS-MEMS mutually injection-locked oscillator for differential resonant sensing

Sensors and Actuators A 269 (2018) 160–170 Contents lists available at ScienceDirect Sensors and Actuators A: Physical journal homepage: www.elsevie...

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Sensors and Actuators A 269 (2018) 160–170

Contents lists available at ScienceDirect

Sensors and Actuators A: Physical journal homepage: www.elsevier.com/locate/sna

Design and characterization of a monolithic CMOS-MEMS mutually injection-locked oscillator for differential resonant sensing夽 Pierre Prache a,b , Jérôme Juillard a,∗ , Pietro Maris Ferreira a , Núria Barniol b , Marti Riverola b a b

GEEPs, UMR 8507, CNRS, CentraleSupelec, UPMC, Gif-sur-Yvette, France Dpt. Enginyeria Electronica, Univ. Autonoma de Barcelona (UAB), Spain

a r t i c l e

i n f o

Article history: Received 17 July 2017 Received in revised form 9 October 2017 Accepted 9 November 2017 Available online 11 November 2017 Keywords: Microelectromechanical systems CMOS-MEMS Injection-locked oscillators Differential sensing Drift rejection System-on-chip (SOC)

a b s t r a c t This paper presents a proof of concept of a differential sensor based on the phase-difference of two injection-locked MEMS resonators, strongly coupled through their actuation voltages by a digital mixer. For the first time the feasibility of a fully monolithically co-integrated CMOS-MEMS differential resonant sensor, exploiting the capabilities of the injection-locked synchronization is proved. The principle of the system is first presented, from which optimal design guidelines are derived. The design of the different blocks of the system is then addressed. Our experimental results demonstrate the sensitivity enhancement of the proposed solution, as predicted by theory, and partial thermal drift rejection in a 70 ◦ C range. The simulated and experimental results highlight the critical points of the system design, on which the emphasis of this article is placed. © 2017 Elsevier B.V. All rights reserved.

1. Introduction Resonant sensors [1] exploit the sensitivity of the natural frequency of a mechanical structure to the physical quantity to be sensed (the measurand). As in every sensor, the sensitivity to the measurand must be maximized, and the sensitivity to every other external parameter (noises and drifts) minimized or compensated. Although MEMS resonators have several features making them attractive for VLSI resonant sensing applications (reduced size, large quality factor Q [2]), their sensitivity to temperature, through thermal softening and thermal expansion, is an issue, leading to natural frequency shifts that are not related to the physical quantity to be measured. The natural frequency drift of a MEMS resonator may be compensated if temperature is accurately measured with a separate thermometer, or if a differential sensing scheme is used. VLSI-compatible thermometers may be implemented either in the CMOS part or in the MEMS part of the system. However, the resolution of state-of-the-art CMOS-compatible thermometers (e.g.

夽 This work has been partially funded by the Spanish Government and the European Union FEDER program under project TEC2015-66337-R (MINECO-FEDER). ∗ Corresponding author. E-mail addresses: [email protected] (P. Prache), [email protected] (J. Juillard), [email protected] (N. Barniol). https://doi.org/10.1016/j.sna.2017.11.025 0924-4247/© 2017 Elsevier B.V. All rights reserved.

based on bipolar junction transistors [3], or inverter chains [4]) is between 20 mK and 1 K [5] which is poor compared to thermistorbased solutions, and might not be sufficient to match the frequency stability standards [6]. Furthermore, the CMOS part of the system may not be at the same temperature as the MEMS resonator, which is another source of inaccuracy. Better resolution (20 ␮K in [7]) can be achieved by using another MEMS resonator [8,9] or another mode of the same resonator [10,11] as a dedicated thermometer. The temperature data is then used to correct the frequency of the MEMS resonant sensor and enable drift-free sensing. However, frequency correction requires careful calibration of both resonators/modes, in order to determine their precise temperature coefficients, and entails added cost and complexity to the system development. Alternatively to these approaches, or to complement them, one may use a differential sensing scheme, in which two similar MEMS oscillator loops are used, with the same environmental conditions, hence the same drift (thermal or otherwise), but different sensitivities to the measurand [8]. However, getting two oscillation loops with similar frequencies to operate independently while in close proximity may prove challenging, because of adverse electrical/mechanical coupling phenomena [9]. Note that proper electrical and mechanical isolation may suppress spurious couplings between two oscillator loops. However, whatever form this isolation takes, it must also be designed to minimize temperature

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gradients and dispersions, or drift will not be properly rejected. We think that these design objectives (achieving high electromechanical isolation, with low thermal isolation and little dispersion) are somehow in contradiction and may be difficult to achieve at the same time. The present paper explores an alternative differential resonant sensing scheme, based on the synchronized operation of two resonators, as first introduced in [12] and analyzed in [13], that is enabled by coupling rather than being limited by it. We demonstrate for the first-time the feasibility of this concept in a VLSI-compatible approach, using monolithic CMOS-MEMS co-integration in a standard process. This work aims at filling a gap between dual-mode sensors (with more demanding circuit and resonator design, but better temperature rejection) and uncoupled oscillators (with more straightforward circuit design, best measurement range, but poorer temperature rejection). The outline of the paper is as follows: several solutions for differential resonant sensing are described in Section 2, leading to the investigation of architectures based on synchronized resonators. In Section 3, the properties of the chosen architecture are described from a system-level perspective, along with the design constraints they entail. Section 4 explains how these constraints can be met through chip design, and co-integration of the CMOS-MEMS synchronized oscillator. In section 5 our experimental results are presented, and compared to the theoretical predictions. Section 6 contains some concluding remarks and perspectives.

2. Differential resonant sensing solutions The most straightforward approach to differential resonant sensing is to design two nominally-identical resonators with similar natural frequencies, the same thermal drift, but different sensitivities to the measurand. For example, one resonator undergoes compressive axial stress when an acceleration is sensed, whereas the other is subject to (opposite) tensile axial stress. Each resonator is placed in a separate oscillation loop: the difference of the individual oscillation frequencies is then theoretically driftfree. This approach has been successfully implemented in [8] and more recently in [14] for temperature compensation in accelerometers. As mentioned in Section 1, drift is properly eliminated only if the two resonators are at the same temperature. The main design challenge of this approach is then to have two separate oscillation loops in close proximity to each other, in order to minimize thermal gradients, and to avoid detrimental phenomena caused by parasitic (electrical or mechanical) coupling [9]. In fact, coupling may induce frequency-locking of the oscillator loops [15–17], which would translate as a dead zone in the sensor response. This issue may be circumvented by using resonators (or resonator modes) with very different natural frequencies [18,19] but this comes at the cost of added system complexity and more calibration steps. Two alternatives to the previous approach have recently emerged. The first one relies on mode-localization phenomena in coupled resonators [20]: it is extensively reviewed in [21]. In this approach, two (or more) nominally-identical resonators are voluntarily coupled through a mechanical [22] or electrostatic [20,23] restoring force, that is small compared to the intrinsic restoring force of each resonator. This passive coupling scheme leads to energy transfer between them, and to a mode-localization phenomenon that can be used for sensing. For example, the ratio of the modal amplitudes of two weakly-coupled resonators provides a highly-sensitive measurement of the natural frequency mismatch of the resonators [24], which was theoretically and experimentally proved to be drift-free [25]. The sensitivity of this technique is theoretically (limited to) Q times that of a conventional resonant sensor, yet it can be shown that this larger sensitivity entails no resolution enhancement [26]. Although this approach is drift-free, and takes

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advantage of couplings rather than being hindered by them, it has a few limitations. First of all, it relies on amplitude measurements and therefore requires high resolution analog-to-digital converters (although other output metrics than amplitude ratios may be used [24]). Furthermore, as considered in [25], it is an open-loop technique that requires that an external excitation signal be swept over a frequency band of interest, with unavoidable penalties in terms of response time, although solutions for closing the loop have recently been investigated [27,28]. The other emerging alternative is to synchronize two oscillators through active coupling, and exploit the properties of the resulting phase-locked system to perform drift-free sensing. Active coupling was also studied for its benefits in term of phase noise reduction for clocking or sensing applications in [17,29,30]. It has also been used for bias cancellation of gyroscopes in [31]. In this approach, the resonators are coupled through their actuation voltage, so that they are in a state of mutual injection. Provided the natural frequencies are well-matched (as explained in Section 3), the two-resonator system synchronizes and becomes phase-locked. As shown in [13,32], the phase difference between the motional or actuation signals then provides a highly sensitive, theoretically drift-free measurement of the natural frequency mismatch between the resonators. The theoretical framework of the synchronization of resonators by mutual injection-locking is formalized in [13] in the context of a sensing application. Compared to the mode-localized approach, the mutually injection-locked oscillator (MILO) approach has a theoretically higher sensitivity at the cost of a reduced dynamic range. The resolution of the two approaches is comparable, but the MILO-based approach is intrinsically closed-loop. Furthermore, its output metric, a phase difference, is “quasi-digital” [33]. Hence, we think it may be better-suited to a compact VLSI implementation. A first experimental proof of the drift rejection by a MILO-based sensor is given in [32], showing a good agreement with the theory but limitations due to the fact that both CMOS-MEMS resonators are not on the same chip, and do not endure the same thermal drift. The design of fully co-integrated MILO architecture is outlined in [34], and some simulation results are given. In the present work, the guidelines for the VLSI-compatible design of a fully monolithic co-integrated CMOS-MEMS MILO are given.

3. Design constraints of MILOs Injection-locking is one way of synchronizing an oscillator to an external frequency reference: a signal from the frequency reference is “injected” into the oscillator, whose frequency may be pulled-in and locked to that of the reference, as first extensively studied by Adler in [15]. In [16], Mirzaei et al. generalized Adler’s theoretical results to the case when two LC-tank oscillators are in mutual injection, i.e. each oscillator is the other’s frequency reference, with the purpose of generating two stable signals, with a given /2 phase difference. It was pointed out that a key issue in the studied architectures was the intrinsic natural frequency mismatch of the LC-tank resonators, due to the fabrication process, resulting in a phase-difference error proportional to (i) the natural frequency mismatch, and (ii) the quality factor Q of the resonators. As proposed in [12], these seeming disadvantages can be turned into assets in the context of a resonant sensing application: a MILO’s phase difference “error” (its shift away from a nominal value, e.g. /2) can be used as a highly sensitive, intrinsically differential measurement of the natural frequency mismatch of the resonators. The sensitivity of a MILO phase-difference-based sensor is in fact on the order of Q times that of a “conventional” (single oscillator, frequency-based) resonant sensor. A functional representation of a MILO is shown in Fig. 1, it consists in two nominally-identical MEMS resonators with their

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for the MILO to verify the Barkhausen phase criterion at resonance. With a nominal phase difference 0 = /2, this boils down to a single equation:



sin res +



self



−  cos res +



mut

= 0.

(2)

A possible choice, made in [16] outside of the field of sensing, is to choose the two angles so that both terms on the left-hand side vanish independently of the cross-coupling coefficient: self

= −res =

mut

− /2.

(3)

This choice may be of interest for sensing applications also, because of the high sensitivity of the MILO in that case: the sensitivity of the phase difference to mismatch can in fact be shown to be inversely proportional to the coupling coefficient  [13,16]. However, it also entails a reduction of the locking range of the architecture and does not improve its ultimate resolution. Furthermore, the practical implementation of accurate electronic gains, required when  = / 1, may also be an issue. Alternatively, as in the present work, one may choose to impose:

Fig. 1. High-level schematic of MILO.

self

=

(4)

mut

in which case (2) boils down to: self

= −res + atan () .

(5)

In the case when  = 1, which is of practical importance, this further reduces to: self

Fig. 2. High-level nonlinear mixer architecture.

electronic readouts, coupled through an electronic mixer. The purpose of the mixer is to maintain the two resonators in a phaselocked oscillation state that is highly sensitive to the relative stiffness or mass mismatch of the resonators. This may for instance be achieved through linear coupling [30,17] of two oscillating loops, although this approach requires a good control of the amplitudes of the resonators. In [13], we proposed a nonlinear mixing scheme, a simplified version of which is shown in Fig. 2 where the coupling signals are issued by the same comparators providing the gain in each oscillation loop. The coupling gain  represents the relative amplitude of the mutual-injection signal to the self-injection signal. The phaseshifting elements are chosen so that (i) each resonator is driven at resonance (ii) the nominal phase difference (in the absence of mismatch) between the two resonators is 0 = /2. This is done as follows: suppose that resonance is characterized by a certain value of the phase  res between the output of the readout Vi , and the mixer output Vfi , or, equivalently, the excitation voltage of the resonator. Then, the mutual-injection and self-injection angles must be chosen to satisfy:



sin res +



= sin res +

 self



+  sin res +

self





−  sin res +

mut

− 0

mut

 

+ 0 = 0

(1)

= −res + /4.

(6)

Indeed, for  = 1, the operations (+|+) and (+|−) presented in Fig. 2 can be implemented using only logical gates. For example, a schematic of such a digital mixer is shown in Fig. 3. Note that the value of self of this mixer is in theory equal to 0, so that phase-shifting elements will also be required, in general, for (6) to be verified. The implementation of these phase-shifting elements, accounting for all the non-idealities which contribute to phase-shift (comparator and digital gate delay, comparator hysteresis, length of the connection lines. . .) consumes most of the design effort, as shown in Section 4. As for the MEMS resonators, several transduction methods (electrostatic, piezoelectric, piezoresistive. . .) and readout architectures (resistive, capacitive. . .) are possible, each one having potentially different  res . For instance, the resonance of electrostatically-transduced resonators with ideal capacitive readout is characterized by  res = /2, so that, according to (6), for =1, the mixer must ensure the phase delays [13]: self

=

mut

= − /4.

(7)

Letting ε be the relative stiffness mismatch of resonator 2 with respect to resonator 1, assuming both resonators have the same quality factor Q, and (4) and (6) are verified, a MILO has the following characteristics: S ≡ Sω ≡ εlock

1 ∂ 2 = Q, |  0 ∂ε ε=0 1 ∂ω 1 = , | ω0 ∂ε ε=0 4 √ 2 . = Q

(8) (9) (10)

where ω0 is the nominal value of the natural pulsation of the resonators, S (resp. Sω) is the normalized sensitivity of the phasedifference (resp. angular frequency) to stiffness mismatch close to nominal conditions (ε = 0), and ␧lock is the locking range of the MILO. Relations (8) and (9) are approximately valid across the whole locking range (i.e. provided |ε| < εlock ), as illustrated in Section 5.1.

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Fig. 3. Possible mixer implementation in the case ␥=1.

Fig. 4. Schematic of the entire CMOS-MEMS MILO architecture designed in this work. Only the potentiometer bridge is not co-integrated.

Beyond the locking range, the oscillation is not stable, so that our second design constraint, besides (6), is that one must be able to fabricate and/or fine tune two resonators with stiffness mismatches smaller than εlock . This is more easily achieved when the two resonators are fabricated in close proximity, as shown in Section 4. Finally, it should be noted that, as theoretically shown in [13], reasonable deviations from the ideal framework of this section (i.e. same quality factor for both resonators, same amount of phase-shift in both branches of the MILO, exact verification of (6). . .) should have little impact on the characteristics of the MILO. For instance, if the quality factors are Q1 for resonator 1 and Q2 for resonator 2, the analytical derivation of S and Sω yields [13]: S =

4 Q1 .Q2 ,  Q1 + Q2

(11)

Sω =

1 Q2 . 2 Q1 + Q2

(12)

4. Co-integration of a CMOS-MEMS MILO This section is dedicated to the design of all the blocks of the chosen architecture, an electrical schematic of which is shown in Fig. 4. Except for the potentiometer bridge, used to modulate the magnitude of the excitation voltage, all the blocks are monolithically co-integrated, in order to optimize the performance of the

MILO. The fabrication, the modelling and the characterization of CMOS-MEMS resonators are addressed in Sub-Section 4.1 where the impact of co-integration on natural frequency mismatch is studied. Sub-Section 4.2 is dedicated to the co-integration of the rest of the system, in order to meet phase criterion (6).

4.1. CMOS-MEMS resonators and readouts 4.1.1. Resonator fabrication and physical characterization The resonators are fabricated following the same approach as in [35]. They are made of tungsten (Young’s modulus E = 411 GPa, density ␳ = 19300 kg m−3 , at 25 ◦ C), in the 3rd VIA layer of the AMS C35c4b3 process [36]. The geometry defined in the layout is a clamped-clamped beam of length L = 30 ␮m, width h = 500 nm, thickness b = 1.3 ␮m, and actuation gap G0 = 450 nm (Fig. 5). The structure is released from the silicon oxide with a 10 min wet etching in a bath of dissolved hydrofluoric oxide. The chip is then washed in distilled water for 10 min, followed by an 8 min bath of isopropyl alcohol to eliminate the water. Finally, it is heated for 10 min at 100 ◦ C to evaporate the remaining alcohol. SEM imaging of one resonator, shown in Fig. 6, reveals that the measured gap is 376 nm instead of the 450 nm specified in the layout. All measured dimensions are summed-up in Table 1. The thickness of VIA resonators was measured in [37], exhibiting the

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Fig. 5. Schematic view of a clamped-clamped beam with a three-port configuration.

Fig. 7. Natural frequencies of the resonators of various samples from the run, for Vb = 20 V. Table 2 Series RLC equivalent model of a resonator with Vb = 37.5 V, =475 MPa, Q = 120, and the measured dimensions of Table 1. Rm

Lm

Cm

13.3M

64.5H

27.3aF

resonance frequencies of the 18 chips of the run that were successfully released. These results are obtained at a fairly low value of the bias voltage (Vb = 20 V), in order to guarantee that the measurements are free from inaccuracies resulting from nonlinearity. The standard deviation of the resonance frequency error of all 630 resonator pair combinations is 59 kHz, or 1.5% relatively to the average resonance frequency of 3.91 MHz. On the other hand, if we consider only the frequency mismatch of each of the 18 co-integrated pairs relatively to its average frequency, the error is 1%. Discounting the first 10 chips, for which the fabrication “recipe” was still under development, the first figure drops to 0.8%, and the second to 0.24%. This shows that co-integration improves the match between resonators by a factor between 1.5 and 3.3. These figures must also be compared to the estimated locking range of the system: the average quality factor (in air) of the resonators is 120, yielding (10) an average locking range of ±23.4 kHz, or 0.58% relative to the central frequency. Resonators can be considered to be well-matched when their resonance frequencies are within this range.

Fig. 6. Top: SEM image of the released clamped-clamped beam. Bottom: zoom close to the anchor, with measured dimensions.

Table 1 Expected and measured dimensions of the clamped-clamped resonator.

Expected Measured

L

b

h

G0

30 ␮m 29.7 ␮m

1.3 ␮m 1.3 ␮m

500 nm 490 nm

450 nm 376 nm

expected value of 1.3 ␮m. These inaccuracies are a consequence of working with feature sizes that are close to the limits of the technology. Furthermore, it must be considered that these VIA structures violate the design rules of the AMS technology, which is not optimized for them. Four resonators are fabricated on each chip, but only two are biased (or “active”) and can be characterized electrically. The other two are used as “dummies” for feedthrough removal, as represented in Fig. 4. We show in Fig. 7 the measured values of the

4.1.2. Resonator modelling A nonlinear model and a linearized electrical equivalent model of the structure are developed, following [38]. We find that the resonator must be subject to a tensile axial stress ≈475 MPa coming from the fabrication process in order to match the experimental value of the average resonance frequency at Vb = 20 V (3.91 MHz, instead of 2.57 MHz for a stress-free beam with the measured dimensions reported in Table 1, or 2.59 MHz if the expected dimensions are used). This large value of the axial stress is hardly surprising, because of the thermal expansion mismatch between tungsten and the other materials used in the process. The nonlinear model shows that stress-stiffening dominates the behavior at large oscillation amplitudes, even for large values of Vb (Fig. 8). At Vb = 37.5 V (near the operating point of the experimental results of Section 5), the linearized model can safely be considered to be valid provided the peak value of the actuation voltage does not exceed 1 V (corresponding to a 450 mV rms value for our signal waveform). The motional components of the series electrical equivalent model of a resonator at Vb = 37.5 V are given in Table 2, yielding a resonance frequency of 3.79 MHz. With these parameters, this average model predicts a sensitivity of the resonance frequency to bias voltage of −8.72 kHz/V, at Vb = 37.5 V. Given the

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stage which acts as a 50 buffer. A post-layout simulation of the Bode diagram of this amplifier is given in Fig. 9. The simulated transimpedance gain of the amplifier varies from 34M at 3.25 MHz to 29M at 4.25 MHz. Given the typical motional resistance at Vb = 37.5 V (Table 2), an excitation voltage of 250 mV rms, and discounting amplifier nonlinearity (e.g. saturation), one can expect an output level of 592 mV rms. More importantly, regarding the phase of the amplifier, which corresponds to ␪res in Section 3, simulation shows that it varies from 66.3◦ at 3.25 MHz to 63.5◦ at 4.25 MHz. At 2.59 MHz (the expected resonance frequency in the absence of stress), we find that ␪res = 73◦ , whereas ␪res = 65◦ at 3.79 MHz (the measured resonance frequency in Section 5). 4.2. Feedback loop design

Fig. 8. Simulated amplitude and phase response of a resonator for different excitation voltages (colorscale, peak value in V). Simulation parameters are Vb = 37.5 V,

=475 MPa, Q = 120, and the measured dimensions of Table 1.

dispersion of the natural frequencies, this means that all pairs of co-integrated resonators may be matched by adjusting their bias voltage by a few volts. Furthermore, the entire locking range can be swept by changing Vb by +/−2.4 V. 4.1.3. Resonator CMOS readout The architecture and dimensions of the readout used in this work are presented in [39]. The output current of the resonator is integrated in the parasitic capacitances (of the order of 5fF) of the output electrode and of the input transistor of the amplifier. It is then amplified by a self-biased differential pair followed by a cascode intermediate stage and then by a source-follower output

The fact that ␪res is a priori unknown before release (because it is related to the exact value of the resonance frequency, which depends on the actual dimensions and on residual stress) is a difficulty in the design of the feedback loop, whose phase-shift should verify (6) for the performance of the MILO to be optimal. In our case, the stress-free value of ␪res is 73◦ , the feedback paths of the system should then provide a phase shift self = −28◦ at 2.59 MHz, which was our initial design objective. Another difficulty is that all the elements of the feedback loop participate to the phase-shift, so that the contribution of each part must be accounted for at the design stage. While the contributions to self of all the integrated parts of the loop (comparators, digital gates, bias tees, buffers, and on-chip interconnects) can be accurately predicted in simulation, the contribution of the potentiometer bridge and of its connections to the CMOS-MEMS part is more difficult to obtain beforehand, although it can be roughly estimated. However, as mentioned in Section 3 and shown in [13], several properties of MILOs are quite robust to deviations from the nominal design parameters, among which the exact value of self . In fact, for our architecture, high-level simu-

Fig. 9. Bode diagram of the CMOS amplifier (post-layout simulation).

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Table 3 Simulated contributions to self of the different blocks at 3.79 MHz. Bias tee ◦

3.1

Comparator ◦

−23

Mixer & buffer ◦

−4.2

Bridge ◦

−5.2

Optimal (for ␪res = 65◦ )

Total ◦

−29.3

−20◦

Fig. 10. Optical microscope image of the chip showing each block of the fully co-integrated CMOS-MEMS MILO.

lations based on the analytical model presented in [13] show that a ±10◦ error in the feedback phase leads only to a 10% decrease of the phase sensitivity and to a 10% error in the locking range with respect to their nominal values (8) (10). Since the experimental results (Section 5) show the resonance frequency is equal to 3.79 MHz, corresponding to ␪res = 65◦ and an optimal phase-shift value of self = −20◦ according to (6), we report in the following sub-sections only the simulation results obtained at this frequency.

4.2.1. Mixer design As shown in Fig. 4, the mixer is composed of two comparators, three logical gates and two digital buffers. These components are chosen from the AMS C35 A CELLS and CORELIBD libraries [36]. The comparators have 17 mV hysteresis and 17 ns delay. Simulations show that the contribution of hysteresis to phase delay can be neglected provided the inputs of the comparator are greater than 500 mV rms. If this condition is met, the comparator delay results in a −23◦ contribution to self at 3.79 MHz. Note that a bias tee is added at the input of both comparators to ensure the stability of the triggering level, since the self-bias of the output node of the amplifier changes with the amplitude of the output signal. The bias tee is composed of a 1M resistance and 2 pF capacitance. At 3.79 MHz, simulations show a contribution of +3.15◦ to self . The logical gates are the smallest available in the CORELIBD library, with a 0.3 ns delay in each gate. However, this choice imposes to add a digital buffer in order to output enough current to load the resistive bridge and oscilloscope probes. The digital buffer is composed of four stages of increasingly larger CORELIBD INV gates. The buffer enables short rise and fall times for loads up to 20pF. In total, the association of buffer and mixer has a 3.11 ns delay, corresponding to −4.2◦ phase shift at 3.79 MHz. However, the large AC current consumption of the buffer leads to supply voltage overshoots and drops, whose impact must be minimized. This is done by using a matrix of decoupling capacitances composed of 10 ␮m × 10 ␮m NMOS transistors with their source and drain connected to the ground and their gate to the 3.3 V supply voltage, distributed over the chip. They are towered by 3 layers of metal alternately connected to the ground and to the supply voltage in order to reduce the access resistance and the voltage drop effect. Moreover, the substrate is thus grounded, which reduces electrical coupling between the resonators. The total distributed capacitance

is 40pF, meaning that, by the standard “rule of thumb”, the buffer is able to load up to 4 pF without major perturbation. 4.2.2. Excitation level adaptation Two discrete voltage divider bridges made of a 1k potentiometer are placed between the digital buffer output and the resonator input (Fig. 4), in order to manually adjust the excitation level. Since this bridge is placed outside the chip, it must be connected to it with wire bondings and SMA connectors, which add parasitic capacitances to load. SMA connectors (corresponding to a 1 pF load) are used between the mixer and the bridges, in order to minimize the capacitive load of the digital buffer. To close the loop between the bridge and the resonators, 15 cm SMA wires (corresponding to a 15 pF load) are used. At 3.79 MHz, when the potentiometer is set to reduce the peak value of the mixer output from 3.3 V to 500 mV, the bridge contributes −5.2◦ to self . The contributions to loop delay of the different blocks of the system are summed up in Table 3. 4.3. Chip layout Fig. 10 shows an optical microscope view of the fully cointegrated CMOS-MEMS MILO. The overall chip organization results from the fact that connection pads must be set in a straight line in order to use the HTT Wedge7 probe card at our disposal for testing the system. Then, the critical connection between the resonator and the amplifier has to be as small as possible, in order to decrease parasitic capacitance, and thus enhance motional transduction, and also to minimize noise interference. The connection between the amplifier and the comparator is also analog and susceptible to noise interference, and it should also be as small as possible. Three pads are routed to the ground to properly evacuate parasitic currents from the substrate. The routing is carefully made so that no two AC signals are connected to neighboring PADs, and thus avoid parasitic coupling. This organization comes at the cost of having a rather long (1 mm) connection between the comparator output and the mixer input, since the comparators are at each extremity of the chip and the mixer in the center. All the digital connections are fabricated using the top metal layer to lower the parasitic capacitance with the substrate. Due to the wet HF post-processing, the top layer is always slightly etched as well, even under the Si3 N4 protection layers. This leads to an increase

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performance, since the actuation signals of the MILO are triggered on zero-crossings of the amplifier outputs. Even though decoupling capacitances were implemented, high frequency perturbations at transitions are still present. 5.1. Sensitivity to mismatch To investigate the MILO’s sensitivity to the measurand (differential operation mode), we simulate a stiffness mismatch by changing the bias voltage of resonator 2 while leaving that of resonator 2 fixed. The duty cycles DC1 and DC2 of Vf 1 and Vf 2 , from which phase difference may be inferred:  (◦ ) = 90 × (1 +

Fig. 11. Closed-loop experimental set-up.

Fig. 12. Closed-loop oscillogram, with Vb1 = 35 V and Vb2 = 37.3 V.

of the local current density, heating and, as experienced, a possible rupture in the connection, especially the 1mm-long one. 5. Experimental results In this section, the experimental results obtained with chip 17 (Fig. 7) are reported. For this chip, the extracted quality factors are 120 for resonator 1 and 140 for resonator 2. The resonators are tuned when the bias voltage Vb1 of resonator 1 is 2.3 V less than that of resonator 2 (Vb2 ). Open-loop characterization shows the phase responses of the two matched resonators are nearly identical, yielding an experimental value of ␪res equal to 65◦ . Although there is a slight gain mismatch between the resonators, likely due to fabrication dispersion, it has little consequence since the amplifiers load comparators and only the zero-crossings are important, as long as hysteresis can be neglected. There is a 29.3◦ phase delay between the amplifier outputs and the potentiometer bridge outputs, corresponding to the simulated value. The experimental sensitivities to mismatch of the phase difference (8) and of the oscillation frequency (9) are compared to theory in Sub-Section 5.1. Closed-loop temperature-drift rejection results are reported in Sub-Section 5.2. The closed-loop setup is shown in Fig. 11, and a closed-loop oscillogram, with the peak value of the actuation signals set to 500 mV, is shown in Fig. 12. As long as the resonators are biased so that their resonance frequencies are inside the locking range, the MILO starts up when the loop is closed. The moderate saturation of the amplifier outputs has little consequence on the system

DC1 − DC2 ) DC1 + DC2

(13)

and the corresponding oscillation frequency are measured with an Agilent 53230a frequency counter. These quantities are represented in Fig. 13. Close to the nominal operating point of the system (0 = 90◦ , f0 = 3.79 MHz, Vb1 = 35 V, Vb2 = 37.3), the sensitivity of oscillation frequency to bias voltage mismatch is −5.76 kHz V−1 , i.e. Sω = 1.52.10−3 V−1 relatively to the nominal oscillation frequency. The sensitivity of the phase difference to bias voltage mismatch is −39.5◦ V−1 , i.e. S = 0.441 V−1 relatively to 90◦ . The ratio S/Sω represents the sensitivity enhancement of the phase difference sensing mode compared to the oscillation frequency sensing mode: we find this quantity is equal to 290. Assuming (6) is verified and taking into account the measured quality factors of the resonators (Q1 = 120 and Q2 = 140), the linear model (11) (12) predicts that S/Sω should be equal to 305. The nonlinear model described in [13], which allows us to take into account the excess phase-shift in the system, predicts a sensitivity enhancement equal to 299 at the nominal operating point. The good agreement between the optimal and the actual values, in spite of the fabrication inaccuracies and other non-idealities, highlights the robustness of the architecture and of the chosen design. The sensitivity enhancement is also the slope at the origin of the curves shown Fig. 13(c) representing the fractional phase difference variation /0 − 1 vs. the fractional oscillation frequency variation f/f0 − 1 across the locking range. There is also a very good match between measurements (circles) and simulated results, with the idealized, linear model (assuming (6) holds and extrapolating (11) and (12)) or with the complete, nonlinear model developed in [13]. However, the actual locking range (±1.5 V) is smaller than the one predicted by [12] (±2.4 V). This is probably due to the comparator’s hysteresis, which is neither accounted for in ideal, linear model, nor in the nonlinear model: at the edges of the locking range, one of the two amplifier outputs starts decreasing, which increases the loop’s imbalance because the delay induced by hysteresis is amplitudedependent. 5.2. Drift rejection To investigate the MILO’s ability to reject temperature drift, the chip is placed over a thermal chuck, whose temperature is increased by 10 ◦ C steps from 30 ◦ C to 100 ◦ C. The MILO is operated at the nominal bias voltages (Vb1 = 35 V and Vb2 = 37.3 V). The oscillation frequency and phase of the MILO are measured and plotted in Fig. 14. Even though the phase difference is less temperature-dependent than the oscillation frequency, there is still a notable drift of the phase difference. Across the temperature range, the sensitivity of oscillation frequency to temperature is −1.75 kHz K−1 , or −460 ppm K−1 relatively to 3.79 MHz. This large value of the temperature coefficient of frequency (much greater than the −41 ppm K−1 that would be expected from fluctuations of Young’s modulus and thermal expansion alone [40]) is likely due to thermal stress relief in the beams [41,42]. The sensitivity of phase

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Fig. 13. Experimental measurements of oscillation frequency f (a) and phase difference ␾ (b) for different values of Vb2 . Comparison of measured data with two models (c).

Fig. 14. Drift of oscillation frequency (a) and phase difference (b) with temperature. The simulated effects of a residual stress mismatch and a resonator width mismatch are shown, resulting in different temperature coefficients for the phase difference, but the same temperature coefficient for the oscillation frequency.

difference to temperature is −0.106◦ .K−1 , or −1200 ppm K−1 relatively to 90◦ . The theoretical drift resulting from a 5 nm width mismatch (in red) or from an 8.3 MPa residual stress mismatch (in green), computed with our linear resonator model, is shown in Fig. 14(b): residual stress mismatch causes a large drift of the phase difference, whereas width mismatch causes almost no drift. A combination of the two phenomena may thus explain our experimental results. Part of the phase difference drift might also be explained by a thermal gradient across the 1 mm space between the resonators (see Fig. 10), resulting from non-uniform heating of the chip. One may compare these results to those obtained in the differential operation mode, and consider them in the context of an electrometer sensing application, where one seeks to measure the voltage difference Vb2 −Vb1 , either from the oscillation frequency or from the phase difference. In that case, the temperature-induced error is 314 mV K−1 if the oscillation frequency is used, whereas it is only 2.9 mV K−1 when the phase difference is used.

6. Conclusion In this paper, we have demonstrated the feasibility of VLSIcompatible monolithically co-integrated MILO-based differential resonant sensors. We have emphasized the main issues in the design of the feedback loop, and shown that a very good agreement with the theoretical predictions can still be obtained, even though several non-idealities are present. Besides the intrinsic advantages of the proposed operation mode (increased sensitivity to the measurand and improved drift rejection) compared to a classical resonant sensor, this also demonstrates the inherent robustness of our architecture to non-idealities (residual stress mostly, but also hysteresis, saturation and temperature-dependence of the electronic part). It should be noted that the reported results are also very repeatable, and that similar values of the different sensitivities are found for all the chips tested in this work. The design and the architecture can still be optimized. First, the voltage divider can easily be co-integrated, thus lowering the

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capacitance at the mixer output, relaxing the design constraints on the digital buffer stage, and decreasing the voltage supply perturbations and AC consumption. This would also enable a better a priori estimation of the phase delays in the loop, thus a better design to reach the optimal operation point, since, in the present work, part of the phase-shift in the loop is due to the SMA connectors connecting the bridge to the chip, and is difficult to determine beforehand. Furthermore, the overall layout of the chip could consequently be optimized. Finally, to improve performance, three main options may be considered. A first option would be to optimize the temperaturestability of the feedback loop (readout and mixer), for example by improving the symmetry of the design or individually optimizing the different components of the circuit. This should cancel out part of the observed drift. A second option is to increase the quality factor of the resonators, for example by vacuum-sealing them, or using an altogether different mechanical design or material. This should result in increased sensitivity to the measurand, but a reduced locking range. To overcome the trade-off between Q and ␧lock , the third option is to implement feedback control techniques to compensate any stiffness mismatch induced by the measurand with a bias voltage variation. This would maintain the two resonators at the nominal operation point, and thus increase the dynamic range of the sensor, at the cost of added system complexity.

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Biographies Pierre Prache was born in 1989. He graduated from ENS Cachan in 2014, with a major in applied physics. He received one master’s degree in high education training

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from ENS Cachan in 2013, and a master’s degree in nanoscience from Université Paris-Sud in 2014. He is currently a Ph. D. student under the joint supervision of J. Juillard and N. Barniol. His research focusses on the design and test of monolithicallyintegrated CMOS-MEMS injection-locked oscillators. Jérôme Juillard was born in Nice, France, in 1973. He graduated from Ecole Centrale de Paris (ECP) in 1995, with a specialization in electronics and signal processing. After a master’s degree in acoustics and signal processing at IRCAM, he received his Ph.D. degree in physical acoustics from University Paris 7 in 1999. In 2000, he joined Supélec (now CentraleSupélec), where he is now a full professor. His research is conducted in the Electronic Systems team of the GEEPs laboratory. His interests are nonlinear oscillators, as well as MEMS and NEMS modelling, design, characterization and test. Pietro Maris Ferreira received the B.Sc. and the M.Sc. degrees from the Federal University of Rio de Janeiro (UFRJ), Brazil in 2006 and 2008, respectively; and the Ph.D. degree from the Télécom ParisTech, France, in 2011, all in electronic engineering. Researching high-performance high-reliability circuits and systems, he joined IM2NP (UMR CNRS 7334) for one year and IEMN (UMR CNRS 8520) for two years during his tenure track. Since 2014, he has been with GEEPs as associate professor in the Electronic Systems team.

Núria Barniol received her B.S. and Ph.D. from the Universitat Autonoma de Barcelona in Spain in 1987 and 1992 respectively. She has been a professor at the UAB at the Electronics Engineering department since 1993, becoming a full professor in 2004. Nowadays, she is the leader of the Electronic Circuits and Systems research group of UAB. Her research interests focus upon the combination and integration of new MEMS and NEMS devices into CMOS technologies, looking for system on chips solutions in the field of RF signal processing and sensor applications. Martín Riverola was born in Barcelona, Spain, in 1988. He received the degree in Telecommunication Engineering the master degree in micro and Nano electronics engineering from the Universitat Autònoma de Barcelona, in 2012, and 2013, respectively, where he is currently pursuing the PhD degree in electronics engineering. His research interest is focused on micro- and nanoelectromechanical systems (MEMS and NEMS), specifically involved in the integration of new emerging mechanical switching devices and resonators into standard CMOS technologies.