Design and fabrication using nanoimprint lithography of a nanofluidic device for DNA stretching applications

Design and fabrication using nanoimprint lithography of a nanofluidic device for DNA stretching applications

Available online at www.sciencedirect.com Microelectronic Engineering 85 (2008) 818–821 www.elsevier.com/locate/mee Design and fabrication using nan...

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Available online at www.sciencedirect.com

Microelectronic Engineering 85 (2008) 818–821 www.elsevier.com/locate/mee

Design and fabrication using nanoimprint lithography of a nanofluidic device for DNA stretching applications E. Abad *, S. Merino, A. Retolaza, A. Juarros Fundacio´n Tekniker, Avda. Otaola 20, 20600 Eibar, Guipu´zcoa, Spain Received 4 October 2007; received in revised form 18 December 2007; accepted 27 December 2007 Available online 8 January 2008

Abstract In this work, we present the design and fabrication of a sealed micro/nanofluidic chip for DNA stretching applications, based on the use of the high-throughput nanoimprint lithography (NIL) technology combined with a conventional anodic bonding of the silicon base and Pyrex cover. Using the developed fabrication process sub-100 nm width nanochannels have been obtained. The complete chip, including microchannels for fluid transport and nanochannels for DNA stretching and visualization has been fabricated and packaged to facilitate the contact with the macroscopic world. Ó 2008 Elsevier B.V. All rights reserved. Keywords: Nanoimprint lithography; Nanochannels; DNA stretching

1. Introduction Nanofluidic channels are currently being used for DNA stretching and direct visualization of the genomic length [1–5]. This method provides important advantages such a rapid DNA restriction mapping in short times, reduction of the DNA sample down to single molecule genomic content, parallel analysis and more sensible detection [6]. Several innovative processes have been proposed for the fabrication of nanochannels by means of nanoimprint lithography (NIL) technology and sealing techniques to enclose those channels [7]. NIL is a parallel technology to create nanostructures over a large substrate surface area with both high-resolution and throughput. On the other hand, sealing of etched structures to create enclosed channels is a major challenge, previously accomplished by using non-conventional methods such a shadow sputtering deposition [1], sacrificial polymers [3] and modified NIL process [4]. In this work, we present the fabrication of a sealed *

Corresponding author. Tel.: +34 943 20 67 44. E-mail address: [email protected] (E. Abad).

0167-9317/$ - see front matter Ó 2008 Elsevier B.V. All rights reserved. doi:10.1016/j.mee.2007.12.048

nanofluidic chip for DNA stretching applications, based on NIL and anodic bonding of the silicon base and Pyrex cover. 2. Design of the device The conceptual design for this DNA stretching chip is illustrated in Fig. 1. The chip is composed by a silicon base, containing microchannels for fluid transport and nanochannels for DNA stretching, immobilisation and detection, and a Pyrex cover with integrated electrodes for sample movement by electrophoresis and four inlet holes. This design includes two V-type long microchannels, for pressure-driven fluid quick transport, connected by short nanochannels for direct visualization of single DNA molecules. The metallisation, needed for the electrophoretic sample movement through the nanochannels, was designed over the upper part of the cover in order to enable the silicon Pyrex anodic bonding. The electrical current through the channels will be assured by means of a large buffer droplet over each reservoir covering the metallic contact around the inlets.

E. Abad et al. / Microelectronic Engineering 85 (2008) 818–821

Fig. 1. The conceptual design of the DNA stretching chip.

The schematic cross-section of the fabrication process is shown in Fig. 2. Initially, wafer scale silicon nanochannels are fabricated using NIL technology, including the following steps: spin coating and baking of the NIL thermoplastic polymer over the four inches silicon wafer, imprinting process, residual layer etching by an oxygen plasma, pattern transfer to the silicon by anisotropic silicon plasma etching and polymer removal. Then, the microchannels and reservoirs are defined over

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the silicon wafer using conventional photolithography (including an alignment step) and anisotropic silicon plasma etching. Next, a thin layer of thermal silicon oxide is grown on the silicon base. This oxide layer has a double functionality, on one side to get electrical isolation and on the other side make the surface hydrophilic. In parallel, a thin layer of platinum is patterned by lift-off over the Pyrex cover in order to define the metallic contact and the inlet holes are created by femtosecond laser ablation. Finally, the silicon base and Pyrex cover are bonded using a conventional anodic bonding process. The NIL stamp was designed including micropost arrays in front of the nanochannels to pre-stretch the DNA molecules [2] and other structures to ensure a right pattern transfer, see Fig. 3. The stamp designed contains three patterned regions of 1146 lm  1201 lm size. Each region includes 100 nanochannels of 200, 100 and 50 nm width, respectively, 3 lm pitch to ensure optical resolution and 250 lm length. A customized packaging was also designed in order to facilitate the connection to the macroscopic world: sample loading and voltage application. Using this re-usable plastic capsule the chip can be automatically aligned and easily mounted and replaced. The package integrates electrical pins to make the electrical contact, eliminating in this way the need for wire bonding, and plastic o-ring to seal the chip inlets.

Fig. 2. Schematic cross-section of the chip fabrication process.

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E. Abad et al. / Microelectronic Engineering 85 (2008) 818–821

Fig. 3. Optical image of the stamp. The pre-stretching posts are clearly shown. The dark region corresponds to the 50 nm width and 3 lm pitch nanochannels.

3. Fabrication of the device The stamp manufacturing was done by NIL Technology.1 The depth of the fabricated stamp is 125 nm ± 10%. Fig. 3 shows and optical image of the stamp. The pre-stretching posts are clearly shown. The dark region corresponds to the 50 nm width and 3 lm pitch nanochannels. An antiadhesive coating based on tridecafluoro(1,1,2,2)-tetrahydrooctyl-trichlorosilane (F13-TCS) has been applied on the silicon stamp. The imprinting process was developed on 400 silicon wafers coated with a 150 nm thick layer of mr-I7020E thermoplastic polymer from Micro resist Technology. This thermoplastic was chosen in order to get a thinner residual layer after imprinting, and as a consequence, a smaller lose of dimensions after the pattern transfer. The imprinting conditions were 25 bars, embossing time 12 min, embossing temperature 155 °C and demoulding temperature 50 °C. Fig. 4 shows an AFM topography of the 100 nm width imprinted nanochannels prior to residual layer etching. The cross-section of the measurement reveals that the height of the imprinted structures is about 135 nm, as expected from the depth of the stamp. After removing the residual polymer using an oxygen plasma, the transferred pattern was etched about 80 nm in silicon by a SF6/C4F8 plasma etching, using the parameters gathered in Table 1. These processes lead to an increase of the nominal dimensions from 50 nm up to 92 nm for the 1

http://www.nilt.com/.

Fig. 4. AFM topography and cross-section of the 100 nm width imprinted nanochannel prior to residual layer etching. The measured height is 135 nm.

E. Abad et al. / Microelectronic Engineering 85 (2008) 818–821 Table 1 Plasma etching parameters Pressure RF power ICP power Gas Gas flow

15 mTorr 20 W 220 W SF6/C4F8 20 sccm/30 sccm

Silicon etch rate10 nm/s.

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In parallel, a 150 nm thin film of platinum was sputtered on a 170 lm thick Pyrex cover and the electrical contacts for DNA electrophoretic movement were patterned by lift-off. Then the inlet holes were created by femtosecond laser ablation. Finally, after alignment, the silicon base and Pyrex cover wafers were successfully bonded using an anodic bonding process performed at low pressure to avoid collapsing the nanochannels. The fabricated chips were diced and packaged using a plastic capsule, as shown in Fig. 6. The chip dimensions are 59 mm  26 mm. The package is composed by two plates fabricated in Delrin and PMMA, respectively. The chip is mounted in the bottom plate of the package, whereas the top plate contains the electrical pins and the plastic o-rings to seal the inlets for sample loading. Four screws are used for alignment and fix the two parts into position. The device will be used for DNA stretching experiments. Salmonella typhimurium genomic DNA labelled with SybrGreen intercalating dyes and TAE buffer solution have been selected for these experiments. 4. Conclusions

Fig. 5. SEM image of a 92 nm  80 nm silicon channel.

smallest channels, as can be seen in Fig. 5. In the next step, 4.5 lm depth microchannels for fluid transport were fabricated using photolithography and plasma etching. Then, an about 80 nm thick thermal oxide was grown using a long dry process, about two and a half hours at 1000 °C.

The design and fabrication of a micro/nanofluidic device for DNA stretching applications was presented. The fabrication process includes the use of the high-throughput nanoimprint lithography technology for the definition of the nanochannels and standard clean room processing. The smallest channels obtained are 92  80 nm. The sealing of the oxidised silicon base and the Pyrex cover was achieved using anodic bonding. The chip including long microchannels for fluid transport and short nanochannels for DNA stretching and visualization has already been fabricated and packaged to facilitate the connection to the outside world. Acknowledgements The authors want to thank the Paul Scherrer Institute (PSI) for some high-resolution images taken in its Scanning Electron Microscope. This work was funded through the regional projects SAIOTEK TADIP and ETORTEK MICAS. References

Fig. 6. Photograph of the fabricated chip (a) and the packaged chip located under the microscope (b).

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