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Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals
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Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals
1
2
3
Q1
Kiazand Fasihi ∗ Department of Electrical Engineering, Golestan University, Gorgan, Iran
4 5
a r t i c l e
6 19
i n f o
a b s t r a c t
7
Article history: Received 4 January 2016 Accepted 8 February 2016 Available online xxx
8 9 10 11 12
18
Keywords: All-optical logic gates Coupled-mode theory Finite-difference time-domain Photonic crystal T-branch combiner
20
1. Introduction
13 14 15 16 17
We have proposed all-optical three-port AND, OR, XOR and NOT photonic crystal logic gates, based on modified symmetric T-branch combiners. Using the temporal coupled-mode theory the operation of the symmetric T-branch combiner has been investigated and the conditions which lead to a maximum power at the output port have been obtained. At the output port of the proposed devices, the logics 1 and 0 are defined as a more than 42% and a less than 14% of the transmission, respectively. The minimum intensity contrast ratio of the suggested logic gates is about 4.77 dB. The operations of the proposed devices are examined using time-domain transition-response simulations which have been performed using two dimensional finite-difference time-domain method. © 2016 Published by Elsevier GmbH.
The rapidly growing use of all-optical processing systems, calls for ultra-compact and fast all-optical logic gates. The used designs for the creation of these devices can be basically classified into two categories: nonlinear and linear designs. The nonlinear designs are based on fiber gratings [1,2], semiconductor optical amplifiers (SOAs) [3], semiconductor microresonators [4], periodically poled lithium niobate (PPLN) waveguides [5–8], and so on. Unfortunately, most of these designs suffer from definite limitations such as large sizes, low speed operations, high drive-powers, or complex integrations. The linear designs are based on the self-collimation effect [9], multi-mode interference effect [10] and light beam interference effect [11,12]. The other candidate for all-optical logic gates are the photonic crystal (PC) based devices which can used in both the linear and the nonlinear regimes. There have recently been proposed several nonlinear designs of optical logic gates in two-dimensional (2D) PCs [13–16], but due to relatively small Kerr coefficient of the conventional nonlinear materials, there is still a great need to high optical drive-powers. In linear regime, and using the accurately controlled optical path difference in PC waveguides, realization of fast, low power and high contrast ratio all-optical logic gates are possible [12,17]. In this paper, we present an analytical approach for designing of different linear logic gates in PCs with square lattice. The coupled-mode theory (CMT) is employed to analyze the
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Q2
∗ Corresponding author. Tel.: +98 1714441003. E-mail address: [email protected]
behavior of the proposed all-optical three-port AND, OR, XOR and NOT logic gates. The validity of the proposed logic gates is investigated using 2D finite-difference time-domain (FDTD) method. The simulation results verify the validity of the proposed design approaches. 2. Model and operating principles of the proposed three-port OR, AND, XOR and NOT logic gates
1 da = jω0 a − a + i dt i
S−i = S+i +
2 a, i
i
45 46 47 48
49 50
All of our presented logic gate designs are composed of a typical symmetric T-branch combiner, which will be slightly modified for designing different types of logic gates. First, we evaluate the operation of a typical symmetric T-branch combiner that its CMT based schematic diagram is shown in Fig. 1. As can be seen, S +i and S−i , where i = 1, 2 and 3, represent the incoming and outgoing electromagnetic (EM) waves into the PC resonator, respectively. The CMT equations that describe the temporal change of the normalized mode amplitude of the resonator, a, are described by [18]
44
51 52 53 54 55 56 57 58 59 60
S+i
2 i
,
(1)
61
(2)
62
where 1/1 , 1/2 and 1/3 are the decay rates of the resonant cavity into the port 1, 2 and 3, respectively. When the EM wave is
http://dx.doi.org/10.1016/j.ijleo.2016.02.012 0030-4026/© 2016 Published by Elsevier GmbH.
Please cite this article in press as: K. Fasihi, Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals, Optik - Int. J. Light Electron Opt. (2015), http://dx.doi.org/10.1016/j.ijleo.2016.02.012
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Table 1 The operation ofOR gate. Inputs: (pin : 0) ≡ state 0, pout /pin ≤ 0.14 ≡ state 0,
(pin : 0.5P0 ) ≡ state1, Output:
pout /pin ≥ 0.42 ≡ state1.
IN2
IN1
Transmission (%)
Logic output
0 0 1 1
0 1 0 1
0 50 50 200
0 1 1 1
4.77 dB ≤ ICR.
Fig. 1. The CMT based schematic diagram of a T-branch combiner.
Fig. 3. The time-domain transition-response of the proposed OR logic gate.
Fig. 2. (a) The schematic structure of the proposed PC OR logic gate. (b) The transmission spectrum at the OUT port.
65 66
67
launched only from the upside into the resonator (S +1 , S+3 = 0) , and assuming that 1/2 = 1/3 and ω = ω0 , one can find
S−1 2 T1 = = S +2
68
S−3 2 T3 = = S +2
4/1 2
1/1 + 2/2
2/2
2
=
2
1/1 + 2/2
2 =
4 (1 + 2)
S−2 2 = S
R= , 2
42 (1 + 2)
Fig. 4. The field distributions of the proposed OR logic gate when (a) (IN1 ,IN2 )≡(1,1). (b) (IN1 ,IN2 )≡(0,1).
2
,
(3)
(4)
+2
1/1
2
1/1 + 2/2
2 =
1 (1 + 2)2
,
(5)
where = 1 /2 . From Fig. 1 and using of Eq. (3), one can find that the maximum transmission power coefficient of 50% into the output port (port 1) can be achieved when = 1/2. This condition can be easily satisfied through a reduction in the decay rates of the resonant cavity into the vertical branches in Fig. 1. Furthermore, in this case one can see that T 3 = R = 25%. Accordingly, in
Please cite this article in press as: K. Fasihi, Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals, Optik - Int. J. Light Electron Opt. (2015), http://dx.doi.org/10.1016/j.ijleo.2016.02.012
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Fig. 5. The schematic structure of the proposed PC AND logic gate. (b) The trans-
Q4 mission spectrum at the OUT port. Fig. 7. The field distributions of the proposed AND logic gate when (a) (IN1 ,IN2 )≡(1,1). (b) (IN1 ,IN2 )≡(0,1).
Table 2 The operation of AND gate. IN2
IN1
Transmission (%)
Logic output
0 0 1 1
0 1 0 1
0 12.5 12.5 50
0 0 0 1
Fig. 8. The schematic structure of the proposed PC AND and NOT logic gates.
0). As a result, respect to the logic 1 and 0 definitions, the minimum intensity contrast ratio (ICR) of the suggested logic gates is about 4.77 dB. 2.1. OR logic gate
Fig. 6. The time-domain transition-response of the proposed AND logic gate.
76 77 78 79 80 81 82 83 84
the best case, using a typical symmetric T-branch combiner only half of the input power from the each of the vertical branches can be transferred into the output port. We will show that based on an appropriate interfering of the input EM waves (which can be lunched from the input ports 2 and 3) in the output port of the modified symmetric T-branch combiners, different all-optical logic gates can be implemented in PCs of square lattice. In all of the presented logic gates, for a specified input power, 0.5P0 , a more than 42% (a less than 14%) of the input powers is fined as the logic 1 (logic
86 87
88
In following, the design and simulation of a PC three-port logic OR gate is presented. The used PC structure is a 2D square array of dielectric rods in air. The rods have a refractive index of 3.4 and a circular cross section of radius 0.2a, where a is the lattice constant and is equal to 573.2 nm. It can be shown that the used PC structure has a photonic band-gap for the transverse magnetic (TM) polarization between ωmin = 0.2876 2c/a and
85
ωmax = 0.4228 2c/a . The inputs are amplitude modulation signals with the carrier wavelength of 1.55 m. It must be noted that throughout this paper, we assume that the input signals have the same frequencies and phases. The feasibility of these assumptions for the creation of all-optical logic gates has been proved by Li et al. and Fu et al. [12,17]. The schematic structure of the proposed PC OR logic gate is shown in Fig. 2(a). The = 1/2 condition is satisfied by placing two extra rods with a radius of 0.06a between
Please cite this article in press as: K. Fasihi, Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals, Optik - Int. J. Light Electron Opt. (2015), http://dx.doi.org/10.1016/j.ijleo.2016.02.012
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Fig. 9. Dispersion curve of the PC line-defect waveguide versus the wave vector component k along the defect.
Table 3 The operation of XOR gate. IN2
IN1
Transmission (%)
Logic output
0 0 1 1
0 1 0 1
0 50 50 0
0 1 1 0
Table 4 The operation of NOT gate. REF
IN
Transmission (%)
Logic output
1 1
0 1
50 0
1 0
124
the input ports and the output port. We investigate the operation of proposed logic gates by using the 2D FDTD simulations. Fig. 2(b) shows the transmission spectrum into the output port when only one of the inputs is enabled. As can be seen, in this case, for in = 1.55 m, the transmission is around 50%. From Fig. 2(a), it can be seen, the input branches are similar, so their optical path lengths are equal. Hence, it can be deduced that in an optimized OR logic gate (with = 1/2), when both input signals (IN1 and IN2 ) are applied, with the power of 0.5P0 , a constructive interference occurs at the output port, and the output light power reaches to P 0 , which corresponds to logic 1 (see Table 1). When only one of input signal is applied, the output power becomes 0.25P0 , which again corresponds to logic 1. Finally, when both of the input signals are disabled, the output power becomes zero, which corresponds to logic 0. The time-domain transition-response and the field distributions of the proposed OR logic gate are shown in Figs. 3 and 4, respectively. It must be noted that in the linear or nonlinear logic gate designs, the back reflection powers into the input ports is a serious issue. This problem can be overcome by using a PC Tbranch based circulator [19], which must be located on every input waveguides.
125
2.2. AND logic gate
104 105 106 107 108 109 110 111 112 113 114 115 116 117 118 119 120 121 122 123
126 127 128 129 130 131 132
Fig. 5(a) and (b) show the schematic of PC structure and the output transmission spectrum of the proposed AND logic gate, respectively. As can be seen, by placing an extra rod with the radius of 0.114a, at the distance of d = 0.3a from the center of the T-branch, one can reduce the transmission into the output port to T 1 = 12.5%. In this case, when both input signals (IN1 and IN2 ) are applied, with the power of 0.5P0 , the light power
Fig. 10. The time-domain transition-response of the proposed XOR logic gate when (a) (IN1 )≡(1,0,0) and (IN2 )≡(1,1,0). (b) (IN1 )≡(1,1,0) and (IN2 )≡(1,0,0).
at the output port reaches to 0.5P0 , which corresponds to logic 1. When only a single input signal is applied, the output power becomes 0.0625P0 , which corresponds to logic 0 and when both of the input signals are disabled, the output power becomes zero, which corresponds to logic 0. As a result an AND logic gate can be realized (see Table 2). The time-domain transition-response and the field distributions of the proposed AND logic gate are shown in Figs. 6 and 7, respectively. As can be seen, the maximum ICR between output logic gates of the AND logic gate is 6 dB. 2.3. XOR and NOT logic gates The schematic of the PC structure of the XOR and NOT logic gates is shown in Fig. 8. In these logic gates, the lengths of the input branches are chosen such that a phase difference, ϕ, is produced between the incoming waves to the output port. The dispersion curve of the line-defect waveguide versus the wave vector component k, along the defect, is shown in Fig. 9. As can be seen, given that ωin = 0.3698 (2c/a), the guided mode has a wave vector of 0.25 (2/a). In this case, when the length difference of the input branches, d, is equal 2a, we have ϕ = ˇd = , where ˇ is the propagation constant. Hence, in an optimized XOR logic gate (with = 1/2 and d = 2a,), when both input signals are applied, with the power of 0.5P0 , a destructive interference occurs and the
Please cite this article in press as: K. Fasihi, Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals, Optik - Int. J. Light Electron Opt. (2015), http://dx.doi.org/10.1016/j.ijleo.2016.02.012
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Fig. 11. The field distributions of the proposed XOR logic gate when (a) (IN1 ,IN2 )≡(1,1). (b) (IN1 ,IN2 )≡(0,1).
5
Fig. 13. The field distributions of the proposed NOT logic gate when (a) (IN1 ,IN2 )≡(1,1). (b) (IN1 ,IN2 )≡(1,0).
3. Conclusions An analytical approach for designing of different three-port logic gates in 2D PC with square lattice has been presented. The used input signals, operating at the same phase and frequency. The coupled-mode theory (CMT) has been employed to analyze the behavior of a symmetric T-branch combiner, and the condition which maximizes the transmission to the output port has been obtained. The validity of the suggested all-optical three-port AND, OR, XOR and NOT logic gates was investigated using 2D finite-difference time-domain (FDTD) method. Using the time-domain transition-response simulations, the performances of the proposed logic gates were examined. The simulation results show that the suggested logic gates, present simple and effective devices for realization of all-optical integrated circuits.
171
172 173 174 175 176 177 178 179 180 181 182 183 184 185
Fig. 12. The time-domain transition-response of the proposed NOT logic gate.
References 156 157 158 159 160 161 162 163 164 165 166 167 168 169 170
light power at the output port becomes zero, which corresponds to logic 0 (see Table 3). When only a single input signal is applied, the output power becomes 0.25P0 , which corresponds to logic 1. When both of the input signals are disabled, the output power becomes zero, which corresponds to logic 0. Hence, an XOR logic gate with a high ICR can be realized. In order to design a NOT logic gate, a Probe signal with the power of 0.5P0 is applied to the input port IN2 of the PC structure shown in Fig. 8. In this case, when the input signal (IN1 ) is applied, due to destructive interference, the output power becomes zero, and when the input signal is disabled, the output power becomes 0.25P0 , as a result a NOT logic gate can be realized (see Table 4). The time-domain transitionresponse and the field distributions of the proposed XOR logic gate (NOT logic gate) are shown in Figs. 10 and 11 (Figs. 12 and 13), respectively.
[1] Z.G. Zang, W.X. Yang, Numerical analysis of optical bistability based on Fiber Bragg Grating cavity containing a high nonlinearity doped-fiber, J. Appl. Phys. 109 (2011) 103106. [2] Z.G. Zang, Y.J. Zhang, Low-switching power (<45 mW) optical bistability based on optical nonlinearity of ytterbium-doped fiber with a fiber Bragg grating pair, J. Mod. Opt. 59 (2012) 161. [3] X. Zhang, Y. Wang, J. Sund, D. Liu, D. Huang, All-optical AND gate at 10 Gbit/s based on cascaded single-port-couple SOAs, Opt. Express 12 (2004) 361. [4] J.F. Tao, J. Wu, H. Cai, Q.X. Zhang, J.M. Tsai, J.T. Lin, A.Q. Liu, A nanomachined optical logic gate driven by gradient optical force, Appl. Phys. Lett. 100 (2012) 113104. [5] J. Wang, J. Sun, X. Zhang, D. Huang, PPLN-based all-optical 40 Gbit/s threeinput logic AND gate for both NRZ and RZ signals, Electron. Lett. 44 (2008) 413–414. [6] J. Wang, J. Sun, Q. Sun, D. Wang, M. Zhou, X. Zhang, D. Huang, M. Fejer, Dual-channel-output all-optical logic AND gate at 20 Gbit/s based on cascaded second-order nonlinearity in PPLN waveguide, Electron. Lett. 43 (2007) 940–941. [7] J. Wang, J. Sun, Q. Sun, D. Wang, X. Zhang, D. Huang, M. Fejer, PPLN-based flexible optical logic AND gate, IEEE Photonics Technol. Lett. 20 (2008) 211–213.
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[8] J. Wang, J. Sun, Q. Sun, Single-PPLN-based simultaneous half-adder, halfsubtracter, and OR logic gate: proposal and simulation, Opt. Express 15 (2007) 209 1690–1699. 210 [9] Y.L. Zhang, Y. Zhang, B.J. Li, Optical switches and logic gates based on self211 collimated beams in two-dimensional photonic crystals, Opt. Express 15 (2007) 212 9287. 213 [10] D.E. Tranca, R. Tomescu, P. Schiopu, Design and simulation of infrared optical 214 logic gates based on Si photonic crystal waveguides for high density photonic 215 Q3 integrated circuits, Proc. SPIE 8411 (2012) 84110Q. 216 [11] H. Ren, C. Jiang, W. Hu, M. Gao, J. Wang, Photonic crystal channel drop filter 217 with a wavelength-selective reflection micro-cavity, Opt. Express 14 (2006) 218 2446–2458. 219 [12] Y. Fu, X. Hu, Q. Gong, Silicon photonic crystal all-optical logic gates, Phys. Lett. 220 A 377 (2013) 329–333. 221 [13] P. Andalib, N. Granpayeh, All-optical ultra-compact photonic crystal NOR gate based on nonlinear ring resonators, J. Opt. A: Pure Appl. Opt. 11 (2009) 08523. 207 208
[14] M. Belotti, J.F. Galisteo-Lopez, S.D. Angelis, M. Galli, I. Maksymov, L.C. Andreani, All-optical switching in 2D silicon photonic crystals with low loss waveguides and optical cavities, Opt. Express 16 (2008) 11624–11636. [15] Z.H. Zhu, W.M. Ye, J.R. Ji, X.D. Yuan, C. Zen, High-contrast light-by-light switching and AND gate based on nonlinear photonic crystals, Opt. Express 14 (2006) 1783–1788. [16] A. Shinya, T. Tanabe, E. Kuramochi, M. Notomi, All-optical switch and digital light processing using photonic crystals, NTT Tech. Rev. 3 (2005) 61–68. [17] Y. Fu, X. Hu, C. Lu, S. Yue, H. Yang, Q. Gong, All-optical logic gates based on nanoscale plasmonic slot waveguides, Nano Lett. 12 (2012) 5784. [18] S. Fan, S.G. Johnson, J.D. Joannopoulos, Waveguide branches in photonic crys, J. Opt. Soc. Am. B: Opt. Phys. 18 (2001) 162–165. [19] Q. Wang, Z. Ouyang, K. Tao, M. Lin, S. Ruan, T-shaped optical circulator based on coupled magneto-optical rods and a side-coupled cavity in a square-lattice photonic crystal, Phys. Lett. A 376 (2012) 646–649.
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ARTICLE IN PRESS
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Optik xxx (2015) xxx–xxx
Contents lists available at ScienceDirect
Optik journal homepage: www.elsevier.de/ijleo
Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals
1
2
3
Q1
Kiazand Fasihi ∗ Department of Electrical Engineering, Golestan University, Gorgan, Iran
4 5
a r t i c l e
6 19
i n f o
a b s t r a c t
7
Article history: Received 4 January 2016 Accepted 8 February 2016 Available online xxx
8 9 10 11 12
18
Keywords: All-optical logic gates Coupled-mode theory Finite-difference time-domain Photonic crystal T-branch combiner
20
1. Introduction
13 14 15 16 17
We have proposed all-optical three-port AND, OR, XOR and NOT photonic crystal logic gates, based on modified symmetric T-branch combiners. Using the temporal coupled-mode theory the operation of the symmetric T-branch combiner has been investigated and the conditions which lead to a maximum power at the output port have been obtained. At the output port of the proposed devices, the logics 1 and 0 are defined as a more than 42% and a less than 14% of the transmission, respectively. The minimum intensity contrast ratio of the suggested logic gates is about 4.77 dB. The operations of the proposed devices are examined using time-domain transition-response simulations which have been performed using two dimensional finite-difference time-domain method. © 2016 Published by Elsevier GmbH.
The rapidly growing use of all-optical processing systems, calls for ultra-compact and fast all-optical logic gates. The used designs for the creation of these devices can be basically classified into two categories: nonlinear and linear designs. The nonlinear designs are based on fiber gratings [1,2], semiconductor optical amplifiers (SOAs) [3], semiconductor microresonators [4], periodically poled lithium niobate (PPLN) waveguides [5–8], and so on. Unfortunately, most of these designs suffer from definite limitations such as large sizes, low speed operations, high drive-powers, or complex integrations. The linear designs are based on the self-collimation effect [9], multi-mode interference effect [10] and light beam interference effect [11,12]. The other candidate for all-optical logic gates are the photonic crystal (PC) based devices which can used in both the linear and the nonlinear regimes. There have recently been proposed several nonlinear designs of optical logic gates in two-dimensional (2D) PCs [13–16], but due to relatively small Kerr coefficient of the conventional nonlinear materials, there is still a great need to high optical drive-powers. In linear regime, and using the accurately controlled optical path difference in PC waveguides, realization of fast, low power and high contrast ratio all-optical logic gates are possible [12,17]. In this paper, we present an analytical approach for designing of different linear logic gates in PCs with square lattice. The coupled-mode theory (CMT) is employed to analyze the
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43
Q2
∗ Corresponding author. Tel.: +98 1714441003. E-mail address: [email protected]
behavior of the proposed all-optical three-port AND, OR, XOR and NOT logic gates. The validity of the proposed logic gates is investigated using 2D finite-difference time-domain (FDTD) method. The simulation results verify the validity of the proposed design approaches. 2. Model and operating principles of the proposed three-port OR, AND, XOR and NOT logic gates
1 da = jω0 a − a + i dt i
S−i = S+i +
2 a, i
i
45 46 47 48
49 50
All of our presented logic gate designs are composed of a typical symmetric T-branch combiner, which will be slightly modified for designing different types of logic gates. First, we evaluate the operation of a typical symmetric T-branch combiner that its CMT based schematic diagram is shown in Fig. 1. As can be seen, S +i and S−i , where i = 1, 2 and 3, represent the incoming and outgoing electromagnetic (EM) waves into the PC resonator, respectively. The CMT equations that describe the temporal change of the normalized mode amplitude of the resonator, a, are described by [18]
44
51 52 53 54 55 56 57 58 59 60
S+i
2 i
,
(1)
61
(2)
62
where 1/1 , 1/2 and 1/3 are the decay rates of the resonant cavity into the port 1, 2 and 3, respectively. When the EM wave is
http://dx.doi.org/10.1016/j.ijleo.2016.02.012 0030-4026/© 2016 Published by Elsevier GmbH.
Please cite this article in press as: K. Fasihi, Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals, Optik - Int. J. Light Electron Opt. (2015), http://dx.doi.org/10.1016/j.ijleo.2016.02.012
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Table 1 The operation ofOR gate. Inputs: (pin : 0) ≡ state 0, pout /pin ≤ 0.14 ≡ state 0,
(pin : 0.5P0 ) ≡ state1, Output:
pout /pin ≥ 0.42 ≡ state1.
IN2
IN1
Transmission (%)
Logic output
0 0 1 1
0 1 0 1
0 50 50 200
0 1 1 1
4.77 dB ≤ ICR.
Fig. 1. The CMT based schematic diagram of a T-branch combiner.
Fig. 3. The time-domain transition-response of the proposed OR logic gate.
Fig. 2. (a) The schematic structure of the proposed PC OR logic gate. (b) The transmission spectrum at the OUT port.
65 66
67
launched only from the upside into the resonator (S +1 , S+3 = 0) , and assuming that 1/2 = 1/3 and ω = ω0 , one can find
S−1 2 T1 = = S +2
68
S−3 2 T3 = = S +2
4/1 2
1/1 + 2/2
2/2
2
=
2
1/1 + 2/2
2 =
4 (1 + 2)
S−2 2 = S
R= , 2
42 (1 + 2)
Fig. 4. The field distributions of the proposed OR logic gate when (a) (IN1 ,IN2 )≡(1,1). (b) (IN1 ,IN2 )≡(0,1).
2
,
(3)
(4)
+2
1/1
2
1/1 + 2/2
2 =
1 (1 + 2)2
,
(5)
where = 1 /2 . From Fig. 1 and using of Eq. (3), one can find that the maximum transmission power coefficient of 50% into the output port (port 1) can be achieved when = 1/2. This condition can be easily satisfied through a reduction in the decay rates of the resonant cavity into the vertical branches in Fig. 1. Furthermore, in this case one can see that T 3 = R = 25%. Accordingly, in
Please cite this article in press as: K. Fasihi, Design and simulation of linear logic gates in the two-dimensional square-lattice photonic crystals, Optik - Int. J. Light Electron Opt. (2015), http://dx.doi.org/10.1016/j.ijleo.2016.02.012
69
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Fig. 5. The schematic structure of the proposed PC AND logic gate. (b) The trans-
Q4 mission spectrum at the OUT port. Fig. 7. The field distributions of the proposed AND logic gate when (a) (IN1 ,IN2 )≡(1,1). (b) (IN1 ,IN2 )≡(0,1).
Table 2 The operation of AND gate. IN2
IN1
Transmission (%)
Logic output
0 0 1 1
0 1 0 1
0 12.5 12.5 50
0 0 0 1
Fig. 8. The schematic structure of the proposed PC AND and NOT logic gates.
0). As a result, respect to the logic 1 and 0 definitions, the minimum intensity contrast ratio (ICR) of the suggested logic gates is about 4.77 dB. 2.1. OR logic gate
Fig. 6. The time-domain transition-response of the proposed AND logic gate.
76 77 78 79 80 81 82 83 84
the best case, using a typical symmetric T-branch combiner only half of the input power from the each of the vertical branches can be transferred into the output port. We will show that based on an appropriate interfering of the input EM waves (which can be lunched from the input ports 2 and 3) in the output port of the modified symmetric T-branch combiners, different all-optical logic gates can be implemented in PCs of square lattice. In all of the presented logic gates, for a specified input power, 0.5P0 , a more than 42% (a less than 14%) of the input powers is fined as the logic 1 (logic
86 87
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In following, the design and simulation of a PC three-port logic OR gate is presented. The used PC structure is a 2D square array of dielectric rods in air. The rods have a refractive index of 3.4 and a circular cross section of radius 0.2a, where a is the lattice constant and is equal to 573.2 nm. It can be shown that the used PC structure has a photonic band-gap for the transverse magnetic (TM) polarization between ωmin = 0.2876 2c/a and
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ωmax = 0.4228 2c/a . The inputs are amplitude modulation signals with the carrier wavelength of 1.55 m. It must be noted that throughout this paper, we assume that the input signals have the same frequencies and phases. The feasibility of these assumptions for the creation of all-optical logic gates has been proved by Li et al. and Fu et al. [12,17]. The schematic structure of the proposed PC OR logic gate is shown in Fig. 2(a). The = 1/2 condition is satisfied by placing two extra rods with a radius of 0.06a between
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Fig. 9. Dispersion curve of the PC line-defect waveguide versus the wave vector component k along the defect.
Table 3 The operation of XOR gate. IN2
IN1
Transmission (%)
Logic output
0 0 1 1
0 1 0 1
0 50 50 0
0 1 1 0
Table 4 The operation of NOT gate. REF
IN
Transmission (%)
Logic output
1 1
0 1
50 0
1 0
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the input ports and the output port. We investigate the operation of proposed logic gates by using the 2D FDTD simulations. Fig. 2(b) shows the transmission spectrum into the output port when only one of the inputs is enabled. As can be seen, in this case, for in = 1.55 m, the transmission is around 50%. From Fig. 2(a), it can be seen, the input branches are similar, so their optical path lengths are equal. Hence, it can be deduced that in an optimized OR logic gate (with = 1/2), when both input signals (IN1 and IN2 ) are applied, with the power of 0.5P0 , a constructive interference occurs at the output port, and the output light power reaches to P 0 , which corresponds to logic 1 (see Table 1). When only one of input signal is applied, the output power becomes 0.25P0 , which again corresponds to logic 1. Finally, when both of the input signals are disabled, the output power becomes zero, which corresponds to logic 0. The time-domain transition-response and the field distributions of the proposed OR logic gate are shown in Figs. 3 and 4, respectively. It must be noted that in the linear or nonlinear logic gate designs, the back reflection powers into the input ports is a serious issue. This problem can be overcome by using a PC Tbranch based circulator [19], which must be located on every input waveguides.
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2.2. AND logic gate
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Fig. 5(a) and (b) show the schematic of PC structure and the output transmission spectrum of the proposed AND logic gate, respectively. As can be seen, by placing an extra rod with the radius of 0.114a, at the distance of d = 0.3a from the center of the T-branch, one can reduce the transmission into the output port to T 1 = 12.5%. In this case, when both input signals (IN1 and IN2 ) are applied, with the power of 0.5P0 , the light power
Fig. 10. The time-domain transition-response of the proposed XOR logic gate when (a) (IN1 )≡(1,0,0) and (IN2 )≡(1,1,0). (b) (IN1 )≡(1,1,0) and (IN2 )≡(1,0,0).
at the output port reaches to 0.5P0 , which corresponds to logic 1. When only a single input signal is applied, the output power becomes 0.0625P0 , which corresponds to logic 0 and when both of the input signals are disabled, the output power becomes zero, which corresponds to logic 0. As a result an AND logic gate can be realized (see Table 2). The time-domain transition-response and the field distributions of the proposed AND logic gate are shown in Figs. 6 and 7, respectively. As can be seen, the maximum ICR between output logic gates of the AND logic gate is 6 dB. 2.3. XOR and NOT logic gates The schematic of the PC structure of the XOR and NOT logic gates is shown in Fig. 8. In these logic gates, the lengths of the input branches are chosen such that a phase difference, ϕ, is produced between the incoming waves to the output port. The dispersion curve of the line-defect waveguide versus the wave vector component k, along the defect, is shown in Fig. 9. As can be seen, given that ωin = 0.3698 (2c/a), the guided mode has a wave vector of 0.25 (2/a). In this case, when the length difference of the input branches, d, is equal 2a, we have ϕ = ˇd = , where ˇ is the propagation constant. Hence, in an optimized XOR logic gate (with = 1/2 and d = 2a,), when both input signals are applied, with the power of 0.5P0 , a destructive interference occurs and the
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Fig. 11. The field distributions of the proposed XOR logic gate when (a) (IN1 ,IN2 )≡(1,1). (b) (IN1 ,IN2 )≡(0,1).
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Fig. 13. The field distributions of the proposed NOT logic gate when (a) (IN1 ,IN2 )≡(1,1). (b) (IN1 ,IN2 )≡(1,0).
3. Conclusions An analytical approach for designing of different three-port logic gates in 2D PC with square lattice has been presented. The used input signals, operating at the same phase and frequency. The coupled-mode theory (CMT) has been employed to analyze the behavior of a symmetric T-branch combiner, and the condition which maximizes the transmission to the output port has been obtained. The validity of the suggested all-optical three-port AND, OR, XOR and NOT logic gates was investigated using 2D finite-difference time-domain (FDTD) method. Using the time-domain transition-response simulations, the performances of the proposed logic gates were examined. The simulation results show that the suggested logic gates, present simple and effective devices for realization of all-optical integrated circuits.
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Fig. 12. The time-domain transition-response of the proposed NOT logic gate.
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light power at the output port becomes zero, which corresponds to logic 0 (see Table 3). When only a single input signal is applied, the output power becomes 0.25P0 , which corresponds to logic 1. When both of the input signals are disabled, the output power becomes zero, which corresponds to logic 0. Hence, an XOR logic gate with a high ICR can be realized. In order to design a NOT logic gate, a Probe signal with the power of 0.5P0 is applied to the input port IN2 of the PC structure shown in Fig. 8. In this case, when the input signal (IN1 ) is applied, due to destructive interference, the output power becomes zero, and when the input signal is disabled, the output power becomes 0.25P0 , as a result a NOT logic gate can be realized (see Table 4). The time-domain transitionresponse and the field distributions of the proposed XOR logic gate (NOT logic gate) are shown in Figs. 10 and 11 (Figs. 12 and 13), respectively.
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