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n-GaAs camel-gate field effect transistors
Superlattices and Microstructures 37 (2005) 9–17 www.elsevier.com/locate/superlattices
Design consideration of δ-doping channels for high-performance n+-GaAs/p+-InGaP/n-GaAs camel-gate field effect transistors Jung-Hui Tsai∗, Jeng-Shyan Chen, Yu-Jui Chu Department of Physics, National Kaohsiung Normal University, 116, Ho-ping 1st Road, Kaohsiung, Taiwan, Province of China Received 21 February 2004; received in revised form 21 April 2004; accepted 6 June 2004 Available online 24 August 2004
Abstract The influence of δ-doping channels on the performance of n+ -GaAs/p+ -InGaP/n-GaAs camelgate field effect transistors is investigated by theoretical analysis and experimental results. The depleted pn junction of the camel gate and the existence of considerable conduction band discontinuity at the InGaP/GaAs heterojunction enhance the potential barrier height and the forward gate voltage. As the concentration–thickness products of the n-GaAs layer and δ-doping layer are fixed, the higher δ-doping device exhibits a higher potential barrier height, a larger drain current, and a broader gate voltage swing, whereas the transconductance is somewhat lower. For a n+ = 5.5 × 1012 cm−2 δ-doping device, the experimental result exhibits a maximum transconductance of 240 mS/mm and a gate voltage swing of 3.5 V. Consequently, the studied devices provide a good potential for large signal and linear circuit applications. © 2004 Elsevier Ltd. All rights reserved. Keywords: n+ -GaAs/p+ -InGaP/n-GaAs; Camel gate; Field effect transistors; δ-doping channel; Potential barrier height; Gate voltage swing; Transconductance
∗ Corresponding author. Tel.: +886 7 717 2930x3273; fax: +886 7 711 1681.
E-mail address: [email protected] (J.-H. Tsai). 0749-6036/$ - see front matter © 2004 Elsevier Ltd. All rights reserved. doi:10.1016/j.spmi.2004.06.002
10
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
1. Introduction Due to the rapid progress in growth technologies, heterostructure field effect transistors (FETs) have attracted considerable attention for microwave and digital circuit applications [1,2]. Previously, InGaP/GaAs FETs provided some advantages as compared with the AlGaAs/GaAs FETs, such as (i) low DX center, (ii) high etching selectively, and (iii) low reactivity with oxygen. Thus, high device reliability and performance are expectable [3–5]. Especially, high output linearity is essential for signal amplifiers in circuit applications. Recently, δ-doping FETs have been widely searched because the doping technique can provide a quasi-two-dimensional electron or hole gas to reduce impurity scattering for transporting carriers. They can offer higher breakdown voltage, voltageindependent transconductance, and easy control of threshold voltage, etc. [6–9]. However, the Schottky gate of the δ-doping (or conventional) FETs substantially suffers from a low potential barrier height, limiting the gate forward operation voltage [10]. Over the past years, n+ /p+ /n camel-gate FETs (CAMFETs), performing with high potential barrier height and device linearity, have been well demonstrated [11–13]. The camel gate has several advantages over the conventional metal–semiconductor Schottky gate, such as (i) elimination of the metallurgical difficulties of the metal–semiconductor contact, (ii) relatively easy adjustment of the built-in voltage, and (iii) the potential for improving reliability in adverse environments and under high power dissipation conditions. In this paper, design considerations and the performance of n+ -GaAs/p+ -InGaP/nGaAs δ-doping CAMFETs are demonstrated. Due to the depleted p–n junction from the p+ -InGaP gate to the channel region and the presence of the considerable conduction band discontinuity (Ec) at the InGaP/GaAs heterojunction, the heterostructure camel-like gate provides a relatively high potential barrier preventing the injection of electrons from the channel into the gate electrode under forward gate operation voltage, and enhances the drain current drivability. Furthermore, high device linearity is achieved for the employment of the δ-doping channel. In next section the device structure and experiments are depicted. The theoretical analysis and experimental results are illustrated in Sections 3 and 4, respectively. Finally a conclusion is summarized. 2. Device structure and experiments The studied structure was grown on an (100)-oriented semi-insulating GaAs substrate by metal organic chemical vapor deposition (MOCVD). The layers consist of a 0.5 µm undoped GaAs buffer, an n+ = 5.5 × 1012 cm−2 δ-doping sheet, a 500 Å n = 1 × 1017 cm−3 GaAs, a 100 Å p+ = 8 × 1018 cm−3 In0.49Ga0.51 P. Finally, a 200 Å n+ = 6 × 1018 cm−3 GaAs layer was deposited. By SIMS analysis, the fullwidth at half-maximum (FWHM) value of the δ-doping layer is about 25 Å. A mesa structure provided the required isolation. Drain and source ohmic contacts were performed by alloying evaporated AuGeNi metal at 400 ◦C for 30 s. The ohmic gate electrode was fabricated by evaporating Au metal. All the contacts are deposited on an n+ -GaAs cap layer. After these contacts are defined, the n+ -GaAs cap layer is partly recessed by wet etching. The gate dimension of the studied device was 1 × 100 µm2 .
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
11
Fig. 1. Schematic conduction band diagram of the studied n+ -GaAs/p+ -InGaP/n-GaAs camel-gate δ-doping CAMFETs.
3. Theoretical analysis The basic principle of the studied devices is that in the gate region a relatively thin p+ -InGaP layer between the n+ -GaAs and n-GaAs layers must be fully depleted at equilibrium and under bias conditions, and a camel-like gate is formed. The schematic conduction band diagram of the studied δ-doping CAMFETs is shown in Fig. 1. In the subsequent discussion, the device parameters are denoted as follows: Nd and Na represent the doping concentrations of the n+ -GaAs and the p+ -InGaP layers, respectively. N1 (d1 ) and N2 (d2 ) are the doping concentrations (thickness) of the n-GaAs layer and δ-doping channel, respectively. ε1 and ε2 are the dielectric constants of GaAs and InGaP materials, respectively. t, d, and w represent the thickness of the p+ -InGaP layer, the depletion depths into the n+ -GaAs cap layer and the δ-doping channel, respectively. Vn1 and Vn2 denote positions of the Fermi level relative to the conduction band edge in the n+ -GaAs cap layer and δ-doping sheet, respectively. Va is the applied gate-to-source (G–S) voltage. By solving the Poisson equation, the depletion depth w into the δ-doping channel layer will satisfy αw2 + βw + γ = 0
(1)
where
q N2 Nd 1 − 2ε1 Nd q N2 ε1 Na q N2 d1 + t + β= t − N1 d1 2ε1 ε2 Nd ε1 Nd α=
(2) (3)
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γ = A−B and
q qt ε1 Na N1 d12 + N1 d1 1 + + Vn1 + Vn2 + Va 2ε1 ε1 ε2 Nd q Na t 2 ε1 Na q B= 1+ + N 2 d 2. 2ε2 ε2 Nd 2ε1 Nd 1 1 A=
The depletion thickness extending to the n+ -GaAs cap layer is written as ε1 N1 d1 + N2 w Na d= t− . ε2 Na Nd
(4)
(5) (6)
(7)
Based on the saturated-velocity limited model, the drain-to-source (D–S) saturation current IDS , transconductance G m , potential barrier height φb , G–S depletion capacitance CGS , and current gain cut-off frequency f t can be expressed as IDS = qv N2 (d2 − w) ε1 vz Gm = d + t + d1 + w q Nd 2 qε22 Nd2 2 φb = d + 2 d + Ec 2ε1 2ε1 Na ε1 A CGS = d + t + d1 + w gm v ft = . = 2πCgs 2π L
(8) (9) (10) (11) (12)
In the above equations, L, z, and A are the length, width, and area, respectively. v is the saturation velocity chosen as 1.8 × 107 cm s−1 . The parameters of the studied devices are fixed as Nd = 6 × 1018 cm−3 , Na = 8 × 1018 cm−3 , d1 = 500 Å, d2 = 25 Å, and t = 100 Å, respectively, in the theoretical calculations. The influence of the δ-doping channel on the device performance is investigated as the concentration–thickness products of the n-GaAs layer and δ-doping sheet are fixed as 6 × 1012 cm−2 . The selected structure parameters are listed in Table 1. The depletion depths into the n+ -GaAs cap layer and the δ-doping channel versus the applied gate voltage are depicted in Fig. 2. When the gate bias is positive, the n+ -GaAs/p+ InGaP camel gate is reverse biased while the p+ -InGaP to channel is forward biased. On the other hand, when a negative gate bias is applied, the n+ -InGaP/p+ -InGaP camel gate is forward biased while the p+ -InGaP to channel is reverse biased. Specially, the maximum positive gate voltage is defined as the δ-doping channel w is entirely depleted in this analysis. Though the gate bias can be applied beyond the maximum positive gate voltage, the low-concentration n-GaAs layer will contribute the carrier conduction and the transconductance is abruptly decreased. It is not suitable for use in signal amplifier applications. As seen from the figure, the higher δ-doping device exhibits a broader gate voltage swing and a lower d value. Also, the w value linearly decreases with the gate voltage. The total depletion thickness of the gate slightly varies under the gate biases, and a relatively voltage-independent transconductance is expectable.
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
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Table 1 The selected parameters of the studied n+ -GaAs/p+ -InGaP/n-GaAs camel-gate δ-doping field effect transistors Device
Structure N1 (cm−3 ) d1 (Å)
δ (cm−2 )
No. 1
3 × 1017 500
4.5 × 1012
No. 2
2 × 1017 500
5.0 × 1012
No. 3 (Our Device)
1 × 1017 500
5.5 × 1012
No. 4
4 × 1016 500
5.8 × 1012
Fig. 2. The relationship between depletion depths d and w versus gate voltage of the device.
Fig. 3 shows the potential barrier height φb as a function of the applied gate voltage. The barrier height increases with gate voltage. At equilibrium, it varies from 1.26 V for δ(n+ ) = 5.8 × 1012 cm−2 to 1.12 V for δ(n+ ) = 4.5 × 1012 cm−2 , which values are relatively larger than that of a Schottky gate [10]. The higher barrier height can be attributed to the employment of the camel gate and the presence of considerable Ec (∼0.2 eV) at the InGaP/GaAs heterojunction. Thus, a positive gate voltage can be further extended and a large drain current is expectable. The relationship between potential barrier height and δ-doping concentration can be explained as follows. Because the depletion thickness into the n+ -GaAs increases with the increase of δ-doping concentration (or the decrease of n-GaAs concentration) as seen in Fig. 2, the contribution of depletion thickness into
14
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
Fig. 3. Potential barrier height φb as a function of applied gate bias.
p+ -InGaP resulting from the n+ -GaAs layer will increase. Thus, the potential barrier height, resulting from the depletion of n+ -GaAs and p+ -InGaP layers, substantially increases with the δ-doping concentration. The high potential barrier height enhances the devices to increase the gate forward bias. The relationships between calculated D–S saturation current and transconductance versus the applied gate voltage are depicted in Fig. 4. The maximum drain saturation currents of 120 and 160 mA are obtained for the devices N1 and N4, respectively. The maximum transconductance slightly decreases with the δ-doping concentration. It varies from 290 mS/mm for δ(n+ ) = 4.5 × 1012 cm−2 to 282 mS/mm for δ(n+ ) = 5.8 × 1012 cm−2 . Significantly, all of the studied devices exhibit relatively high device linearity due to the employment of a thin heavy-doping δ layer. Though the lower δ-doping device demonstrates a larger transconductance, it exhibits lower saturation current and a smaller gate voltage swing. Furthermore, the f t value of 28.65 fF is obtained for all of the devices in the calculation, which only depends on the geometrical factors and the material parameters as seen in Eq. (12). In consequence, a n+ = 5.5 × 1012 cm−2 δ-doping device can achieve a high potential barrier height, a large drain current, and a relatively voltage-independent transconductance, simultaneously. 4. Experimental results and discussion The experimental G–S current–voltage (I–V) characteristic of the studied device is shown in Fig. 5. The measured breakdown voltage is about 33 V at the gate current of 20 µA. The high breakdown voltage can be mainly attributed to the employment of
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
15
Fig. 4. Relationships between calculated drain-to-source saturation current and transconductance versus applied gate voltage.
Fig. 5. Experimental gate-to-source current–voltage characteristic of the studied device.
large energy-gap InGaP material in the gate region. Significantly, the turn-on voltage up to 1.7 V is measured due to the large potential barrier height. Fig. 6 illustrates the experimental D–S I –V characteristic of the studied device. The applied gate voltage is 0.5 V/step. The maximum gate voltage up to +2 V and the maximum drain saturation current of 112 mA are observed. The threshold voltage is of −3.5 V. The maximum transconductance of 240 mS/mm and a gate voltage swing (defined the gm above 200 mS/mm) larger than 3.5 V is obtained. Thus, employing both of the
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Fig. 6. Experimental drain-to-source current–voltage characteristic of the studied device. The applied gate voltage is 0.5 V/step.
camel gate and the δ-doping channel, the variety of depletion thickness under gate bias is relatively small and relatively high device linearity is achieved. When compared to the theoretical analysis in Section 3, the maximum drain current gain, transconductance, gate voltage swing, and threshold voltage of the experimental results are nearly consistent with the calculated results as seen in Figs. 4 and 6. Therefore, the simulated results are promising for demonstrating the device performance, and the model can be further developed for improving the accuracy. 5. Conclusion The influence of δ-doping channels on the performance of n+ -GaAs/p+ -InGaP/n-GaAs camel-gate δ-doping field effect transistors is discussed and realized. The theoretical model is developed to describe and explain the device characteristics. Excellent device performance including a high potential barrier height, a high drain output current, and a broad gate swing are achieved. The experimental results are consistent with the theoretical analysis. In consequence, the demonstrated devices provide promise for large signal and linear circuit applications. Acknowledgment This work was supported by the National Science Council of the Republic of China under Contract No. NSC 92-2218-E-017-001. References [1] P.C. Hsu, C. Nguyen, M. Kintis, IEEE Trans. Microwave Theory Tech. 45 (1997) 2150. [2] K. Yhland, N. Rorsman, M. Garcia, H.F. Merkel, IEEE Trans. Microwave Theory Tech. 48 (2000) 15.
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17 [3] [4] [5] [6] [7] [8] [9] [10] [11] [12] [13]
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J.R. Lothian, F. Ren, J.M. Kuo, J.S. Weiner, Y.K. Chen, Solid-State Electron. 41 (1997) 673. J.H. Tsai, Solid-State Electron. 46 (2002) 45. M.K. Tsai, S.W. Tan, Y.W. Wu, W.S. Lour, Y.J. Yang, Semicond. Sci. Technol. 17 (2002) 156. P.G. Young, R.A. Mena, S.A. Alterovitz, S.E. Schacham, E.J. Haugland, Electron. Lett. 28 (1992) 1352. K. Bord, H.C. Nutt, Electron. Lett. 28 (1992) 469. W.C. Hsu, C.L. Wu, M.S. Tsai, C.Y. Chang, W.C. Liu, H.M. Shieh, IEEE Trans. Electron Devices 42 (1995) 804. M.J. Kao, H.M. Shieh, W.C. Hsu, T.Y. Lin, Y.H. Wu, R.T. Hsu, IEEE Trans. Electron Devices 43 (1996) 1181. A. Bosacchi, S. Franchi, E. Gombia, R. Mosca, F. Fantini, R. Menozzi, Electron. Lett. 29 (1993) 651. R.E. Thorne, S.L. Su, R.J. Fischer, W.F. Kopp, W.G. Lyons, P.A. Miller, H. Morkoc, IEEE Trans. Electron Devices 30 (1983) 212. W.S. Lour, W.L. Chang, S.T. Young, W.C. Liu, Electron. Lett. 34 (1998) 814. W.C. Liu, K.H. Yu, K.W. Lin, J.H. Tsai, C.Z. Wu, K.P. Lin, C.H. Yen, IEEE Trans. Electron Devices 48 (2001) 1522.
Design consideration of δ-doping channels for high-performance n+-GaAs/p+-InGaP/n-GaAs camel-gate field effect transistors Jung-Hui Tsai∗, Jeng-Shyan Chen, Yu-Jui Chu Department of Physics, National Kaohsiung Normal University, 116, Ho-ping 1st Road, Kaohsiung, Taiwan, Province of China Received 21 February 2004; received in revised form 21 April 2004; accepted 6 June 2004 Available online 24 August 2004
Abstract The influence of δ-doping channels on the performance of n+ -GaAs/p+ -InGaP/n-GaAs camelgate field effect transistors is investigated by theoretical analysis and experimental results. The depleted pn junction of the camel gate and the existence of considerable conduction band discontinuity at the InGaP/GaAs heterojunction enhance the potential barrier height and the forward gate voltage. As the concentration–thickness products of the n-GaAs layer and δ-doping layer are fixed, the higher δ-doping device exhibits a higher potential barrier height, a larger drain current, and a broader gate voltage swing, whereas the transconductance is somewhat lower. For a n+ = 5.5 × 1012 cm−2 δ-doping device, the experimental result exhibits a maximum transconductance of 240 mS/mm and a gate voltage swing of 3.5 V. Consequently, the studied devices provide a good potential for large signal and linear circuit applications. © 2004 Elsevier Ltd. All rights reserved. Keywords: n+ -GaAs/p+ -InGaP/n-GaAs; Camel gate; Field effect transistors; δ-doping channel; Potential barrier height; Gate voltage swing; Transconductance
∗ Corresponding author. Tel.: +886 7 717 2930x3273; fax: +886 7 711 1681.
E-mail address: [email protected] (J.-H. Tsai). 0749-6036/$ - see front matter © 2004 Elsevier Ltd. All rights reserved. doi:10.1016/j.spmi.2004.06.002
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J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
1. Introduction Due to the rapid progress in growth technologies, heterostructure field effect transistors (FETs) have attracted considerable attention for microwave and digital circuit applications [1,2]. Previously, InGaP/GaAs FETs provided some advantages as compared with the AlGaAs/GaAs FETs, such as (i) low DX center, (ii) high etching selectively, and (iii) low reactivity with oxygen. Thus, high device reliability and performance are expectable [3–5]. Especially, high output linearity is essential for signal amplifiers in circuit applications. Recently, δ-doping FETs have been widely searched because the doping technique can provide a quasi-two-dimensional electron or hole gas to reduce impurity scattering for transporting carriers. They can offer higher breakdown voltage, voltageindependent transconductance, and easy control of threshold voltage, etc. [6–9]. However, the Schottky gate of the δ-doping (or conventional) FETs substantially suffers from a low potential barrier height, limiting the gate forward operation voltage [10]. Over the past years, n+ /p+ /n camel-gate FETs (CAMFETs), performing with high potential barrier height and device linearity, have been well demonstrated [11–13]. The camel gate has several advantages over the conventional metal–semiconductor Schottky gate, such as (i) elimination of the metallurgical difficulties of the metal–semiconductor contact, (ii) relatively easy adjustment of the built-in voltage, and (iii) the potential for improving reliability in adverse environments and under high power dissipation conditions. In this paper, design considerations and the performance of n+ -GaAs/p+ -InGaP/nGaAs δ-doping CAMFETs are demonstrated. Due to the depleted p–n junction from the p+ -InGaP gate to the channel region and the presence of the considerable conduction band discontinuity (Ec) at the InGaP/GaAs heterojunction, the heterostructure camel-like gate provides a relatively high potential barrier preventing the injection of electrons from the channel into the gate electrode under forward gate operation voltage, and enhances the drain current drivability. Furthermore, high device linearity is achieved for the employment of the δ-doping channel. In next section the device structure and experiments are depicted. The theoretical analysis and experimental results are illustrated in Sections 3 and 4, respectively. Finally a conclusion is summarized. 2. Device structure and experiments The studied structure was grown on an (100)-oriented semi-insulating GaAs substrate by metal organic chemical vapor deposition (MOCVD). The layers consist of a 0.5 µm undoped GaAs buffer, an n+ = 5.5 × 1012 cm−2 δ-doping sheet, a 500 Å n = 1 × 1017 cm−3 GaAs, a 100 Å p+ = 8 × 1018 cm−3 In0.49Ga0.51 P. Finally, a 200 Å n+ = 6 × 1018 cm−3 GaAs layer was deposited. By SIMS analysis, the fullwidth at half-maximum (FWHM) value of the δ-doping layer is about 25 Å. A mesa structure provided the required isolation. Drain and source ohmic contacts were performed by alloying evaporated AuGeNi metal at 400 ◦C for 30 s. The ohmic gate electrode was fabricated by evaporating Au metal. All the contacts are deposited on an n+ -GaAs cap layer. After these contacts are defined, the n+ -GaAs cap layer is partly recessed by wet etching. The gate dimension of the studied device was 1 × 100 µm2 .
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
11
Fig. 1. Schematic conduction band diagram of the studied n+ -GaAs/p+ -InGaP/n-GaAs camel-gate δ-doping CAMFETs.
3. Theoretical analysis The basic principle of the studied devices is that in the gate region a relatively thin p+ -InGaP layer between the n+ -GaAs and n-GaAs layers must be fully depleted at equilibrium and under bias conditions, and a camel-like gate is formed. The schematic conduction band diagram of the studied δ-doping CAMFETs is shown in Fig. 1. In the subsequent discussion, the device parameters are denoted as follows: Nd and Na represent the doping concentrations of the n+ -GaAs and the p+ -InGaP layers, respectively. N1 (d1 ) and N2 (d2 ) are the doping concentrations (thickness) of the n-GaAs layer and δ-doping channel, respectively. ε1 and ε2 are the dielectric constants of GaAs and InGaP materials, respectively. t, d, and w represent the thickness of the p+ -InGaP layer, the depletion depths into the n+ -GaAs cap layer and the δ-doping channel, respectively. Vn1 and Vn2 denote positions of the Fermi level relative to the conduction band edge in the n+ -GaAs cap layer and δ-doping sheet, respectively. Va is the applied gate-to-source (G–S) voltage. By solving the Poisson equation, the depletion depth w into the δ-doping channel layer will satisfy αw2 + βw + γ = 0
(1)
where
q N2 Nd 1 − 2ε1 Nd q N2 ε1 Na q N2 d1 + t + β= t − N1 d1 2ε1 ε2 Nd ε1 Nd α=
(2) (3)
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J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
γ = A−B and
q qt ε1 Na N1 d12 + N1 d1 1 + + Vn1 + Vn2 + Va 2ε1 ε1 ε2 Nd q Na t 2 ε1 Na q B= 1+ + N 2 d 2. 2ε2 ε2 Nd 2ε1 Nd 1 1 A=
The depletion thickness extending to the n+ -GaAs cap layer is written as ε1 N1 d1 + N2 w Na d= t− . ε2 Na Nd
(4)
(5) (6)
(7)
Based on the saturated-velocity limited model, the drain-to-source (D–S) saturation current IDS , transconductance G m , potential barrier height φb , G–S depletion capacitance CGS , and current gain cut-off frequency f t can be expressed as IDS = qv N2 (d2 − w) ε1 vz Gm = d + t + d1 + w q Nd 2 qε22 Nd2 2 φb = d + 2 d + Ec 2ε1 2ε1 Na ε1 A CGS = d + t + d1 + w gm v ft = . = 2πCgs 2π L
(8) (9) (10) (11) (12)
In the above equations, L, z, and A are the length, width, and area, respectively. v is the saturation velocity chosen as 1.8 × 107 cm s−1 . The parameters of the studied devices are fixed as Nd = 6 × 1018 cm−3 , Na = 8 × 1018 cm−3 , d1 = 500 Å, d2 = 25 Å, and t = 100 Å, respectively, in the theoretical calculations. The influence of the δ-doping channel on the device performance is investigated as the concentration–thickness products of the n-GaAs layer and δ-doping sheet are fixed as 6 × 1012 cm−2 . The selected structure parameters are listed in Table 1. The depletion depths into the n+ -GaAs cap layer and the δ-doping channel versus the applied gate voltage are depicted in Fig. 2. When the gate bias is positive, the n+ -GaAs/p+ InGaP camel gate is reverse biased while the p+ -InGaP to channel is forward biased. On the other hand, when a negative gate bias is applied, the n+ -InGaP/p+ -InGaP camel gate is forward biased while the p+ -InGaP to channel is reverse biased. Specially, the maximum positive gate voltage is defined as the δ-doping channel w is entirely depleted in this analysis. Though the gate bias can be applied beyond the maximum positive gate voltage, the low-concentration n-GaAs layer will contribute the carrier conduction and the transconductance is abruptly decreased. It is not suitable for use in signal amplifier applications. As seen from the figure, the higher δ-doping device exhibits a broader gate voltage swing and a lower d value. Also, the w value linearly decreases with the gate voltage. The total depletion thickness of the gate slightly varies under the gate biases, and a relatively voltage-independent transconductance is expectable.
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
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Table 1 The selected parameters of the studied n+ -GaAs/p+ -InGaP/n-GaAs camel-gate δ-doping field effect transistors Device
Structure N1 (cm−3 ) d1 (Å)
δ (cm−2 )
No. 1
3 × 1017 500
4.5 × 1012
No. 2
2 × 1017 500
5.0 × 1012
No. 3 (Our Device)
1 × 1017 500
5.5 × 1012
No. 4
4 × 1016 500
5.8 × 1012
Fig. 2. The relationship between depletion depths d and w versus gate voltage of the device.
Fig. 3 shows the potential barrier height φb as a function of the applied gate voltage. The barrier height increases with gate voltage. At equilibrium, it varies from 1.26 V for δ(n+ ) = 5.8 × 1012 cm−2 to 1.12 V for δ(n+ ) = 4.5 × 1012 cm−2 , which values are relatively larger than that of a Schottky gate [10]. The higher barrier height can be attributed to the employment of the camel gate and the presence of considerable Ec (∼0.2 eV) at the InGaP/GaAs heterojunction. Thus, a positive gate voltage can be further extended and a large drain current is expectable. The relationship between potential barrier height and δ-doping concentration can be explained as follows. Because the depletion thickness into the n+ -GaAs increases with the increase of δ-doping concentration (or the decrease of n-GaAs concentration) as seen in Fig. 2, the contribution of depletion thickness into
14
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
Fig. 3. Potential barrier height φb as a function of applied gate bias.
p+ -InGaP resulting from the n+ -GaAs layer will increase. Thus, the potential barrier height, resulting from the depletion of n+ -GaAs and p+ -InGaP layers, substantially increases with the δ-doping concentration. The high potential barrier height enhances the devices to increase the gate forward bias. The relationships between calculated D–S saturation current and transconductance versus the applied gate voltage are depicted in Fig. 4. The maximum drain saturation currents of 120 and 160 mA are obtained for the devices N1 and N4, respectively. The maximum transconductance slightly decreases with the δ-doping concentration. It varies from 290 mS/mm for δ(n+ ) = 4.5 × 1012 cm−2 to 282 mS/mm for δ(n+ ) = 5.8 × 1012 cm−2 . Significantly, all of the studied devices exhibit relatively high device linearity due to the employment of a thin heavy-doping δ layer. Though the lower δ-doping device demonstrates a larger transconductance, it exhibits lower saturation current and a smaller gate voltage swing. Furthermore, the f t value of 28.65 fF is obtained for all of the devices in the calculation, which only depends on the geometrical factors and the material parameters as seen in Eq. (12). In consequence, a n+ = 5.5 × 1012 cm−2 δ-doping device can achieve a high potential barrier height, a large drain current, and a relatively voltage-independent transconductance, simultaneously. 4. Experimental results and discussion The experimental G–S current–voltage (I–V) characteristic of the studied device is shown in Fig. 5. The measured breakdown voltage is about 33 V at the gate current of 20 µA. The high breakdown voltage can be mainly attributed to the employment of
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
15
Fig. 4. Relationships between calculated drain-to-source saturation current and transconductance versus applied gate voltage.
Fig. 5. Experimental gate-to-source current–voltage characteristic of the studied device.
large energy-gap InGaP material in the gate region. Significantly, the turn-on voltage up to 1.7 V is measured due to the large potential barrier height. Fig. 6 illustrates the experimental D–S I –V characteristic of the studied device. The applied gate voltage is 0.5 V/step. The maximum gate voltage up to +2 V and the maximum drain saturation current of 112 mA are observed. The threshold voltage is of −3.5 V. The maximum transconductance of 240 mS/mm and a gate voltage swing (defined the gm above 200 mS/mm) larger than 3.5 V is obtained. Thus, employing both of the
16
J.-H. Tsai et al. / Superlattices and Microstructures 37 (2005) 9–17
Fig. 6. Experimental drain-to-source current–voltage characteristic of the studied device. The applied gate voltage is 0.5 V/step.
camel gate and the δ-doping channel, the variety of depletion thickness under gate bias is relatively small and relatively high device linearity is achieved. When compared to the theoretical analysis in Section 3, the maximum drain current gain, transconductance, gate voltage swing, and threshold voltage of the experimental results are nearly consistent with the calculated results as seen in Figs. 4 and 6. Therefore, the simulated results are promising for demonstrating the device performance, and the model can be further developed for improving the accuracy. 5. Conclusion The influence of δ-doping channels on the performance of n+ -GaAs/p+ -InGaP/n-GaAs camel-gate δ-doping field effect transistors is discussed and realized. The theoretical model is developed to describe and explain the device characteristics. Excellent device performance including a high potential barrier height, a high drain output current, and a broad gate swing are achieved. The experimental results are consistent with the theoretical analysis. In consequence, the demonstrated devices provide promise for large signal and linear circuit applications. Acknowledgment This work was supported by the National Science Council of the Republic of China under Contract No. NSC 92-2218-E-017-001. References [1] P.C. Hsu, C. Nguyen, M. Kintis, IEEE Trans. Microwave Theory Tech. 45 (1997) 2150. [2] K. Yhland, N. Rorsman, M. Garcia, H.F. Merkel, IEEE Trans. Microwave Theory Tech. 48 (2000) 15.
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