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Design hints for best noise and signal behaviour in DMILL amplifiers1
Nuclear Instruments and Methods in Physics Research A 421 (1999) 552—557
Design hints for best noise and signal behaviour in DMILL amplifiers P.F. Manfredi , A. Leona , E. Mandelli , V. Re , V. Speziali * Lawrence Berkeley National Laboratory, Berkeley, CA 94720, USA Universita% di Pavia, Dipartimento di Elettronica, Via Ferrata 1, 27100 Pavia, Italy INFN, Sezione di Pavia, Via Bassi 6, 27100 Pavia, Italy Received 4 May 1998
Abstract As a result of a research and development activity on monolithic low noise structures based on the DMILL process, some basic design criteria have been drawn. These criteria are presented in this paper to show how they can lead to preamplifiers of outstanding noise characteristics that suit applications ranging from calorimetry to tracking and radiation spectrometry. 1999 Elsevier Science B.V. All rights reserved.
1. Introduction DMILL process, which offers to the designer four different device types, NPN bipolar transistors, P-channel JFETs, N- and P-channel MOSFETs, has already been successfully employed in the realisation of low noise preamplifiers [1—6]. Meanwhile, the peculiar features of DMILL, where all the devices reside in an epitaxial region grown on a SIMOX layer and are insulated from each other by vertical SiO trenches, have opened up
* Correspondence address: Universita` di Pavia, Dipartimento di Elettronica, Via Ferrata 1, 27100 Pavia, Italy Tel.: #39 382 505216; fax: #39 382 422583; e-mail: [email protected]. This research was supported by the Italian CNR contract No. 95.00166. CTO 7. Present address: Universita` di Bergamo, Dipartimento di Ingegneria, Viale Marconi 5, 24044 Dalmine, Italy.
several interesting possibilities in the design of front-end systems for radiation detectors. The present paper aims at discussing a few design suggestions that are the result of observations and measurements done on DMILL preamplifiers developed for different applications. All the preamplifiers discussed here employ the P-JFET as a front-end element as suggested by the need of optimising the noise behaviour on the broadest possible range of applications. In order to make the preamplifiers suitable for both room temperature and cryogenic operations, the bipolar transistor was discarded and the design based upon JFETs and MOSFETs. Two different classes of amplifiers are considered here. One of them is tailored to calorimetry applications with source capacitances in the 100—1000 pF range. The other one is intended for applications with strip detectors as well as high resolution spectrometry with source capacitances
0168-9002/99/$ — see front matter 1999 Elsevier Science B.V. All rights reserved PII: S 0 1 6 8 - 9 0 0 2 ( 9 8 ) 0 1 1 3 9 - 5
P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
in the 10 pF region. It will be shown in what follows that the optimisation of the two preamplifier types required different circuit architectures and, in particular, the functions assigned to the MOSFETs differ substantially in two cases. The DMILL JFETs are double-gate devices. In all the circuits considered here the two gates are connected together, so the effective gate width is actually twice the ¼ value shown in the circuit diagrams.
2. Calorimetry preamplifiers The optimisation of the preamplifier architectures for calorimetry applications with detector capacitances of hundreds of pF has passed through different test structures designed with the purpose of understanding the limitations of specific sections in the circuit. All the calorimetry preamplifier structures have the same size of input P-JFET, fixed on the basis of the source capacitance to be matched (gate width ¼"5;10 lm, gate length ¸"1.2 lm, yielding an input capacitance C of about 150 pF). The very first preamplifier employed only PJFETs [2]. Although it featured a remarkably good noise behaviour on a broad range of peaking time values, it was not considered suitable for covering the broad range of calorimetry applications the design was aimed to. Its limitations stem from its being based on a single device type, operating in depletion mode. Because of that, internal level shifting is of difficult implementation and the output stage is able to handle only large signals of one polarity. Besides, the only way of realising reference current sources is by means of FET diodes, which is a solution of limited accuracy. It was decided, accordingly, to take full advantage of the DMILL design versatility and to implement the internal level shifting by using an N-MOS common-gate amplifier following the JFET input cascode. The circuit diagram of the P-JFET-NMOS preamplifier is shown in Fig. 1. In Fig. 1 all the resistors and capacitors are external components. The JFETs J1, J2 implement the input cascode. The MOS M3 is the commongate current amplifier which transfers the output
553
signal current from the drain of J2 to the high impedance point on the drains of M3 and J3, where the voltage gain develops. The mirror (M1, M2) provides the current to J1 and J2, the fraction which flows in M3 being set by the (J3, J4) current source. The configuration of Fig. 1 was realized with the aim of finding out whether or not the N-MOS current mirror (M1, M2) and the current follower M3 may contribute to the total noise in a substantial way, especially as far as the 1/f component goes. For this reason, no particular care was put in the design of the output stage, which is a simple source follower (M4) with M5 as an active load. The ENC vs. t plot of Fig. 2 was obtained at a standing current of 5.7 mA in the JFET J1, whose transconductance in this condition is about 50 mS. A 500 pF capacitor was connected across the preamplifier input port to simulate the detector. The preamplifier was followed by a semigaussian unipolar shaper of variable peaking time t . As clearly pointed out by the plot of Fig. 2, throughout the explored range of t values, the slope of the ENC vs. t plot is close to 0.5 and the fit-extrapolated 1/f contribution is only 1255 electrons rms. These two facts seem to confirm that the dominant noise is white and that the 1/f contribution brought about by the M1, M2 current mirror and by M3 is reasonably small. As a next step, one more preamplifier structure was developed with a twofold purpose. One was to check whether the JFET cascode is really necessary or whether a complementary cascode, made of a P-JFET as an input device and an N-MOS as a common-gate element would yield equally good noise performances. The second purpose was to test a feedback output buffer able to switch large currents in either directions to resistive and capacitive loads. The new preamplifier structure is shown in Fig. 3. Its input JFET J1 is identical to the corresponding device of the previous circuit. The difference in the input section of this preamplifier as compared to that of Fig. 1 is that J2 has been removed and the input cascode is made of J1 and M3. The function of the current mirror (M1, M2) and that of the (J3, J4) current source are identical to those of the corresponding subcircuits of Fig. 1. The feedback output stage with a large
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Fig. 1. P-JFET-NMOS preamplifier using a JFET input cascode.
bidirectional current capability consists in the source follower (M4, M5) inserted in a feedback loop which from the drain of M4 returns to its source through J5 and M5. Such a feedback on small signals has the effect of reducing the open-loop impedance on the source of M4. On a large positive swing on the gate of M4 the feedback tends to reduce the current in M5, thereby forcing M4 to deliver current to the load by ordi-
nary source-follower action. A large negative swing on the gate of M4, which would tend to turn it off, result in a positive signal on the drain of M4. Such a signal is coupled through J5 to the gate of M5 thereby forcing its drain to absorb current from the load. The output stage of Fig. 3, which is the complementary device version of a circuit known in the vacuum tube era as White cathode follower, has been proven to be a suitable solution in the actual
P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
555
Fig. 2. ENC as a function of the peaking time t for the P-JFET-NMOS preamplifier using a JFET input cascode. A 500 pF capacitor was connected across the input port to simulate the detector.
case, where its nonlinearities are smoothed down by the overall feedback loop around the preamplifier. The output stage of Fig. 3 has excellent load driving capabilities. Loaded by a 100 ) resistor, which simulates a cable of 50 ) characteristic impedance matched at both ends, the preamplifier operates with negligible distortion and integral nonlinearity of about 1% on positive and negative output signals up to 1.7 V at the preamplifier output. Noise analysis of the circuit in Fig. 3 showed, however, a limitation related to the input cascode. This can be understood with reference to Fig. 4, where the results of ENC measurements are plotted. They were obtained under the same test conditions of the ones of Fig. 2. To clarify whether a noticeable noise contribution is added by M3, it has been decided to investigate the behavior of the ENC vs. t curve in the region of longer t values, in order to follow up the transition from the region where ENC is totally governed by channel thermal noise to one where the 1/f contribution begins to be sensible. Analysis of the plot in Fig. 4 shows that already in the 0.5—1 ls t range the slope of the logarithmic plot is less than 0.5, thereby denoting the intervention of some 1/f-noise. The preamplifier of Fig. 3 is
Fig. 3. Charge sensitive preamplifier with a complementary input cascode.
Fig. 4. ENC as a function of the peaking time t measured on the preamplifier of Fig. 3 under the same test conditions of that of Fig. 2.
altogether more noisy than that of Fig. 1 and this might be explained by the fact that, being J2 absent, the impact of the voltage of M3 on the total noise referred to the preamplifier input is enhanced.
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P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
This statement can be understood by observing that, in absence of J2, the input JFET J1 loads the source of M3 with an impedance given by the parallel combination of its r and the term: 1 C #C #C %1 %", ) " (1) g C
%" where g is the transconductance of J1, C and
%1 C , respectively, its gate-to-source and gate%" to-drain capacitances and C the detector " capacitance. The numerical value of the resistive term loading the source of M3 may be well below 1 k). Consequently, the voltage noise of M3 affects the noise current on the drain of M3, that is, the output noise current in the cascode to a very noticeable extent. It can therefore be concluded that, in order to achieve the best noise behaviour on a broad range of peaking time values, it is mandatory to use the JFET cascode, J1, J2 to drive the common-gate MOSFET M3. The most suitable architecture for a preamplifier for calorimetry applications, featuring outstanding noise performances, being able to process a broad range of detector charge values can be developed on the basis of the previous considerations. The input section should be identical to the corresponding section of the circuit in Fig. 1, that is, (J1, J2) input cascode, M3 current follower, (J3, J4) current source and (M1, M2) current mirror. The output stage should be the feedback buffer of the preamplifier in Fig. 3 (M4, M5, J5, M6, M11).
The front-end element J1 is followed by two cascaded JFETs (J2, J3) in the common gate configuration. The JFET J2 added to the usual cascode structure (J1, J2) has the purpose of making a high impedance appear on the drain of J3, with the basic aim of achieving a large open-loop gain at low frequencies. The circuit (J4, J5, J8), loading the drain of J3, has been accordingly designed to present a high dynamic impedance. It consists of a current reference JFET diode (J4) on the source of J5 and a bootstrapping positive feedback loop which from the source of J4 through the buffer J8 returns to the gate of J5. In order to keep the gain of this loop as close as possible to 1, a cascoded current source (J6, J7) is employed as a load for J8. The JFET J8 implements also a buffering action for the signal developing at the drain of J3. The second buffer J10 has on its source the level shifter made of diode-connected MOSFETs (M1, M2, M3) fed by the current reference J9.
3. Spectrometry preamplifiers For these preamplifiers the emphasis was on reaching the best noise perfomances at shaping times considerably longer than in the previous case. Much smaller front-end devices have been used, featuring input capacitances of 5 and 10 pF. Although they combine P-JFETs and N-MOS like the previous one, the MOSFETs here are employed for totally different purposes. In particular, MOSFETs have been avoided in the input section, the reason for that being related to the need of removing the ENC contribution brought about by the 1/f-noise in the MOSFETs. The circuit diagram of the spectrometry preamplifier is shown in Fig. 5.
Fig. 5. Circuit diagram of preamplifiers for spectrometry applications. All resistors and capacitors are external components.
P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
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a non-resistive charge reset. Therefore, DMILL preamplifiers are expected to be able to provide adequate monolithic solutions to the problem of signal processing in extremely low noise radiation spectrometry.
4. Conclusions
Fig. 6. ENC vs. t at different values of the detector simulating capacitance C . "
From the upper node of the level shifter the signal goes to the final buffer, made of the N-MOS source follower whose standing current is set by the FET diode J11. The preamplifier of Fig. 5 has been realised in two versions that differ only for the gate width ¼ of J1. In one of them J1 has ¼"625 lm corresponding to an input capacitance of 5 pF. In the second one J1 has ¼"1250 lm and an input capacitance of 10 pF. The preamplifier architecture of Fig. 5, where only JFETs are used in the section which governs the noise performances, has outstanding ENC characteristics. As an example, Fig. 6 shows for the preamplifier with smaller J1 (¼"625 lm) the ENC dependence on the peaking time t , measured at different C values. " The curves plotted in Fig. 6 were obtained with the operating condition in the preamplifier fixed by an external 10 G) resistor. The shaping following the preamplifier was semigaussian unipolar, implemented by a module of current production. As apparent in Fig. 6, at C "0, the ENC value at the " longest explored t is 45 electrons rms. The limiting value may undergo further reduction once the thermal and dielectric noise contributions from the external feedback resistor are removed by using
The realisation of low noise test structures in DMILL technology considerably helped in gaining more insight into characteristics and limitations of DMILL as a basis for low noise monolithic design. Criteria for optimising signal and noise behaviour of preamplifiers covering different application areas have been obtained. These criteria provided the ground for the realisation of low noise preamplifiers with outstanding characteristics.
Acknowledgements The authors are greatly indebted to Massimo Manghisoni who carried out a large part of the experimental work described in this paper.
References [1] M. Dentan et al., IEEE Trans. Nucl. Sci. 43 (Part II) (1996) 1763. [2] J. Ardelean, A. Hrisoho, K. Truong, P.F. Manfredi, V. Speziali, F. Svelto, M. Citterio, Nucl. Instr. and Meth. A 376 (1996) 217. [3] L. Blanquart, Performance of ATLAS Pixel Prototype chip, 3rd Int. Meeting on Front-End Electronics for High resolution Tracking Detectors, Taos, NM, November 5—8, 1997. [4] J. Ardelean, M. Citterio, A. Hrisoho, P.F. Manfredi, V. Speziali, K. Truong, On the noise behaviour of DMILL charge and current-sensitive preamplifier architectures, Nucl. Instr. and Meth. A406 (1998) 127. [5] F. Pengg, M. Campbell, E.H.M. Heijne, W. Snoeys, IEEE Trans. Nucl. Sci. 43(3) (1996) 1732. [6] F. Anghinolfi et al., SCTA — A Rad-hard BiCMOS Analogue Readout ASIC for the Atlas Semiconductor Tracker, IEEE Trans. Nucl. Sci. 44 (3, pt. 1—2) (6, pt. 2) (1997) 298—302.
Design hints for best noise and signal behaviour in DMILL amplifiers P.F. Manfredi , A. Leona , E. Mandelli , V. Re , V. Speziali * Lawrence Berkeley National Laboratory, Berkeley, CA 94720, USA Universita% di Pavia, Dipartimento di Elettronica, Via Ferrata 1, 27100 Pavia, Italy INFN, Sezione di Pavia, Via Bassi 6, 27100 Pavia, Italy Received 4 May 1998
Abstract As a result of a research and development activity on monolithic low noise structures based on the DMILL process, some basic design criteria have been drawn. These criteria are presented in this paper to show how they can lead to preamplifiers of outstanding noise characteristics that suit applications ranging from calorimetry to tracking and radiation spectrometry. 1999 Elsevier Science B.V. All rights reserved.
1. Introduction DMILL process, which offers to the designer four different device types, NPN bipolar transistors, P-channel JFETs, N- and P-channel MOSFETs, has already been successfully employed in the realisation of low noise preamplifiers [1—6]. Meanwhile, the peculiar features of DMILL, where all the devices reside in an epitaxial region grown on a SIMOX layer and are insulated from each other by vertical SiO trenches, have opened up
* Correspondence address: Universita` di Pavia, Dipartimento di Elettronica, Via Ferrata 1, 27100 Pavia, Italy Tel.: #39 382 505216; fax: #39 382 422583; e-mail: [email protected]. This research was supported by the Italian CNR contract No. 95.00166. CTO 7. Present address: Universita` di Bergamo, Dipartimento di Ingegneria, Viale Marconi 5, 24044 Dalmine, Italy.
several interesting possibilities in the design of front-end systems for radiation detectors. The present paper aims at discussing a few design suggestions that are the result of observations and measurements done on DMILL preamplifiers developed for different applications. All the preamplifiers discussed here employ the P-JFET as a front-end element as suggested by the need of optimising the noise behaviour on the broadest possible range of applications. In order to make the preamplifiers suitable for both room temperature and cryogenic operations, the bipolar transistor was discarded and the design based upon JFETs and MOSFETs. Two different classes of amplifiers are considered here. One of them is tailored to calorimetry applications with source capacitances in the 100—1000 pF range. The other one is intended for applications with strip detectors as well as high resolution spectrometry with source capacitances
0168-9002/99/$ — see front matter 1999 Elsevier Science B.V. All rights reserved PII: S 0 1 6 8 - 9 0 0 2 ( 9 8 ) 0 1 1 3 9 - 5
P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
in the 10 pF region. It will be shown in what follows that the optimisation of the two preamplifier types required different circuit architectures and, in particular, the functions assigned to the MOSFETs differ substantially in two cases. The DMILL JFETs are double-gate devices. In all the circuits considered here the two gates are connected together, so the effective gate width is actually twice the ¼ value shown in the circuit diagrams.
2. Calorimetry preamplifiers The optimisation of the preamplifier architectures for calorimetry applications with detector capacitances of hundreds of pF has passed through different test structures designed with the purpose of understanding the limitations of specific sections in the circuit. All the calorimetry preamplifier structures have the same size of input P-JFET, fixed on the basis of the source capacitance to be matched (gate width ¼"5;10 lm, gate length ¸"1.2 lm, yielding an input capacitance C of about 150 pF). The very first preamplifier employed only PJFETs [2]. Although it featured a remarkably good noise behaviour on a broad range of peaking time values, it was not considered suitable for covering the broad range of calorimetry applications the design was aimed to. Its limitations stem from its being based on a single device type, operating in depletion mode. Because of that, internal level shifting is of difficult implementation and the output stage is able to handle only large signals of one polarity. Besides, the only way of realising reference current sources is by means of FET diodes, which is a solution of limited accuracy. It was decided, accordingly, to take full advantage of the DMILL design versatility and to implement the internal level shifting by using an N-MOS common-gate amplifier following the JFET input cascode. The circuit diagram of the P-JFET-NMOS preamplifier is shown in Fig. 1. In Fig. 1 all the resistors and capacitors are external components. The JFETs J1, J2 implement the input cascode. The MOS M3 is the commongate current amplifier which transfers the output
553
signal current from the drain of J2 to the high impedance point on the drains of M3 and J3, where the voltage gain develops. The mirror (M1, M2) provides the current to J1 and J2, the fraction which flows in M3 being set by the (J3, J4) current source. The configuration of Fig. 1 was realized with the aim of finding out whether or not the N-MOS current mirror (M1, M2) and the current follower M3 may contribute to the total noise in a substantial way, especially as far as the 1/f component goes. For this reason, no particular care was put in the design of the output stage, which is a simple source follower (M4) with M5 as an active load. The ENC vs. t plot of Fig. 2 was obtained at a standing current of 5.7 mA in the JFET J1, whose transconductance in this condition is about 50 mS. A 500 pF capacitor was connected across the preamplifier input port to simulate the detector. The preamplifier was followed by a semigaussian unipolar shaper of variable peaking time t . As clearly pointed out by the plot of Fig. 2, throughout the explored range of t values, the slope of the ENC vs. t plot is close to 0.5 and the fit-extrapolated 1/f contribution is only 1255 electrons rms. These two facts seem to confirm that the dominant noise is white and that the 1/f contribution brought about by the M1, M2 current mirror and by M3 is reasonably small. As a next step, one more preamplifier structure was developed with a twofold purpose. One was to check whether the JFET cascode is really necessary or whether a complementary cascode, made of a P-JFET as an input device and an N-MOS as a common-gate element would yield equally good noise performances. The second purpose was to test a feedback output buffer able to switch large currents in either directions to resistive and capacitive loads. The new preamplifier structure is shown in Fig. 3. Its input JFET J1 is identical to the corresponding device of the previous circuit. The difference in the input section of this preamplifier as compared to that of Fig. 1 is that J2 has been removed and the input cascode is made of J1 and M3. The function of the current mirror (M1, M2) and that of the (J3, J4) current source are identical to those of the corresponding subcircuits of Fig. 1. The feedback output stage with a large
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P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
Fig. 1. P-JFET-NMOS preamplifier using a JFET input cascode.
bidirectional current capability consists in the source follower (M4, M5) inserted in a feedback loop which from the drain of M4 returns to its source through J5 and M5. Such a feedback on small signals has the effect of reducing the open-loop impedance on the source of M4. On a large positive swing on the gate of M4 the feedback tends to reduce the current in M5, thereby forcing M4 to deliver current to the load by ordi-
nary source-follower action. A large negative swing on the gate of M4, which would tend to turn it off, result in a positive signal on the drain of M4. Such a signal is coupled through J5 to the gate of M5 thereby forcing its drain to absorb current from the load. The output stage of Fig. 3, which is the complementary device version of a circuit known in the vacuum tube era as White cathode follower, has been proven to be a suitable solution in the actual
P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
555
Fig. 2. ENC as a function of the peaking time t for the P-JFET-NMOS preamplifier using a JFET input cascode. A 500 pF capacitor was connected across the input port to simulate the detector.
case, where its nonlinearities are smoothed down by the overall feedback loop around the preamplifier. The output stage of Fig. 3 has excellent load driving capabilities. Loaded by a 100 ) resistor, which simulates a cable of 50 ) characteristic impedance matched at both ends, the preamplifier operates with negligible distortion and integral nonlinearity of about 1% on positive and negative output signals up to 1.7 V at the preamplifier output. Noise analysis of the circuit in Fig. 3 showed, however, a limitation related to the input cascode. This can be understood with reference to Fig. 4, where the results of ENC measurements are plotted. They were obtained under the same test conditions of the ones of Fig. 2. To clarify whether a noticeable noise contribution is added by M3, it has been decided to investigate the behavior of the ENC vs. t curve in the region of longer t values, in order to follow up the transition from the region where ENC is totally governed by channel thermal noise to one where the 1/f contribution begins to be sensible. Analysis of the plot in Fig. 4 shows that already in the 0.5—1 ls t range the slope of the logarithmic plot is less than 0.5, thereby denoting the intervention of some 1/f-noise. The preamplifier of Fig. 3 is
Fig. 3. Charge sensitive preamplifier with a complementary input cascode.
Fig. 4. ENC as a function of the peaking time t measured on the preamplifier of Fig. 3 under the same test conditions of that of Fig. 2.
altogether more noisy than that of Fig. 1 and this might be explained by the fact that, being J2 absent, the impact of the voltage of M3 on the total noise referred to the preamplifier input is enhanced.
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P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
This statement can be understood by observing that, in absence of J2, the input JFET J1 loads the source of M3 with an impedance given by the parallel combination of its r and the term: 1 C #C #C %1 %", ) " (1) g C
%" where g is the transconductance of J1, C and
%1 C , respectively, its gate-to-source and gate%" to-drain capacitances and C the detector " capacitance. The numerical value of the resistive term loading the source of M3 may be well below 1 k). Consequently, the voltage noise of M3 affects the noise current on the drain of M3, that is, the output noise current in the cascode to a very noticeable extent. It can therefore be concluded that, in order to achieve the best noise behaviour on a broad range of peaking time values, it is mandatory to use the JFET cascode, J1, J2 to drive the common-gate MOSFET M3. The most suitable architecture for a preamplifier for calorimetry applications, featuring outstanding noise performances, being able to process a broad range of detector charge values can be developed on the basis of the previous considerations. The input section should be identical to the corresponding section of the circuit in Fig. 1, that is, (J1, J2) input cascode, M3 current follower, (J3, J4) current source and (M1, M2) current mirror. The output stage should be the feedback buffer of the preamplifier in Fig. 3 (M4, M5, J5, M6, M11).
The front-end element J1 is followed by two cascaded JFETs (J2, J3) in the common gate configuration. The JFET J2 added to the usual cascode structure (J1, J2) has the purpose of making a high impedance appear on the drain of J3, with the basic aim of achieving a large open-loop gain at low frequencies. The circuit (J4, J5, J8), loading the drain of J3, has been accordingly designed to present a high dynamic impedance. It consists of a current reference JFET diode (J4) on the source of J5 and a bootstrapping positive feedback loop which from the source of J4 through the buffer J8 returns to the gate of J5. In order to keep the gain of this loop as close as possible to 1, a cascoded current source (J6, J7) is employed as a load for J8. The JFET J8 implements also a buffering action for the signal developing at the drain of J3. The second buffer J10 has on its source the level shifter made of diode-connected MOSFETs (M1, M2, M3) fed by the current reference J9.
3. Spectrometry preamplifiers For these preamplifiers the emphasis was on reaching the best noise perfomances at shaping times considerably longer than in the previous case. Much smaller front-end devices have been used, featuring input capacitances of 5 and 10 pF. Although they combine P-JFETs and N-MOS like the previous one, the MOSFETs here are employed for totally different purposes. In particular, MOSFETs have been avoided in the input section, the reason for that being related to the need of removing the ENC contribution brought about by the 1/f-noise in the MOSFETs. The circuit diagram of the spectrometry preamplifier is shown in Fig. 5.
Fig. 5. Circuit diagram of preamplifiers for spectrometry applications. All resistors and capacitors are external components.
P.F. Manfredi et al. /Nucl. Instr. and Meth. in Phys. Res. A 421 (1999) 552—557
557
a non-resistive charge reset. Therefore, DMILL preamplifiers are expected to be able to provide adequate monolithic solutions to the problem of signal processing in extremely low noise radiation spectrometry.
4. Conclusions
Fig. 6. ENC vs. t at different values of the detector simulating capacitance C . "
From the upper node of the level shifter the signal goes to the final buffer, made of the N-MOS source follower whose standing current is set by the FET diode J11. The preamplifier of Fig. 5 has been realised in two versions that differ only for the gate width ¼ of J1. In one of them J1 has ¼"625 lm corresponding to an input capacitance of 5 pF. In the second one J1 has ¼"1250 lm and an input capacitance of 10 pF. The preamplifier architecture of Fig. 5, where only JFETs are used in the section which governs the noise performances, has outstanding ENC characteristics. As an example, Fig. 6 shows for the preamplifier with smaller J1 (¼"625 lm) the ENC dependence on the peaking time t , measured at different C values. " The curves plotted in Fig. 6 were obtained with the operating condition in the preamplifier fixed by an external 10 G) resistor. The shaping following the preamplifier was semigaussian unipolar, implemented by a module of current production. As apparent in Fig. 6, at C "0, the ENC value at the " longest explored t is 45 electrons rms. The limiting value may undergo further reduction once the thermal and dielectric noise contributions from the external feedback resistor are removed by using
The realisation of low noise test structures in DMILL technology considerably helped in gaining more insight into characteristics and limitations of DMILL as a basis for low noise monolithic design. Criteria for optimising signal and noise behaviour of preamplifiers covering different application areas have been obtained. These criteria provided the ground for the realisation of low noise preamplifiers with outstanding characteristics.
Acknowledgements The authors are greatly indebted to Massimo Manghisoni who carried out a large part of the experimental work described in this paper.
References [1] M. Dentan et al., IEEE Trans. Nucl. Sci. 43 (Part II) (1996) 1763. [2] J. Ardelean, A. Hrisoho, K. Truong, P.F. Manfredi, V. Speziali, F. Svelto, M. Citterio, Nucl. Instr. and Meth. A 376 (1996) 217. [3] L. Blanquart, Performance of ATLAS Pixel Prototype chip, 3rd Int. Meeting on Front-End Electronics for High resolution Tracking Detectors, Taos, NM, November 5—8, 1997. [4] J. Ardelean, M. Citterio, A. Hrisoho, P.F. Manfredi, V. Speziali, K. Truong, On the noise behaviour of DMILL charge and current-sensitive preamplifier architectures, Nucl. Instr. and Meth. A406 (1998) 127. [5] F. Pengg, M. Campbell, E.H.M. Heijne, W. Snoeys, IEEE Trans. Nucl. Sci. 43(3) (1996) 1732. [6] F. Anghinolfi et al., SCTA — A Rad-hard BiCMOS Analogue Readout ASIC for the Atlas Semiconductor Tracker, IEEE Trans. Nucl. Sci. 44 (3, pt. 1—2) (6, pt. 2) (1997) 298—302.