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Design of a wideband multi-standard antenna switch for wireless communication devices
Microelectronics Journal 42 (2011) 790–797
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Microelectronics Journal journal homepage: www.elsevier.com/locate/mejo
Design of a wideband multi-standard antenna switch for wireless communication devices Vlad Marian a,n, Jacques Verdier b, Bruno Allard a, Christian Vollaire a a b
Ampe re, UMR CNRS 5005, Universite´ de Lyon, Ecole Centrale de Lyon, 36 Av. Guy de Collongues, F-69134 Ecully, France Institut de Nanotechnologies de Lyon (INL), UMR CNRS 5270, Universite´ de Lyon, INSA Lyon, F-69621 Villeurbanne, France
a r t i c l e i n f o
a b s t r a c t
Article history: Received 18 November 2010 Received in revised form 7 January 2011 Accepted 17 January 2011 Available online 22 February 2011
A wideband Low Power Single Pole 6-Throw (SP6T) antenna switch has been designed for GSM/DCS/ 802.11b mobile standards using a newly improved architecture and fabricated using a pseudomorphic depletion mode 0.18 mm HEMT GaAs process. The switch exhibits less than 1 dB insertion loss and isolation performances from up to 53 dB at 0.8 GHz down to 42 dB at 2.5 GHz. The circuit DC power consumption is less than 500 mW in full power transmission condition and makes it suitable for use in mobile terminals like mobile phones or PDAs. The paper presents simulation results validated by experimental measurements on an IC prototype. & 2011 Elsevier Ltd. All rights reserved.
Keywords: MMIC Antenna switch Wideband Mobile telecommunications pHEMT transistors GaAs
1. Introduction Wireless devices are embedding more and more functions, which renders communication issues increasingly complex. Today mobile phones include many other features like 802.11b and Bluetooth connectivity or even a GPS transceiver. This increases the RF system complexity while in the mean time it is combined with the need for lower fabrication cost and more and more compact devices. This trend pushes for the development of integrated RF front-ends that share the same antenna for transmitting (Tx) or receiving (Rx) signals at different frequencies. The role of an antenna switch is to implement an interface between the antenna and the Tx/Rx ports of the different standards that need to use it. Traditionally PIN diodes have been used to switch signals in mobile communication systems, because they offer a good linearity and high power handling capabilities [1,2], but have the major disadvantage of high DC power consumption. This is mainly due to the fact that in order to obtain a good isolation or a low insertion loss, an important polarization current is required. In the case of a series connected diode, the insertion loss (IL) is given by [3] RS IL ¼ 20log 1 þ 2Z0
n
Corresponding author. Tel.: + 33 472186117; mobile: +33 632782155. E-mail address: [email protected] (V. Marian).
0026-2692/$ - see front matter & 2011 Elsevier Ltd. All rights reserved. doi:10.1016/j.mejo.2011.01.005
ð1Þ
where RS is the series resistance of the PIN diode and Z0 is the system characteristic impedance. The resistance of the intrinsic region, which is an important portion of the forward bias resistance, can be changed from high to low by the application of a forward bias current [4]: RI
L2i 1 P þvperim A 2mIdc tinterface
ð2Þ
where Li is the thickness of the intrinsic region, m is the average electron end hole mobility, Idc is the forward bias current, tinterface is the P+I interface minority carrier lifetime, vperim is the effective hole surface recombination velocity and P/A is the PIN diode periphery-to-area ratio. Thus for a given diode geometry, one has to lower the series resistance by increasing the forward bias current to obtain a low insertion loss. In addition a complex circuitry is needed to ensure the suitable DC polarization of these devices and an external driver is needed in order to control their switching speed. RF CMOS transistors have been introduced as antenna switches [5]. A RF CMOS technology offers the advantage of integration on the same die of the RF front-end standard components like charge pumps or decoders. These components can work using a single positive voltage source (like a battery) and are easily controlled using standard digital signals [6]. The standard bulk CMOS technology seems to be the best candidate for realizing RF transceivers for use in short-range wireless communications with not so strict requirements in noise
V. Marian et al. / Microelectronics Journal 42 (2011) 790–797
and power, such as Bluetooth and WLANs, at least from the point of view of low-cost and high-level integration with baseband LSIs [7]. The finite resistivity of the silicon substrate generates important loss at high frequency due to degradations in quality factors of on-chip passive elements such as spiral inductors and capacitors. This shortcoming has been overcome using Silicon-on-Insulator (SOI) technology. SOI switches offer satisfying isolation performances (larger than 50 dB) and a good insertion loss of less than 1 dB in the 0.8–2.5 GHz range [8,9]. Unfortunately these switches handle a limited amount of power, around 12 dBm, considerably less than what is currently obtained using HEMT processes. Several demonstrations of antenna switches using HEMT technologies have been presented in literature usually using GaAs, AlGaN/GaN or InP substrates. Low losses at high frequencies provided by the GaAs substrate have made it possible to obtain around 1 dB of insertion loss and isolation performances between 30 and 40 dB in a SP2T switch [10] and in a SP6T switch [11], respectively. It has also been shown [12] that the combination of series-shunt mounted HEMT transistors and resonant circuits could result in an improved isolation in the frequency range related to the resonant circuit. MEMS have also been considered as a possible solution for high performances and low-cost RF switches. These devices are operated by electrostatic forces: they therefore draw no quiescent current other than a very small leakage current [13]. Low loss dielectrics and high conductivity metals used for the fabrication of these devices give them a very low loss. MEMS-based RF switches suffer from limited lifetime (in the order of 1–100 million cycles) and high operating voltage requirements (in the range of 30–50 V) [14]. These devices remain inferior to their semiconductor competitors in terms of switching speed, making them unsuitable for switching GSM signals [15]. The paper presents a new SP6T structure demonstration capable of improved isolation performances between 42 and 53 dB in the 0.8–2.5 GHz frequency range and an insertion loss kept less than 1 dB. These state-of-the-art figures represent a good trade-off between isolation and insertion loss covering the entire frequency range used in mobile communication devices. It is a first work to our knowledge that presents a full multistandard switch, including both a 2.45 GHz branch together with GSM and DCS branches traditionally embedded. In the first section, the paper summarizes the main characteristics of the GaAs technology used for the fabrication of the prototype integrated circuit. The second section presents the general structure of the circuit and the awaited improvements with respect to series-shunt structures. The last section
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describes the prototype integrated circuit and compares measurements with simulation results. A good agreement is obtained.
2. Technology overview A prototype SP6T circuit was fabricated using the ED02AH process provided by OMMIC, a supplier of epitaxy, foundry services and MMICs based on advanced III–V processes. ED02AH is a depletion/accumulation pseudomorphic HEMT process with 0.18 mm gate length [16]. The transistors have a transition frequency fT of 60 GHz. This process was developed for both digital and analog applications in the millimeter wave and microwave range. The ED02AH process is also adapted for highspeed digital circuits for optical connections. The transistors generally exhibit 2, 4 or 6 gate fingers and each gate finger can be of 15–100 mm long. Total transistor gate lengths range between 30 and 600 mm. The equivalent circuit of a transistor for small signal simulation is presented in Fig. 1. In this equivalent circuit model, Cg, Cd, Cs, Lg, Ld and Ls are the external parasitic devices to the P-HEMT, Rg, Rs and Rd are the P-HEMT access resistances, Cgs, Cgd, Cds, Rds, Rgs, gm and td are the classical GaAs P-HEMT equivalent circuit elements while gate-drain conductance (Ggd), gate-source conductance (Ggs) and gate-drain series resistance (Rgd) are additional elements useful for a better accuracy in some particular operating conditions. For most applications, the on-state impedance is primarily resistive while the off-state impedance is mainly capacitive [17]. Only ‘‘normally off’’ transistors are used in this design. A ‘‘normally off’’ transistor is characterized by a threshold voltage of Vt ¼ + 0.225 V. The typical value of the supply voltage is + 3.3 V. A decision was made to use standard CMOS logic signals to control the state of the switch: low logic level under 0.1 V (and less than 10 mA leakage current) and high logic level above 2.5 V (and less than 10 mA leakage current). Transistor models have been verified and used for simulation-based design of the SP6T circuit.
3. Circuit design and optimization Most of the transistor-based antenna switches are built using a classic series-shunt topology, as shown in Fig. 2. They consist of main switches (T1 and T2) in series with the signal path. They block the signal when in off-state. The incoming signal then leaks
Fig. 1. Small signal equivalent circuit model of a ED02AH GaAs P-HEMT [6].
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Fig. 2. Circuit schematic of a SPDT Tx/Rx switch based on the series-shunt topology.
through a derivation transistor to the ground using secondary transistors (T3 and T4) in on-state. Transistors operate by pairs in an exclusive manner except if the antenna must be isolated. As shown in Fig. 2, it is possible to connect 2 branches using the same topology to the same antenna to realize the transmission and reception paths. The two control voltages V1 and V2 are used to control both the series transistor of one branch as well as the shunt transistor of the other branch. Gate resistances (R1–R4) are used to control the transistor gate current transients. The gate voltages’ swings remain low when a high RF power signal is transmitted. Capacitors C1 and C2 serve as DC isolation devices to ground.
Fig. 3. Influence of series transistor gate width on insertion loss for frequencies from 0.8 to 2.5 GHz.
3.1. Classical structure performances Simulations have been performed using Advanced Design System (ADS) 2008 by Agilent Technologies, in order to evaluate the performances of a switch based on the series-shunt standard topology using OMMIC GaAs process. The influence of the gate width of each of the series and shunt transistors on insertion loss and isolation has been evaluated in order to settle a trade-off. Fig. 3 shows the influence of the gate width of a 6-gate-finger series transistor on its insertion loss. The smaller the gate width, the larger the insertion loss and the lower the transconductance. There is then a trade-off to be settled between isolation, the insertion loss and the maximum operating power. A 100 mm gate width per gate finger has been chosen to respect power capabilities. This is true for the entire frequency range from 800 MHz to 2.5 GHz, because frequency has practically no influence on the insertion loss when the series transistor is in on-state and the gate-voltage is steady. This is mainly due to the fact that the HEMT-transistor channel behaves much as a simple resistor (Rds) of small value (around 4 O) with negligible capacitive parasitic elements. The insertion loss in the series transistor can thus be written as R ILseries ¼ 20log 1 þ ds ð3Þ 2Z0
Fig. 4. Influence of series transistor gate width on isolation in 0.8–2.5 GHz range.
during its off-state. The transistor mainly behaves as a capacitor (Cds) whose value is Wgate dependent: Cds ¼ Cds0 Wgate þ Cdse Nf
where Nf is the number of gate fingers, Cds0 is a technologyspecific capacitance (in F/mm) and Cdse is the supplementary parasitic capacitance introduced by connection paths between the gate fingers with respect to the first-level metal. The isolation of the series transistor can be expressed as
At the same time Rds ¼ Rds0 =Wgate
ð4Þ
where Wgate is the gate width of the transistor and Rds0 is the technology-specific resistance (measured in O mm). A large gate width allows to minimize the insertion loss. The maximum gate width per gate finger allowed by the ED02AH process is 100 mm. The isolation level drops as the gate width increases, as shown in Fig. 4. In addition frequency has an important influence on isolation. This can be easily explained when analyzing the expression for the isolation provided by the series transistor
ð5Þ
ISseries ¼ 10log 1 þ
1 2oCds Z0
2 ! ð6Þ
In this case the isolation is the best for low values of the gate width. The choice was made to prioritize the handling power and the low insertion loss over a high isolation, because isolation can be improved through the use of the shunt transistor and the insertion loss has the tendency to become more important as the number of branches connected to the same antenna increases.
V. Marian et al. / Microelectronics Journal 42 (2011) 790–797
The total gate width of the series transistor is then Wtotal ¼ Nf Windividual gate
ð7Þ
This amounts to a total equivalent gate length of 600 mm for each series transistor, the maximum allowed by this process. Simulation has shown that the presence of a shunt transistor does not significantly deteriorate the insertion loss of the switch (Fig. 5). The insertion loss due to the shunt transistor off-state is given by (8). In this mode, the shunt transistor behaves like a very small capacitor; hence it slightly deteriorates the adaptation: 2 ! 1 ILshunt ¼ 10log 1 þ ð8Þ oCds Z0 2 The generated additional loss is less than 0.025 dB in full frequency range and disregard of the gate width. The isolation is however strongly dependent on the shunt transistor gate width: Z0 ISshunt ¼ 20log 1 þ ð9Þ 2Rds
Fig. 5. Influence of shunt transistor gate width on insertion loss in 0.8–2.5 GHz range.
Fig. 6. Influence of shunt transistor gate width on isolation in 0.8–2.5 GHz range.
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A higher isolation is obtained for larger gate width per finger (Fig. 6). This is technology-limited to 100 mm. The presence of a shunt transistor would improve isolation by as much as 16 dB with hardly any influence on the insertion loss. The overall SPST structure is thus characterized by a total insertion loss of 0.48 dB and an isolation between 28 and 38 dB in the desired frequency domain. This is one branch of the multistandard switch.
3.2. Improved SP6T switch structure One possible solution when using this single branch in order to build a six-branch switch would be to connect six identical branches to the common antenna. Table 1 presents the evolution of switch parameters at 2 GHz as a function of the number of switch branches connected to the antenna. The number of branches connected to the antenna increases the insertion loss while the isolation remains fairly constant. Once 6-series-shunt structures are connected to the antenna as in Fig. 1, 1.1 dB insertion loss and 36 dB isolation are simulated at a frequency of 2 GHz. The isolation was considered to be unsatisfactory compared to previous designs. The structure is therefore modified in order to improve the isolation according to Fig. 7a and b, containing a partial transistor-level representation on circuit layout. Compared to the classical approach that would connect all the six branches directly to the antenna, the proposed switch topology adds two extra switches (K1 and K2) between the antenna and the Rx and Tx branches, respectively. Transistors K1 and K2 have 600 mm gate length to preserve power handling capabilities. This topology is equivalent to a two-branch structure, because only two branches are directly connected to the antenna at the same time. This results in an increase of 13 dB in isolation that now reaches 49 dB at 2 GHz. This is to our knowledge the highest isolation value obtained for a SP6T transistor-based switch in the 0.8–2.5 GHz frequency range. The presence of an additional transistor channel on the signal path would have a tendency to increase the insertion loss, but the insertion loss remains around 1.1 dB because only two branches are now directly connected to the antenna as in the case with the classical structure. It was also considered important to evaluate the influence of these additional switches (K1 and K2) on power handling capabilities and the distortion. The simulated 1 dB compression point of the classical switch structure has been evaluated to be 23 dBm. The presence of switches K1 and K2 in the modified structure lowers the 1 dB compression point to around 22 dBm. Their influence is negligible due to their large gate width. The influence of these switches on harmonics is shown in Fig. 8. An input signal of 10 dBm at 2 GHz is injected into a transmission branch of the switch. The spectrum presented is at the antenna level. The presence of the additional switches K1 and K2 has very little influence on the fundamental signal. However most of the harmonics are attenuated, sometimes by as much as 10 dB like in the case of the second harmonics. Only 7th and 8th harmonics are slightly increased, but their value is very low (less than 60 dBm). Simulated data shows that it is possible to lower the insertion loss value by inserting small series inductors at each extremity of the switch ports in order to improve the 50 O adaptation of the signal paths. The needed inductors range from 1 nH to 2 nH and their presence lowers the insertion loss to around 0.9 dB throughout the 0.8–2.5 GHz frequency range. Simulations have also predicted switching times as low as 10 ns. This is excellent compared to other demonstrations especially those using a CMOS process like in [5], where the switching
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Table 1 Performance comparison at 2 GHz between a classic SP6T switch structure and the proposed architecture. Classical approach
Improved structure
Number of branches
Insertion loss (dB)
Isolation (dB)
Insertion loss (dB)
Isolation (dB)
1 2 3 4 5 6
0.48 0.57 0.65 0.8 0.9 1.1
30 36 36 36 36 36
0.9 0.94 0.95 1 1.15 1.15
38 43 46 46 49 49
Fig. 8. Comparison of harmonic behavior between new and classical structures.
The transistor gates are controlled using CMOS-standard logic levels. High value resistors are used to control the transistor gate leakage current. The overall power consumption of the circuit is evaluated to be less than 500 mW.
4. Experimental results and discussion 4.1. Circuit layout and fabrication
Fig. 7. Modified SP6T switch topology (a); partial representation of circuit layout (b).
time is around 300 ns and is comparable with other GaAs prototypes. 3.3. Limiting the DC power consumption In order to limit the DC power consumption of the circuit, all transistors have been polarized in the triode region with VDS values close to zero. The DC polarization voltages of the transistor drain and source were chosen with the purpose of maximizing the RF voltage swing without accidentally changing the state of a transistor. A DC offset of 1.65 V was selected and applied through 10 kO on-chip resistors connected to the RF signal path.
The circuit layout was realized on a 100 mm GaAs substrate, which is characterized by a resistivity exceeding 107 O cm. The total die area is approximately 1.5 2 mm2. As seen in Section 3, DC capacitors are needed to connect the shunt transistors to the ground. The OMMIC technology offers two types of on-chip capacitors. The first type consists of a layer of 850 nm of SiO2 between two metal layers and it features a typical capacity of 49 pF/mm2. The second type consists of a 150 nm layer of SiN between two metal layers. It features a capacity of 400 pF/mm2. Simulations have shown that in order to limit the influence of the DC capacitors on circuit performances, their values should be in excess of 50 pF. Such a capacitor would occupy a semiconductor area of 350 350 mm2, resulting in an important increase in the circuit size. It was therefore decided to report the DC capacitors on the IC test board. Simulations have also shown that the presence of serial inductors at the RF input and output ports allows an improvement of the insertion loss by as much as 0.2 dB. As bonding wires are characterized by a typical inductance of roughly 1 nH/mm for a 25 mm diameter gold wire, the choice was made to use appropriate lengths of bonding wire to add the necessary inductance values. The lengths
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Fig. 10. Simulated and measured insertion losses of the fabricated GaAs antenna switch at full RF power.
Fig. 9. Photograph of the fabricated GaAs integrated circuit (top). Die is 3 mm 2 mm (switches are located on the left half of the IC). Test board (bottom) carries the external passive components.
of the bonding wires connected to the RF ports are between 1 and 2 mm. They have been optimized after primary measurements of the adaptation quality. Fig. 9 shows a photograph of the fabricated integrated circuit and the test board. The test board is fabricated on a standard 1.6 mm FR-4 substrate. It includes the surface-mounted DC capacitors and gate resistors that would have otherwise cost a large die area penalty.
4.2. Test results Measurements are performed with input signals from a radio frequency signal generator, thus allowing to control the injected power. The logic signals came from a set of batteries in order to limit insertion noise. The signal coming out of the switch is observed using a spectrum analyzer. All external cables, connectors as well as the printed circuit board metal interconnections have been previously characterized and the following measurement results take into account all the losses that these elements generate. Fig. 10 represents the evolution of the insertion loss value compared to the values predicted by simulation for frequencies ranging from 800 MHz to 2.5 GHz. The input signal is inserted into a transmission port and measured on the antenna port, while the reception part of the switch as well as the other transmission ports are configured in off-state. The same analysis is repeated by applying a signal into the antenna port and directing it towards a reception port, while all the other branches are in their off-state. The results are in very good agreement, confirming the process low variability or the negligible effect of the process variability on insertion loss and isolation. The measured values of the insertion loss are very close to the results obtained during simulation with less than 0.1 dB
Fig. 11. Simulated and measured isolation of the fabricated circuit.
difference. Any of the fabricated switch exhibits alone an insertion loss value between 1 and 1.1 dB throughout the frequency range. This confirms the fact that carefully dimensioned bonding wires allow to improve the 50 O adaptation of the switch ports and to decrease the overall insertion loss. The isolation is measured with the reception port in off-state while a signal is inserted in the transmission port in on-state towards the antenna. The experimental and simulation results are presented in Fig. 11. Again a good agreement is observed between simulation and measurement results. The difference between the two is less than 1.5 dB at most. The measured isolation ranges from up to 53 dB at 800 MHz down to 42 dB at 2.5 GHz. The total DC power consumption amounts to 480 mW, which can be considered as a low value when compared to the several mW or even several tens of mW consumed by a standard LNA designed to work in this frequency range [18]. Measurements have been performed in order to evaluate the power handling capabilities of the newly designed antenna switch (Fig. 12). The 1 dB compression point (P1 dB) of the circuit is over
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Table 3 Comparison of performances of this work with previous demonstrations.
Fig. 12. Measured P1 dB of the SP6T antenna switch at 2.45 GHz.
Fig. 13. Measured IP3 of the SP6T antenna switch at 2.45 GHz.
Table 2 Summary of fabricated GaAs switch performances. Symbol Parameter
Min.
Vcc Vlow Vhigh Pdc f IL IS P1 dB IP3 Ts
3.0
Supply voltage (V) Low level gate control voltage (V) High level gate control voltage (V) DC power consumption (mW) Frequency range (MHz) Insertion loss (dB) Isolation (dB) 1 dB compression point (dBm) 3rd order harmonics (dBm) interception point Switching time (ns)
Typ. Max.
3.8 4.0 0.0 3.3 0.48 800.0 2500.0 1.0 1.1 42.0 53.0 21.0 47.0 10.0
21 dBm of input power and the simulation was predicting 22 dBm. The 3rd order harmonics interception point (IP3) is estimated to be around 47 dBm, as shown in Fig. 13. These power handling figures make the circuit suitable for most of the communication standards used by mobile handsets.
Reference
Technology
Type
Band (GHz)
IL (dB)
Isolation (dB)
P1 dB (dBm)
[5] [6] [7] [8] [9] [10] [11] [12] [15] [19] [20] [21] [4] This work
CMOS CMOS CMOS CMOS-SOI CMOS-SOI HEMT GaN HEMT GaAs HEMT GaAs MEMS PIN Diode PIN Diode PIN Diode PIN Diode HEMT GaAs
SPDT SPDT SPDT SPDT SP9T SPDT SP6T SPST SP9T SPST SP6T SPST SPST SP6T
2.4 0–5 2.4 2.5–5 0.9–2.1 0.9–2.1 0.9–1.9 3–4 0–2.1 2–18 0.9–2.1 2–38 2–16 0.8–2.5
0.8 1.4 1.5 0.7 1 1 1 2 0.5 0.69 1.2 1.4 1 1
42 30 24 50 29–45 41–46 40 63 49–67 28 30–36 30 19–42 42–53
16 12 11 12 – 30 35 32 33 16 32 – – 21
Due to the lack of necessary equipment, it is not possible to measure the switching time of the designed switches. However it seems reasonable to think that the experimental switching time is roughly around 10 ns as predicted by simulation. This would be coherent with other GaAs switch demonstration for high-speed logic applications using the same technology (Table 2). Table 3 compares the performances of proposed switch with other previous designs. The proposed circuit introduces a novel SP6T topology that allows excellent isolation while maintaining a low insertion loss. Compared to the circuit in [11], the proposed switch has about the same amount of insertion loss, but a better isolation over a wider bandwidth. The power handling capability is lower but limited by the process. It is so far sufficient for mobile communication standards used by modern handsets. This work is to our knowledge the only realization to include an 802.11b branch together with the usual GSM/DCS branches in a SP6T topology. Moreover this device consumes very low DC power, but we were unable to make a full comparison of this parameter with other realizations because this parameter is seldom mentioned in publications.
5. Conclusion The design and optimization of an integrated SP6T antenna switch have been presented in a pseudomorphic depletion mode 0.18 mm HEMT GaAs commercial process. The classical series-shunt configuration is modified into an original structure in order to improve the isolation while preserving the insertion loss at full RF power. A multi-standard and wideband switch is obtained. The experiments on a fabricated integrated circuit confirm the simulation results. The proposed switch features excellent performances for a 6-branch structure in terms of insertion loss, isolation, power handling capability and switching time. The DC power consumption is small and the circuit is easily controlled by the standard CMOS logic signals. These characteristics make it suitable for use in circuits of battery-operated communication handsets where autonomy is a crucial factor.
Acknowledgments The authors wish to thank OMMIC for the fabrication of the circuits, as well as to Mr. Y. Gamberini for his contribution to this project.
V. Marian et al. / Microelectronics Journal 42 (2011) 790–797
References [1] Chin-Leong Lim (Avago Technologies), Design of a PIN diode switch for high – linearity applications, RF Designline, November 2008. [2] D. Gotch, A review of technological advances in solid-state switches, Microwave Journal 50 (11) (2007) 24. [3] C. Straelhi, J.V. Bouvet, D. Goral, PIN and varactor diodes, in: B.L. Smith, M.-H. Carpentier (Eds.), The Microwave Engineering Handbook, vol. 1, Chapman & Hall, London, , 1993. [4] P. Sun, P. Upadhyaya, D. Jeong, D. Heo, G.S.La Rue, A novel SiGe PIN diode SPST switch for broadband TIR module, Microwave Wireless Components Letters 17 (5) (2006) 352–354. [5] C. Hove, J. Lysholm, M. Bohl, S. Lindsfors, 0.35 mm CMOS T/R switch for 2.45 GHz short range wireless applications, Analog Integrated Circuits and Signal Processing 38 (2004) 35–42. [6] P. Crippa, S. Orcioni, F. Ricciardi, C. Turchetti, A DC–5 GHz NMOSFET SPDT T/R switch in 0.25-mm SiGe BiCMOS technology, Applied Surface Science 224 (2004) 434–438. [7] K. Yamamoto, T. Heima, A. Furukawa, M. Ono, Y. Hashizume, H. Komurasaki, S. Maeda, H. Sato, N. Kato, A 2.4 GHz-band 1.8-V operation single-chip SiCMOS T/R-MMIC front-end with a low insertion loss switch, IEEE Journal of Solid-State Circuits 36 (8). [8] C. Tinella, J.M. Fournier, D. Belot, V. Knopik, A 0.7 dB insertion loss CMOS – SOI antenna switch with more than 50 dB isolation over the 2.5 to 5 GHz band, European Solid-State Circuits Conference, 2002. [9] A. Tombak, C. Iversen, J.-B. Pierres, D. Kerr, M. Carroll, P. Mason, E. Spears, T. Gillenwater, Cellular antenna switches for multimode applications based on a silicon-on-insulator technology, in: Proceedings of the 2010 IEEE Radio Frequency Integrated Circuits Symposium. [10] V. Kaper, R. Thomson, T. Prunty, J.R. Shealy, Monolithic AlGaN/GaN HEMT SPDT switch, in: Proceedings of the 12th GAAS Symposium, Amsterdam, 2004.
797
[11] D. Gotch, T. Goh, R. Jackson, State-of-the-Art Low Loss High, Isolation SP6T switch for handset applications, European Conference on Wireless Technology, 2004, Amsterdam. [12] D.P. Chang, Y.S. Noh, I.B. Yom, Design of High Performance HEMT Switch for S-band MSM of Satellite Transponder, IEEE Vehicular Technology Conference, 2008. [13] C. Goldsmith, J. Kleber, B. Pillans, RF MEMS: benefits & challenges of an evolving RF switch technology, IEEE GaAs Digest, 2001. [14] R.E. Mihailovich, M. Kim, J.B. Hacker, E.A. Sovero, J. Studer, J.A. Higgins, J.F. DeNatale, MEM Relay for Reconfigurable RF Circuits, IEEE Microwave and Wireless Components Letters 12 (2) (2001) 53–55. [15] S. Lee, J.-M. Kim, Y.-K. Kim, Y. Kwon, A single-pole nine-throw antenna switch using radio-frequency microelectromechanical systems technology for broadband multi-mode and multi-band front-ends, Journal of Micromechanics and Microengineering 18 (1). [16] ED02AH Design Manual, OMMIC, 24 October 2008. [17] M. Kameche, N.V. Drozdovski, GaAs-, InP- and GaN HEMT-based microwave control devices: what is best and why, Microwave Journal 48 (5) (2005) 164–178. [18] Datasheet of the DCS 1800 MHz STB7002 LNA from ST Microelectronics: /http://www.datasheetcatalog.org/datasheet/stmicroelectronics/7673.pdfS. [19] P. Sun, P. Liu, P. Upadhyaya, D. Jeong, D. Heo, E. Mina, Silicon-based PIN RF switches for improved linearity, Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International. [20] T. Yamashita, K. Fukamachi, S. Kemmochi, Low distortion and compact RF switch circuitry with the combination of PIN-diode and GaAs-FET for GSM quartet-band cellular phone in: Proceedings of the 34th European Microwave Conference, Amsterdam, 2004. [21] J.G. Yang, H. Eom, S. Choi, K. Yang, 2–38 GHz broadband compact InGaAs PIN switches using a 3-D MMIC technology, in: Proceedings of the International Conference on Indium Phosphide and Related Materials, Matsue, Japan, 2007.
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Microelectronics Journal journal homepage: www.elsevier.com/locate/mejo
Design of a wideband multi-standard antenna switch for wireless communication devices Vlad Marian a,n, Jacques Verdier b, Bruno Allard a, Christian Vollaire a a b
Ampe re, UMR CNRS 5005, Universite´ de Lyon, Ecole Centrale de Lyon, 36 Av. Guy de Collongues, F-69134 Ecully, France Institut de Nanotechnologies de Lyon (INL), UMR CNRS 5270, Universite´ de Lyon, INSA Lyon, F-69621 Villeurbanne, France
a r t i c l e i n f o
a b s t r a c t
Article history: Received 18 November 2010 Received in revised form 7 January 2011 Accepted 17 January 2011 Available online 22 February 2011
A wideband Low Power Single Pole 6-Throw (SP6T) antenna switch has been designed for GSM/DCS/ 802.11b mobile standards using a newly improved architecture and fabricated using a pseudomorphic depletion mode 0.18 mm HEMT GaAs process. The switch exhibits less than 1 dB insertion loss and isolation performances from up to 53 dB at 0.8 GHz down to 42 dB at 2.5 GHz. The circuit DC power consumption is less than 500 mW in full power transmission condition and makes it suitable for use in mobile terminals like mobile phones or PDAs. The paper presents simulation results validated by experimental measurements on an IC prototype. & 2011 Elsevier Ltd. All rights reserved.
Keywords: MMIC Antenna switch Wideband Mobile telecommunications pHEMT transistors GaAs
1. Introduction Wireless devices are embedding more and more functions, which renders communication issues increasingly complex. Today mobile phones include many other features like 802.11b and Bluetooth connectivity or even a GPS transceiver. This increases the RF system complexity while in the mean time it is combined with the need for lower fabrication cost and more and more compact devices. This trend pushes for the development of integrated RF front-ends that share the same antenna for transmitting (Tx) or receiving (Rx) signals at different frequencies. The role of an antenna switch is to implement an interface between the antenna and the Tx/Rx ports of the different standards that need to use it. Traditionally PIN diodes have been used to switch signals in mobile communication systems, because they offer a good linearity and high power handling capabilities [1,2], but have the major disadvantage of high DC power consumption. This is mainly due to the fact that in order to obtain a good isolation or a low insertion loss, an important polarization current is required. In the case of a series connected diode, the insertion loss (IL) is given by [3] RS IL ¼ 20log 1 þ 2Z0
n
Corresponding author. Tel.: + 33 472186117; mobile: +33 632782155. E-mail address: [email protected] (V. Marian).
0026-2692/$ - see front matter & 2011 Elsevier Ltd. All rights reserved. doi:10.1016/j.mejo.2011.01.005
ð1Þ
where RS is the series resistance of the PIN diode and Z0 is the system characteristic impedance. The resistance of the intrinsic region, which is an important portion of the forward bias resistance, can be changed from high to low by the application of a forward bias current [4]: RI
L2i 1 P þvperim A 2mIdc tinterface
ð2Þ
where Li is the thickness of the intrinsic region, m is the average electron end hole mobility, Idc is the forward bias current, tinterface is the P+I interface minority carrier lifetime, vperim is the effective hole surface recombination velocity and P/A is the PIN diode periphery-to-area ratio. Thus for a given diode geometry, one has to lower the series resistance by increasing the forward bias current to obtain a low insertion loss. In addition a complex circuitry is needed to ensure the suitable DC polarization of these devices and an external driver is needed in order to control their switching speed. RF CMOS transistors have been introduced as antenna switches [5]. A RF CMOS technology offers the advantage of integration on the same die of the RF front-end standard components like charge pumps or decoders. These components can work using a single positive voltage source (like a battery) and are easily controlled using standard digital signals [6]. The standard bulk CMOS technology seems to be the best candidate for realizing RF transceivers for use in short-range wireless communications with not so strict requirements in noise
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and power, such as Bluetooth and WLANs, at least from the point of view of low-cost and high-level integration with baseband LSIs [7]. The finite resistivity of the silicon substrate generates important loss at high frequency due to degradations in quality factors of on-chip passive elements such as spiral inductors and capacitors. This shortcoming has been overcome using Silicon-on-Insulator (SOI) technology. SOI switches offer satisfying isolation performances (larger than 50 dB) and a good insertion loss of less than 1 dB in the 0.8–2.5 GHz range [8,9]. Unfortunately these switches handle a limited amount of power, around 12 dBm, considerably less than what is currently obtained using HEMT processes. Several demonstrations of antenna switches using HEMT technologies have been presented in literature usually using GaAs, AlGaN/GaN or InP substrates. Low losses at high frequencies provided by the GaAs substrate have made it possible to obtain around 1 dB of insertion loss and isolation performances between 30 and 40 dB in a SP2T switch [10] and in a SP6T switch [11], respectively. It has also been shown [12] that the combination of series-shunt mounted HEMT transistors and resonant circuits could result in an improved isolation in the frequency range related to the resonant circuit. MEMS have also been considered as a possible solution for high performances and low-cost RF switches. These devices are operated by electrostatic forces: they therefore draw no quiescent current other than a very small leakage current [13]. Low loss dielectrics and high conductivity metals used for the fabrication of these devices give them a very low loss. MEMS-based RF switches suffer from limited lifetime (in the order of 1–100 million cycles) and high operating voltage requirements (in the range of 30–50 V) [14]. These devices remain inferior to their semiconductor competitors in terms of switching speed, making them unsuitable for switching GSM signals [15]. The paper presents a new SP6T structure demonstration capable of improved isolation performances between 42 and 53 dB in the 0.8–2.5 GHz frequency range and an insertion loss kept less than 1 dB. These state-of-the-art figures represent a good trade-off between isolation and insertion loss covering the entire frequency range used in mobile communication devices. It is a first work to our knowledge that presents a full multistandard switch, including both a 2.45 GHz branch together with GSM and DCS branches traditionally embedded. In the first section, the paper summarizes the main characteristics of the GaAs technology used for the fabrication of the prototype integrated circuit. The second section presents the general structure of the circuit and the awaited improvements with respect to series-shunt structures. The last section
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describes the prototype integrated circuit and compares measurements with simulation results. A good agreement is obtained.
2. Technology overview A prototype SP6T circuit was fabricated using the ED02AH process provided by OMMIC, a supplier of epitaxy, foundry services and MMICs based on advanced III–V processes. ED02AH is a depletion/accumulation pseudomorphic HEMT process with 0.18 mm gate length [16]. The transistors have a transition frequency fT of 60 GHz. This process was developed for both digital and analog applications in the millimeter wave and microwave range. The ED02AH process is also adapted for highspeed digital circuits for optical connections. The transistors generally exhibit 2, 4 or 6 gate fingers and each gate finger can be of 15–100 mm long. Total transistor gate lengths range between 30 and 600 mm. The equivalent circuit of a transistor for small signal simulation is presented in Fig. 1. In this equivalent circuit model, Cg, Cd, Cs, Lg, Ld and Ls are the external parasitic devices to the P-HEMT, Rg, Rs and Rd are the P-HEMT access resistances, Cgs, Cgd, Cds, Rds, Rgs, gm and td are the classical GaAs P-HEMT equivalent circuit elements while gate-drain conductance (Ggd), gate-source conductance (Ggs) and gate-drain series resistance (Rgd) are additional elements useful for a better accuracy in some particular operating conditions. For most applications, the on-state impedance is primarily resistive while the off-state impedance is mainly capacitive [17]. Only ‘‘normally off’’ transistors are used in this design. A ‘‘normally off’’ transistor is characterized by a threshold voltage of Vt ¼ + 0.225 V. The typical value of the supply voltage is + 3.3 V. A decision was made to use standard CMOS logic signals to control the state of the switch: low logic level under 0.1 V (and less than 10 mA leakage current) and high logic level above 2.5 V (and less than 10 mA leakage current). Transistor models have been verified and used for simulation-based design of the SP6T circuit.
3. Circuit design and optimization Most of the transistor-based antenna switches are built using a classic series-shunt topology, as shown in Fig. 2. They consist of main switches (T1 and T2) in series with the signal path. They block the signal when in off-state. The incoming signal then leaks
Fig. 1. Small signal equivalent circuit model of a ED02AH GaAs P-HEMT [6].
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Fig. 2. Circuit schematic of a SPDT Tx/Rx switch based on the series-shunt topology.
through a derivation transistor to the ground using secondary transistors (T3 and T4) in on-state. Transistors operate by pairs in an exclusive manner except if the antenna must be isolated. As shown in Fig. 2, it is possible to connect 2 branches using the same topology to the same antenna to realize the transmission and reception paths. The two control voltages V1 and V2 are used to control both the series transistor of one branch as well as the shunt transistor of the other branch. Gate resistances (R1–R4) are used to control the transistor gate current transients. The gate voltages’ swings remain low when a high RF power signal is transmitted. Capacitors C1 and C2 serve as DC isolation devices to ground.
Fig. 3. Influence of series transistor gate width on insertion loss for frequencies from 0.8 to 2.5 GHz.
3.1. Classical structure performances Simulations have been performed using Advanced Design System (ADS) 2008 by Agilent Technologies, in order to evaluate the performances of a switch based on the series-shunt standard topology using OMMIC GaAs process. The influence of the gate width of each of the series and shunt transistors on insertion loss and isolation has been evaluated in order to settle a trade-off. Fig. 3 shows the influence of the gate width of a 6-gate-finger series transistor on its insertion loss. The smaller the gate width, the larger the insertion loss and the lower the transconductance. There is then a trade-off to be settled between isolation, the insertion loss and the maximum operating power. A 100 mm gate width per gate finger has been chosen to respect power capabilities. This is true for the entire frequency range from 800 MHz to 2.5 GHz, because frequency has practically no influence on the insertion loss when the series transistor is in on-state and the gate-voltage is steady. This is mainly due to the fact that the HEMT-transistor channel behaves much as a simple resistor (Rds) of small value (around 4 O) with negligible capacitive parasitic elements. The insertion loss in the series transistor can thus be written as R ILseries ¼ 20log 1 þ ds ð3Þ 2Z0
Fig. 4. Influence of series transistor gate width on isolation in 0.8–2.5 GHz range.
during its off-state. The transistor mainly behaves as a capacitor (Cds) whose value is Wgate dependent: Cds ¼ Cds0 Wgate þ Cdse Nf
where Nf is the number of gate fingers, Cds0 is a technologyspecific capacitance (in F/mm) and Cdse is the supplementary parasitic capacitance introduced by connection paths between the gate fingers with respect to the first-level metal. The isolation of the series transistor can be expressed as
At the same time Rds ¼ Rds0 =Wgate
ð4Þ
where Wgate is the gate width of the transistor and Rds0 is the technology-specific resistance (measured in O mm). A large gate width allows to minimize the insertion loss. The maximum gate width per gate finger allowed by the ED02AH process is 100 mm. The isolation level drops as the gate width increases, as shown in Fig. 4. In addition frequency has an important influence on isolation. This can be easily explained when analyzing the expression for the isolation provided by the series transistor
ð5Þ
ISseries ¼ 10log 1 þ
1 2oCds Z0
2 ! ð6Þ
In this case the isolation is the best for low values of the gate width. The choice was made to prioritize the handling power and the low insertion loss over a high isolation, because isolation can be improved through the use of the shunt transistor and the insertion loss has the tendency to become more important as the number of branches connected to the same antenna increases.
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The total gate width of the series transistor is then Wtotal ¼ Nf Windividual gate
ð7Þ
This amounts to a total equivalent gate length of 600 mm for each series transistor, the maximum allowed by this process. Simulation has shown that the presence of a shunt transistor does not significantly deteriorate the insertion loss of the switch (Fig. 5). The insertion loss due to the shunt transistor off-state is given by (8). In this mode, the shunt transistor behaves like a very small capacitor; hence it slightly deteriorates the adaptation: 2 ! 1 ILshunt ¼ 10log 1 þ ð8Þ oCds Z0 2 The generated additional loss is less than 0.025 dB in full frequency range and disregard of the gate width. The isolation is however strongly dependent on the shunt transistor gate width: Z0 ISshunt ¼ 20log 1 þ ð9Þ 2Rds
Fig. 5. Influence of shunt transistor gate width on insertion loss in 0.8–2.5 GHz range.
Fig. 6. Influence of shunt transistor gate width on isolation in 0.8–2.5 GHz range.
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A higher isolation is obtained for larger gate width per finger (Fig. 6). This is technology-limited to 100 mm. The presence of a shunt transistor would improve isolation by as much as 16 dB with hardly any influence on the insertion loss. The overall SPST structure is thus characterized by a total insertion loss of 0.48 dB and an isolation between 28 and 38 dB in the desired frequency domain. This is one branch of the multistandard switch.
3.2. Improved SP6T switch structure One possible solution when using this single branch in order to build a six-branch switch would be to connect six identical branches to the common antenna. Table 1 presents the evolution of switch parameters at 2 GHz as a function of the number of switch branches connected to the antenna. The number of branches connected to the antenna increases the insertion loss while the isolation remains fairly constant. Once 6-series-shunt structures are connected to the antenna as in Fig. 1, 1.1 dB insertion loss and 36 dB isolation are simulated at a frequency of 2 GHz. The isolation was considered to be unsatisfactory compared to previous designs. The structure is therefore modified in order to improve the isolation according to Fig. 7a and b, containing a partial transistor-level representation on circuit layout. Compared to the classical approach that would connect all the six branches directly to the antenna, the proposed switch topology adds two extra switches (K1 and K2) between the antenna and the Rx and Tx branches, respectively. Transistors K1 and K2 have 600 mm gate length to preserve power handling capabilities. This topology is equivalent to a two-branch structure, because only two branches are directly connected to the antenna at the same time. This results in an increase of 13 dB in isolation that now reaches 49 dB at 2 GHz. This is to our knowledge the highest isolation value obtained for a SP6T transistor-based switch in the 0.8–2.5 GHz frequency range. The presence of an additional transistor channel on the signal path would have a tendency to increase the insertion loss, but the insertion loss remains around 1.1 dB because only two branches are now directly connected to the antenna as in the case with the classical structure. It was also considered important to evaluate the influence of these additional switches (K1 and K2) on power handling capabilities and the distortion. The simulated 1 dB compression point of the classical switch structure has been evaluated to be 23 dBm. The presence of switches K1 and K2 in the modified structure lowers the 1 dB compression point to around 22 dBm. Their influence is negligible due to their large gate width. The influence of these switches on harmonics is shown in Fig. 8. An input signal of 10 dBm at 2 GHz is injected into a transmission branch of the switch. The spectrum presented is at the antenna level. The presence of the additional switches K1 and K2 has very little influence on the fundamental signal. However most of the harmonics are attenuated, sometimes by as much as 10 dB like in the case of the second harmonics. Only 7th and 8th harmonics are slightly increased, but their value is very low (less than 60 dBm). Simulated data shows that it is possible to lower the insertion loss value by inserting small series inductors at each extremity of the switch ports in order to improve the 50 O adaptation of the signal paths. The needed inductors range from 1 nH to 2 nH and their presence lowers the insertion loss to around 0.9 dB throughout the 0.8–2.5 GHz frequency range. Simulations have also predicted switching times as low as 10 ns. This is excellent compared to other demonstrations especially those using a CMOS process like in [5], where the switching
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Table 1 Performance comparison at 2 GHz between a classic SP6T switch structure and the proposed architecture. Classical approach
Improved structure
Number of branches
Insertion loss (dB)
Isolation (dB)
Insertion loss (dB)
Isolation (dB)
1 2 3 4 5 6
0.48 0.57 0.65 0.8 0.9 1.1
30 36 36 36 36 36
0.9 0.94 0.95 1 1.15 1.15
38 43 46 46 49 49
Fig. 8. Comparison of harmonic behavior between new and classical structures.
The transistor gates are controlled using CMOS-standard logic levels. High value resistors are used to control the transistor gate leakage current. The overall power consumption of the circuit is evaluated to be less than 500 mW.
4. Experimental results and discussion 4.1. Circuit layout and fabrication
Fig. 7. Modified SP6T switch topology (a); partial representation of circuit layout (b).
time is around 300 ns and is comparable with other GaAs prototypes. 3.3. Limiting the DC power consumption In order to limit the DC power consumption of the circuit, all transistors have been polarized in the triode region with VDS values close to zero. The DC polarization voltages of the transistor drain and source were chosen with the purpose of maximizing the RF voltage swing without accidentally changing the state of a transistor. A DC offset of 1.65 V was selected and applied through 10 kO on-chip resistors connected to the RF signal path.
The circuit layout was realized on a 100 mm GaAs substrate, which is characterized by a resistivity exceeding 107 O cm. The total die area is approximately 1.5 2 mm2. As seen in Section 3, DC capacitors are needed to connect the shunt transistors to the ground. The OMMIC technology offers two types of on-chip capacitors. The first type consists of a layer of 850 nm of SiO2 between two metal layers and it features a typical capacity of 49 pF/mm2. The second type consists of a 150 nm layer of SiN between two metal layers. It features a capacity of 400 pF/mm2. Simulations have shown that in order to limit the influence of the DC capacitors on circuit performances, their values should be in excess of 50 pF. Such a capacitor would occupy a semiconductor area of 350 350 mm2, resulting in an important increase in the circuit size. It was therefore decided to report the DC capacitors on the IC test board. Simulations have also shown that the presence of serial inductors at the RF input and output ports allows an improvement of the insertion loss by as much as 0.2 dB. As bonding wires are characterized by a typical inductance of roughly 1 nH/mm for a 25 mm diameter gold wire, the choice was made to use appropriate lengths of bonding wire to add the necessary inductance values. The lengths
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Fig. 10. Simulated and measured insertion losses of the fabricated GaAs antenna switch at full RF power.
Fig. 9. Photograph of the fabricated GaAs integrated circuit (top). Die is 3 mm 2 mm (switches are located on the left half of the IC). Test board (bottom) carries the external passive components.
of the bonding wires connected to the RF ports are between 1 and 2 mm. They have been optimized after primary measurements of the adaptation quality. Fig. 9 shows a photograph of the fabricated integrated circuit and the test board. The test board is fabricated on a standard 1.6 mm FR-4 substrate. It includes the surface-mounted DC capacitors and gate resistors that would have otherwise cost a large die area penalty.
4.2. Test results Measurements are performed with input signals from a radio frequency signal generator, thus allowing to control the injected power. The logic signals came from a set of batteries in order to limit insertion noise. The signal coming out of the switch is observed using a spectrum analyzer. All external cables, connectors as well as the printed circuit board metal interconnections have been previously characterized and the following measurement results take into account all the losses that these elements generate. Fig. 10 represents the evolution of the insertion loss value compared to the values predicted by simulation for frequencies ranging from 800 MHz to 2.5 GHz. The input signal is inserted into a transmission port and measured on the antenna port, while the reception part of the switch as well as the other transmission ports are configured in off-state. The same analysis is repeated by applying a signal into the antenna port and directing it towards a reception port, while all the other branches are in their off-state. The results are in very good agreement, confirming the process low variability or the negligible effect of the process variability on insertion loss and isolation. The measured values of the insertion loss are very close to the results obtained during simulation with less than 0.1 dB
Fig. 11. Simulated and measured isolation of the fabricated circuit.
difference. Any of the fabricated switch exhibits alone an insertion loss value between 1 and 1.1 dB throughout the frequency range. This confirms the fact that carefully dimensioned bonding wires allow to improve the 50 O adaptation of the switch ports and to decrease the overall insertion loss. The isolation is measured with the reception port in off-state while a signal is inserted in the transmission port in on-state towards the antenna. The experimental and simulation results are presented in Fig. 11. Again a good agreement is observed between simulation and measurement results. The difference between the two is less than 1.5 dB at most. The measured isolation ranges from up to 53 dB at 800 MHz down to 42 dB at 2.5 GHz. The total DC power consumption amounts to 480 mW, which can be considered as a low value when compared to the several mW or even several tens of mW consumed by a standard LNA designed to work in this frequency range [18]. Measurements have been performed in order to evaluate the power handling capabilities of the newly designed antenna switch (Fig. 12). The 1 dB compression point (P1 dB) of the circuit is over
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Table 3 Comparison of performances of this work with previous demonstrations.
Fig. 12. Measured P1 dB of the SP6T antenna switch at 2.45 GHz.
Fig. 13. Measured IP3 of the SP6T antenna switch at 2.45 GHz.
Table 2 Summary of fabricated GaAs switch performances. Symbol Parameter
Min.
Vcc Vlow Vhigh Pdc f IL IS P1 dB IP3 Ts
3.0
Supply voltage (V) Low level gate control voltage (V) High level gate control voltage (V) DC power consumption (mW) Frequency range (MHz) Insertion loss (dB) Isolation (dB) 1 dB compression point (dBm) 3rd order harmonics (dBm) interception point Switching time (ns)
Typ. Max.
3.8 4.0 0.0 3.3 0.48 800.0 2500.0 1.0 1.1 42.0 53.0 21.0 47.0 10.0
21 dBm of input power and the simulation was predicting 22 dBm. The 3rd order harmonics interception point (IP3) is estimated to be around 47 dBm, as shown in Fig. 13. These power handling figures make the circuit suitable for most of the communication standards used by mobile handsets.
Reference
Technology
Type
Band (GHz)
IL (dB)
Isolation (dB)
P1 dB (dBm)
[5] [6] [7] [8] [9] [10] [11] [12] [15] [19] [20] [21] [4] This work
CMOS CMOS CMOS CMOS-SOI CMOS-SOI HEMT GaN HEMT GaAs HEMT GaAs MEMS PIN Diode PIN Diode PIN Diode PIN Diode HEMT GaAs
SPDT SPDT SPDT SPDT SP9T SPDT SP6T SPST SP9T SPST SP6T SPST SPST SP6T
2.4 0–5 2.4 2.5–5 0.9–2.1 0.9–2.1 0.9–1.9 3–4 0–2.1 2–18 0.9–2.1 2–38 2–16 0.8–2.5
0.8 1.4 1.5 0.7 1 1 1 2 0.5 0.69 1.2 1.4 1 1
42 30 24 50 29–45 41–46 40 63 49–67 28 30–36 30 19–42 42–53
16 12 11 12 – 30 35 32 33 16 32 – – 21
Due to the lack of necessary equipment, it is not possible to measure the switching time of the designed switches. However it seems reasonable to think that the experimental switching time is roughly around 10 ns as predicted by simulation. This would be coherent with other GaAs switch demonstration for high-speed logic applications using the same technology (Table 2). Table 3 compares the performances of proposed switch with other previous designs. The proposed circuit introduces a novel SP6T topology that allows excellent isolation while maintaining a low insertion loss. Compared to the circuit in [11], the proposed switch has about the same amount of insertion loss, but a better isolation over a wider bandwidth. The power handling capability is lower but limited by the process. It is so far sufficient for mobile communication standards used by modern handsets. This work is to our knowledge the only realization to include an 802.11b branch together with the usual GSM/DCS branches in a SP6T topology. Moreover this device consumes very low DC power, but we were unable to make a full comparison of this parameter with other realizations because this parameter is seldom mentioned in publications.
5. Conclusion The design and optimization of an integrated SP6T antenna switch have been presented in a pseudomorphic depletion mode 0.18 mm HEMT GaAs commercial process. The classical series-shunt configuration is modified into an original structure in order to improve the isolation while preserving the insertion loss at full RF power. A multi-standard and wideband switch is obtained. The experiments on a fabricated integrated circuit confirm the simulation results. The proposed switch features excellent performances for a 6-branch structure in terms of insertion loss, isolation, power handling capability and switching time. The DC power consumption is small and the circuit is easily controlled by the standard CMOS logic signals. These characteristics make it suitable for use in circuits of battery-operated communication handsets where autonomy is a crucial factor.
Acknowledgments The authors wish to thank OMMIC for the fabrication of the circuits, as well as to Mr. Y. Gamberini for his contribution to this project.
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References [1] Chin-Leong Lim (Avago Technologies), Design of a PIN diode switch for high – linearity applications, RF Designline, November 2008. [2] D. Gotch, A review of technological advances in solid-state switches, Microwave Journal 50 (11) (2007) 24. [3] C. Straelhi, J.V. Bouvet, D. Goral, PIN and varactor diodes, in: B.L. Smith, M.-H. Carpentier (Eds.), The Microwave Engineering Handbook, vol. 1, Chapman & Hall, London, , 1993. [4] P. Sun, P. Upadhyaya, D. Jeong, D. Heo, G.S.La Rue, A novel SiGe PIN diode SPST switch for broadband TIR module, Microwave Wireless Components Letters 17 (5) (2006) 352–354. [5] C. Hove, J. Lysholm, M. Bohl, S. Lindsfors, 0.35 mm CMOS T/R switch for 2.45 GHz short range wireless applications, Analog Integrated Circuits and Signal Processing 38 (2004) 35–42. [6] P. Crippa, S. Orcioni, F. Ricciardi, C. Turchetti, A DC–5 GHz NMOSFET SPDT T/R switch in 0.25-mm SiGe BiCMOS technology, Applied Surface Science 224 (2004) 434–438. [7] K. Yamamoto, T. Heima, A. Furukawa, M. Ono, Y. Hashizume, H. Komurasaki, S. Maeda, H. Sato, N. Kato, A 2.4 GHz-band 1.8-V operation single-chip SiCMOS T/R-MMIC front-end with a low insertion loss switch, IEEE Journal of Solid-State Circuits 36 (8). [8] C. Tinella, J.M. Fournier, D. Belot, V. Knopik, A 0.7 dB insertion loss CMOS – SOI antenna switch with more than 50 dB isolation over the 2.5 to 5 GHz band, European Solid-State Circuits Conference, 2002. [9] A. Tombak, C. Iversen, J.-B. Pierres, D. Kerr, M. Carroll, P. Mason, E. Spears, T. Gillenwater, Cellular antenna switches for multimode applications based on a silicon-on-insulator technology, in: Proceedings of the 2010 IEEE Radio Frequency Integrated Circuits Symposium. [10] V. Kaper, R. Thomson, T. Prunty, J.R. Shealy, Monolithic AlGaN/GaN HEMT SPDT switch, in: Proceedings of the 12th GAAS Symposium, Amsterdam, 2004.
797
[11] D. Gotch, T. Goh, R. Jackson, State-of-the-Art Low Loss High, Isolation SP6T switch for handset applications, European Conference on Wireless Technology, 2004, Amsterdam. [12] D.P. Chang, Y.S. Noh, I.B. Yom, Design of High Performance HEMT Switch for S-band MSM of Satellite Transponder, IEEE Vehicular Technology Conference, 2008. [13] C. Goldsmith, J. Kleber, B. Pillans, RF MEMS: benefits & challenges of an evolving RF switch technology, IEEE GaAs Digest, 2001. [14] R.E. Mihailovich, M. Kim, J.B. Hacker, E.A. Sovero, J. Studer, J.A. Higgins, J.F. DeNatale, MEM Relay for Reconfigurable RF Circuits, IEEE Microwave and Wireless Components Letters 12 (2) (2001) 53–55. [15] S. Lee, J.-M. Kim, Y.-K. Kim, Y. Kwon, A single-pole nine-throw antenna switch using radio-frequency microelectromechanical systems technology for broadband multi-mode and multi-band front-ends, Journal of Micromechanics and Microengineering 18 (1). [16] ED02AH Design Manual, OMMIC, 24 October 2008. [17] M. Kameche, N.V. Drozdovski, GaAs-, InP- and GaN HEMT-based microwave control devices: what is best and why, Microwave Journal 48 (5) (2005) 164–178. [18] Datasheet of the DCS 1800 MHz STB7002 LNA from ST Microelectronics: /http://www.datasheetcatalog.org/datasheet/stmicroelectronics/7673.pdfS. [19] P. Sun, P. Liu, P. Upadhyaya, D. Jeong, D. Heo, E. Mina, Silicon-based PIN RF switches for improved linearity, Microwave Symposium Digest (MTT), 2010 IEEE MTT-S International. [20] T. Yamashita, K. Fukamachi, S. Kemmochi, Low distortion and compact RF switch circuitry with the combination of PIN-diode and GaAs-FET for GSM quartet-band cellular phone in: Proceedings of the 34th European Microwave Conference, Amsterdam, 2004. [21] J.G. Yang, H. Eom, S. Choi, K. Yang, 2–38 GHz broadband compact InGaAs PIN switches using a 3-D MMIC technology, in: Proceedings of the International Conference on Indium Phosphide and Related Materials, Matsue, Japan, 2007.