;LEC'I'RoNIC
R. W . B r o w n
Device models for circuit analysis programs Device models are electrical equivalents or mathematical relationships which describe physical devices. A computer-aided circuit design or analysis can only operate with models, but the actual circuit is built with real devices• One of the major problems confronting the analysis program user is the choice of suitable device models. The preparation of data for any such program is, in fact, an exercise in device model selection. In this article we examine some models and modelling techniques which have proved useful, and indicate some methods of acquiring the necessary model data.
Choice of Model Several factors will influence the choice of model for a given application. Firstly, the model descriptors must be contained in the analysis program vocabulary. This means that when considering device models without reference to any specific program, such as in this paper, it is necessary to restrict linear models to the use of standard circuit elements and non-linear models to parameters which are functions of only single variables. Secondly the specific application will itself influence the choice of model. The effect of the model on the accuracy of the computed results will depend very largely on the extent to which tl~e circuit performance depends on that device.
.12V 'lOk
~lOk 33k lk
TR1
TR2i ~ I K
0
OV 12k
O.lpF
1Ok Fig. 1. Feedback amplifier. WINTER 1969
2K
-12V
Thirdly, the choice of model will be restricted to what is currently available and until recently this has meant the model that the user has generated himself. Work on device modelling at Racal has concentrated on general purpose models which can be used for the widest range of applications, but which are capable of simplifications in a controlled manner to save computing time in applications where the greatest degree of accuracy is not required. The models are in the form of equivalent circuits rather than tabulated parameters versus frequency. The equivalent circuit provides two advantages over n-port parameters, namely built-in frequency interpolation and a simple framework on which to hang statistical data such as parameter spreads. Compatibility with program vocabularies is ensured by the restriction to standard circuit elements and single variable functions. The second of the above factors, namely the effect of the application on the choice of model, merits further consideration. To illustrate this point, consider the d.c. amplifier with feedback, shown in Fig. 1.(1) Below about 10 MHz the circuit response is determined almost entirely by the feedback network and is, therefore, minimally device dependent, while above the break frequency of 20 MHz the response is almost wholly device dependent. This circuit was analysed twice using the General Circuit Analysis Program (REDAP IA).(2) In the first case, complete hybrid pi models were used for each of the three transistors resulting in a network containing 29 branches. In the second case, the d.c. amplifier was modelled empirically as an input impedance, a transfer function (2-pole) and an output impedance (a total of 11 components) 33
resulting in the complete network of 15 branches shown in Fig. 2. The computed low frequency~nd high frequency responses are shown in Figs. 3(a)and 3(b). It is not possible to separate either the modulus or phase of the low frequency responses in Fig. 3(a). in fact, the agreement is within 0.01 dB. In Fig. 3(b), however, it can be seen that above about 10 MHz a discrepancy does arise which becomes appreciable above 50 MHz. There is thus an equivalence between the degree of device dependence of a circuit and the degree of model dependence of the corresponding analysis.
Linear T r a n s i s t o r M o d e l s The general modelling problem consists of two parts. The first is the selection of the equivalent circuit topology
and the second is the generation of parameter values for the elements in the equivalent circuit, in the case of transistors, a great deal of work was done in the early days of these devices and some extremely useful equivalent circuits were developed. In this section we shall consider two of these, namely the hybrid pi and modified hybrid pi models. Hybrid Pi. Perhaps the most popular, and certainly o n e of the most useful transistor models, is the hybrid pi equivalent circuit shown in Fig. 4. It contains few components and yet can be derived from a consideration of the device physics. The component values can be fairly easily determined from measurements and it accurately models the real transistor at frequencies up to a few megahertz. It is, therefore, well suited to small signal analysis in the lower frequency range.
10k rb'c
Fig. 4. Hybrid pi transistor model.
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Frequency (Hz)
Fig. 5(b), COMPUTER AIDED DESIGN
Non-Linear Transistor Models
Hybrid pi data on a range of transistor types is currently being prepared. Two techniques have been used. The first, based on the measurement of selected Y parameters is detailed in REDAP 5.("-)A second technique is now being implemented which has the advantage of improved accuracy and also provides much of the parameter data for the modified hybrid pi considered later. The parameter measurements are detailed in Appendix I. It is intended that from February 1969 hybrid pi data on any specific transistor be provided with a 24-hour turnaround. Fig. 5 shows an example of the use of hybrid pi models in a circuit application. It can be seen that very close agreement was obtained between measured and computed results, the ldB offset being due entirely to a I0~o difference between the quiescent currents in the two cases. Modified Hybrid Pi. As the frequency increases, the agreement between the hybrid pi model and real transistors deteriorates. This is primarily due to the distributed nature of the transistor and the lumped representation of the model. Improvements are generally achieved by including sections in the model to simulate this distributed nature. Brayden(~) describes a modified hybrid pi model in which three steps are taken to improve the accuracy. First, the collector-base depletion capacitance is split, taking part of it to b instead of b'. Secondly, while the current gain, /3, has a slope of 6dB/octave above fl, its phase shift increases beyond the 90 ° specified by a single pole representation. This excess phase shift is accounted for by the inclusion of a phase shift term in the mutual conductance, i.e. g,, = g,,,e-J~ where ¢ = KoJ. At higher frequencies rb'c and rce are swamped by the capacitance around them and can be eliminated from the model. These modifications, together with the addition of the case capacitances, lead to the modified hybrid pi model of Fig. 6. This model has the additional advantage that most of its parameters can be found from measurements requiring little more than standard equipment. It should prove accurate up to 300 MHz but will probably provide quite satisfactory results up to twice this frequency if some emitter lead inductance is included. Some analysis programs are unable to handle complex g,,, although a version of REDAP 1, for example, can do so. If the program in use cannot handle this parameter, the same effect can be achieved with a length of lossless transmission l i n e terminated in its characteristic impedance. It is hoped to provide modified hybrid pi data on a range of transistors in the Data Bank in the near future. The hybrid pi model can, as we have seen, give accurate results up to 100 MHz or so in circuits which are minimally device dependent. Where higher frequency performance is required, or where the transistors are being pushed to their limits, the modified hybrid pi should give improved results. Cbc gLJ
rbb'
l-mvl.&
:',,,Tr"'t To,,.. T.
Cbe e
rn'e
/
.Pl
Cb'e ~
gm =gine'j~
e 0
Fig. 6. Modified Hybrid pi m o d e l
WINTER 1969
t"
Non-linear models are required for large signal and switching applications where the variation in parameter values with the signal become significant, and in order to determine intermodulation and harmonic distortion. Three popular models are the Ebers-Moll(4), the Beaufoy-Sparkes( 5J and the Linvill lumped modelte). All three models are similar in their overall degree of approximation and give similar results for transient problems.(7) The difference between them lies in the actual approximations made, and hence the final form of the model. In each case, however, the model parameters can be determined from a set of four independent measurements. The Ebers-Moll model is an engineering model in the sense that it assumes single pole functions for the forward and inverse current gain and describes the transistor in terms of a network which will reproduce these functions. The Linvil model, on the other hand, sticks closely to the physics of the device but, in so doing, introduces the new network parameters of storance, diffusance and combinance. The Beaufoy-Sparkes model lies somewhere between these two extremes, and forms the basis of this section. The strange circuit elements are the storance S, and the charge controlled current generators. This model is shown in Fig. 7. In order to provide a model which both follows the device physics and contains only standard circuit elements which can be handled by any non-linear analysis program, we modify the Beaufoy-Sparkes model as shown in Fig. 8. The storance of Fig. 7 is an element which stores all the charge flowing into it without any voltage being built up across it, i.e. an infinite capacitor. The charge controlled current generators q/TB and q/Tc are controlled by this total charge. In Fig. 8 we have replaced S and q/TB by an RC combination. The current flowing in the resistor is equal to q/TB provided RC = TB and R--> 0. For R sufficiently small that negligible voltage appears across it (say 1f~) the two networks of Figs. 7 and 8 are equivalent. The second current generator is now/9.1b, where Ib is the current in R and/9 = Ta/Tc. One of the great disadvantages inherent in present nonlinear transient analysis programs is the necessity of using time increments which are small compared to the smallest time constant in the network. In order to eliminate this effect, some work has been done at frequencies sufficiently low that all the capacitance in the model can be neglected. Theoretical Solution for Zero Source Resistance. In the forward active region at low frequencies, the transistor can be represented by the low frequency T of Fig. 9. It is possible to make a comparison of theoretical, measured and computed performance of this model. For Rs + rbb' = O, the component harmonic currents in the collector are given by:
Ic,,,
t, =Io(e'lv-,)
,i,
~t
Fig. 7. Beaufoy-Sparkes model
0
C
0
Fig. 8. Modified Beaufoy-Sparkes model,
Fig. 9. Low frequency non-linear T-equivalent. 35
In = l o J n ( j K, Vpk) where
1o =
q u i e s c e n t d.c. collector current /n = nth harmonic collector current
Jn(Z) = Bessel function of first kind, order n
d.c.current Jo(jK1Vpk)
t
Fundamental
Jl(j KiVvk)
mo
current
", f
0,,1~ . / - 0
1
3
2
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Fig. 10. 0
1( 2c
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o
harmonic
5C 0-1
1
10
KIVp~ •
Fig. 11.
*5'1V lk
22ki 50 125~F y
Fig. 12. Circuit used for distortion measurement.
o
Ilf~ 22 18k ~1125/JF
and argument z K~ is the constant in the diode equation 1= Is(e K,V - i)and Vpk is the peak value of Vb'e. The zero'th and first order currents, i.e. the d.c. and fundamental collector currents are plotted in Fig. 10 as functions of K~ Vpk. Fig. 11 shows the 2nd, 3rd and 4th harmonic currents in dB below the fundamental. Having these theoretical results available, it was possible to assess the accuracy of the computed results for the same circuit. In order to achieve agreement in the distortion levels to better than - 5 0 dB in the 4th harmonic, it was found necessary to compute at least 200 points per cycle. The theoretical results were compared with the measured distortion of the circuit of Fig. 12 using a Dymar Wave Analyser and the computed distortion using REDAP 16. Table I shows the results of this comparison. Agreement is surprisingly close, with the exception of two points, being better than i dB. Finite Source Resistance. The assumption of zero source resistance (or infinite beta) makes possible the theoretical solution given above. In practice, however, the source resistance (which includes rbb') must be finite and the beta cannot be infinite. The distortion was computed for a variety of combinations of Rs + Rbh', beta and emitter current from which it was possible to conclude the following. For constant beta, the harmonic currents are uniquely determined by two factors, n a m e l y Kt Vpk (considered above) and K2 = Kt L,(Rs + rbb')/fl. The distortion levels for various values of K2 are shown in Fig. 13. Large Source Resistance and Variable Beta. For this case, we can assume that the voltage Vb'e is constant and the signal is derived from a constant current source. The collector current and base (signal) current are then s i m p l y related as /,. = fllb. Since the beta is not constant for significant excursions of base current, some distortion is introduced which can be computed using REDAP 16 or any other convenient program, together with a harmonic analysis of the output waveform. All that is required is a valid relationship (e.g. polynomial) between the d.c. base and collector currents, which can be easily measured. Table I Harmonic Distortion for the circuit of Fig. KI =
8
t E
~0.1005 2ridharmon'I,:
~
24 KZ=0.~/
3 ~ 32
005~
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3rd
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/
1.0
2.0
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Fig. 13. Computed distortion levels of IJ. T-equiva-
lent for various values of K... 36
K I 1/ - 0"267
4th
23"6 50"8 >60
23.6 51.5 59.5
24" I 51.6 58"8
Vpk -- 14"6 mV
2nd 3rd
18.0 39-5 ~ 60
17.5 38.8 59.2
17.7 39.2 56"3
2nd 3rd
11-9 27.2 44.8
11.9 25-5 45.0
12.1 27.8 45.6
2nd 3rd
8.8 20.7 34.9
8'5 20.5 36.0
9"1 21-5 36.6
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~=0
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37.8
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Measured Computed
General Linear Modelling EQUIVA. We shall now leave transistors and consider general linear devices. The equivalent circuit is only one type of model. It has been found, however, that it enables COMPUTER AIDED DESIGN
Cbc
II
Cb'c
Y Y Y Y Y Y Y Y Y Y
l
0
T
o
,.?T c-
e
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Fig. 14. Linear Beaufoy-Sparkes model. interpolation and extrapolation between measured data points to be made on a rational basis and reduces the amount of measurements required without substantially reducing the accuracy. One p r o o f of the validity of an equivalent circuit, however, is in how accurately the model reproduces the measured n-port parameters at any frequency, and selection of an equivalent circuit could be made on this basis. The program E Q U I V A ( R E D A P 4) uses a minimisation procedure to minimise the least squares error between the measured Y parameters of a two-port device and those computed for the equivalent circuit, the circuit parameter values being adjusted between specified limits until the minimum is reached. It is hence possible to determine parameter values without the necessity of solving the network equations. Some general points about the use of this program are worth noting. It will fit any number of measurements to an equivalent circuit, i.e. m equations in n unknowns. With large numbers of measurements, statistical averaging takes place, thereby reducing the mean error. Unfortunately the program can become unstable and fail to reach a m i n i m u m if the specified limits are too wide. It also requires more computing time than would a method based on the solution of the network equations. As an example in the use of this program, a comparison was made between the linear Beaufoy and Sparkes model of Fig. 14, and a hybrid pi type of model, using the same measured data. Below are the input data and print out for the linear Beaufoy and Sparkes model; the data for the other model is given as an example in R E D A P 4. Table II compares the errozs for the two models, term by term. INPUT EQUIVA DATA ' M O D I F I E D LBS M O D E L O F H.F. T R A N S I S T O R '
510 -4 10 1 l0 RI R2 R3 R4 Cl C2 C3 C4 C5 SB1
2 1 2 I 2 l 1 1 2 2
1 1 2 1 2 2 1 1 l 1
0 0 0 1 l l 0 1 0 1
51o4 51o4 51o6 51o6 51o6 1:o6 11o8 11o8 11o8 11o8
32.31o - 3 11o-3 3.39:o - 6 0.38310- 3 69.121o - 6 -8.1681o41o-3 6.41o- 3 23.410 - 3 -17to - 3
OUTPUT M O D I F I E D LBS M O D E L O F H.F. T R A N S I S T O R M I N E R R O R 6.1474210 - 03 RI 6.314581o + 01 R2 5.41941 lo - 01 R3 2.7653510 + 01 R4 3.2838910 + 05 Cl 4.9677610- 12 C2 1.405471o - 08 C3 1.147161o- 12 C4 1.690801o- 13 C5 5.3363010- 13 SB1 3.28744:0 + 01
Y210 Yll0 Y220 Y lll Y221 Y121 Yll0 Ylll Y210 Y211
CALCULATED REQUIRED FREQUENCY VALUE VALUE 5"0000010 + 04 3"2860110-- 02 ( 3.2300010 -- 02) 5"0000010 ÷ 04 9"99567to -- 04 ( 1.000001o -- 03) 5"000001o + 06 3"391141o-- 06 ( 3.3900010 - 06) 5'000001o -]- 06 3"948701o-- 04 ( 3.8300010 -- 04) 5'00(R~lo + 06 6"912711o-- 05 ( 6.912001o - 05) 1"000001o + 06 -- 8"2030910 -- 06 (-- 8.168001o -- 06) 1"000001o + 08 4'0657910 -- 03 ( 4"00(X~1o-- 03) I'000001o -]- 08 6"131891o-- 03 ( 6"40(X~1o -- 03) 1'000001o + 08 2"386421o-- 02 ( 2"3400010 -- 02) 1-00000xo + 08 -- 1"61588:o -- 02 (-- 1"700001o -- 02) T A B L E II Errors ~o M.H. Pi 3.1 I.I 0.1 2.6 0 1.I 4.2 7.4 3.2 7.6
Y210 YII0 Y220 Y111 Y221 Yl21 Y110 YI 11 Y210 Y211
L.B.-S 1.8 0.05 0.03 3.08 0 0.43 1.62 4.22 1.97 4.95
Mean error: Modified Hybrid pi = 3.04 ~o Linear Beaufoy and Sparkes = 1.82 ~o
50 0-1 20 11o5 I l o - 12 31o- 9 1 1 o - 13 1 1 o - 13 1 1 0 - 14 2
WINTER 1969
200 1 35 ! lo6 51o301o21o2:051o20
1 2 0 0 0 2 1 2 0
12 9 12 12 12 80
3
2 3 3 4 2 3 4 4 4 4
2
It can be seen that the linear Beaufoy-Sparkes model gives an improved fit at the expense of two additional components for a total of 10 instead o f 8. The ability to make this kind of comparison between models without recourse to the network equations, provides a very powerful tool in device modelling. The Empirical Technique. R E D A P 4 performs the complete modelling function. It does however use a minimisation procedure and can consequently be very time consuming especially for large networks, and in some applications can fail to reach a solution. We shall
37
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,,=,o
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Fig. 15. Basic e m p i r i c a l n e t w o r k .
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R (ohms) \
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4k
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-x-~ IOMHz
lk
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Frequency (Hz)
IOM =,-
lOOM
Fig. 18(o).
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(b) single pore sub network
Fig. 16 (a).
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tand~ ______~~ ] f R--~ =57"2pF
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Vo gmRa(1 + SCR2) ~=1 + S C ( R , + R2)
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(c) pole ptus zero sub network
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(dl complex pole pair sub network
Fig. 18 (b, c, d). Fig. 16 (b).
~gm%.
rb,
R (ohms) 400
200
- -
Fig. 19. Basic I.f. transistor m o d e l f o r large networks.
10MHz [
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t
-j,,
l 200
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/
// 300MHzx,'
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Fig. 1Z now consider a general technique which the user himself can apply to devices to arrive at a model in a completely general way. Any consistent set of two-port parameters will serve to model a two-port network at any one frequency. If, to a set of two-port parameters at specific frequencies, we add an interpolation technique, we have a complete network model. The method used here is to derive equivalent circuits for each of the four parameters separately and then combine them. Fig. 15 shows the basic empirical network. Each of the parameters Zla, Z22,/~21 a n d / ~ 2 is a complex variable. Applying the technique to the amplifier of Fig. i, we find, first of all, that P-~2 is negligible. Z ~ and Z2., are shown at a variety of frequencies in Figs. 16(a) and 17. It can be seen that the semicircle superimposed on the ZH points fits quite closely up to 100 MHz. The network corresponding to this is shown in Fig. 16(b). The value of C is calculated from the phase angle 4~ at any point frequency (1MHz is" shown). Z22 is small and appears more or less resistive up to very high frequencies (100 MHz) so this is modelled as a pure resistance of 382~. The 38
open loop frequency response, t~2~, with zero source resistance (actually 50~)) and no load, is shown in Fig. 18(a). This is approximated by the two pole function shown assymptotically. Each of these poles can be simulated by a sub-network similar to that shown in Fig. 18(b). The first sub-network has g,,,~ R1 = Go, where Go is the 13. gain and f~ = 1/2~RICz. The second sub-network has g,,2R2 = 1 and f., = 1/2~R2C.... The complete network is shown in Fig. 2 and the computed results for this network are compared with those for the complete model in Figs. 3(a) and 3(b). Agreement is virtually exact up to 10 MHz. The increasing discrepancy above 20 MHz is probably due to the use of a two-pole function for/z..~ and could be reduced by using a more complex function. Combinations of pole plus zero and complex pole pairs can be simulated with sub-networks such as those shown in Figs. 18(c) and 18(d). Algebraic Technique. The empirical technique is well suited to two-port networks since the number of parameters to be separately modelled is, at most, only four. With a large n-terminal network, however, the technique could give rise to considerable complexity. The alternative which presents itself can be described in simplified form as follows. Starting with the circuit diagram of the network, each element in the diagram is modelled by its simplest low frequency equivalent. For example, each transistor could be replaced by the resistor-generator combination of Fig. 19. The resulting network is a protoCOMPUTER AIDED DESIGN
VI
C3
Z, ,:'l
.T
vo
T'T,-v',? :ov,-r
, T
r.o.v:-.
Fig. 20. Single ended equivalent circuit of ~,A702,4. R6
V~
V2 G
V3 ~ 6 R B I _ ~ _ ~ C2
•
i
i
i',-~ i'¢'~i
o ! 1'"'v' T I " I~':v:T I "1 "P~',.,v,T ! :!
i
l~,v4 1o
iExternal components
Fig. 21. Single ended equivalent circuit of t,A709. type equivalent circuit. Algebraic analysis is performed on the prototype and the gain determined as a function of the R's and gm'S. Inverting these equations enables values to be assigned to the R's and g,n's to provide a typical value for the gain. The prototype is then extended to high frequency by scattering capacitance throughout the network in known or anticipated quantities and then examining the sensitivity of the frequency response to each capacitor in turn. Those which have negligible effect are eliminated and the reduced network becomes the final equivalent circuit. The final step, and the hardest, is an algebraic analysis of the network and inversion of the equations to find the values of the capacitors in terms of the pole and zero locations and the values of the R's and g,,,'s computed earlier. A carefully chosen set of measurements will then enable the pole and zero locations to be found, hence the complete set of component values to be evaluated. This technique was applied to the /zA702A Integrated Operational Amplifier and the resulting network is shown in Fig. 20. A combination of the empirical and algebraic techniques was used to develop a model for the /zA709 Integrated Operational Amplifier. This amplifier contains too many terminals for frequency compensation, etc., for it to be modelled sensibly by the empirical technique. Unfortunately the network is so complicated that the algebraic analysis is totally unmanageable. The solution adopted was to model the output stage algebraically (which also provided the output impedance) and the input impedance and front end empirically. The resulting network is shown in Fig. 21.
Passive Components It is not always sufficient to represent a real resistor by plain resistance or a capacitor by pure capacitance, particularly at high frequencies. It is possible to improve on these basic representations fairly easily. The stray capacitance and lead and body inductance of resistors can be modelled to a first approximation simply by adding an equivalent series inductance or shunt capacitance, whichever happens to be dominant. An estimate of the magnitude of this stray element can be obtained from a simple phase angle measurement at high frequency. Capacitors present a more difficult problem and the type of model adopted will depend to some extent on the construction. The model should, however, contain at least one element (resistance) to simulate loss factor, and another (inductance) to simulate self-resonance. Work in this area
WINTER 1969
is progressing rapidly, and capacitor models will, it is hoped, become available in the near future. Finally, in order to achieve the degree of accuracy possible from a high frequency analysis using these models it is essential that circuit strays be also included in the data.
The Prediction Problem In the preceding sections it has been tacitly assumed that the devices used in the analysed circuit were in fact available for measurement. In a wide range of applications of circuit Analysis Programs this is not so. Simulation of the performance of production units for example, is an exercise in prediction using knowledge of the statistics of the devices. Unfortunately the necessary information is not generally available from device manufacturers, and what information is available is frequently sparse and unrelated to any specific model. If typical and worst case data are available, however, some useful results are obtainable from such an exercise. If, moreover, data on a representative sample of devices is available the value of the simulation can be considerably enhanced. The problem of providing statistically significant data is very complex. In the case of transistors, for example, changes in the production technique while continuing to produce devices meeting the type specification can result in changes in the mean values of the equivalent circuit parameters from batch to batch. One possibility might be to measure sufficient devices from selected batches to establish typical in-batch spreads for the model parameters and to specify a range over which the batch means might vary during the production life of the device. The Data Bank which is being prepared in close cooperation with device manufacturers will, it is hoped, provide useful device data for prediction applications.
Conclusions We have seen that in many applications it is possible to obtain quite accurate results of frequency response, distortion, etc., using very simple models. Lack of completely accurate models should not, therefore, prevent the circuit designer from making use of circuit analysis programs. For prediction, statistical data is required and while this should ideally be provided by the device manufacturers it has not in the past been generally available. With the increasing use of C-A.D. this situation will improve. The provision of component data by the Data Bank, for example, should help meet this need. In some cases, for example, the analysis of a specific circuit, the published data may not be sufficiently accurate and better results could be obtained if measured data for the actual devices were used. The designer can then either model the devices himself (and it is hoped that this paper will have indicated some possible approaches) or he could make use of a measurement service such as that offered by Racal.
Acknowledgments I would like to thank Mr. E. Wolfendale for his encouragement and my colleagues, Mr. G. Ogston, Mr. P. Battrick, Mr. A. Howard, Mr. C. J. Aylward, and others too numerous to mention, for their assistance in the work
39
published here. Thanks are also due/to the management of Racal Research Limited for permission to publish this
IV+ :RL
Vb Ra
paper.
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,
Va
References 1 Wolfendale, E.: 'Computer Aids for Electronic Equipment Design', CAD Quarterly Journal, Vol. 1, No. 1 (Autumn 1968). 2 Redac Users Manual. a Brayden, R. L.: 'Simplified Characterisation of H.F. Transistors', Electro Technology, pps. 42-45 (May 1967). Ebers, J. J., and Moll, J. L.: 'Large Signal Behaviour of Junction Transistors', Proc. I.R.E., pp. 1761-1772 (December 1954). 5 Beaufoy, R., and Sparkes, J. J.: 'The Junction Transistor as a Charge Controlled Device', A.T.E. Journal, pp. 310-327 (October 1957). s Linvill, J. G.: 'Lumped Models of Transistors and Diodes', Proc. LR.E., p. 949 (June 1958). 7 Hamilton, D. J., Lindholm, F. A., and Narud, J. A.: 'Comparison of Large Signal Models of Junction Transistors', Proc. I.E.E.E., pp. 239-248 (March 1964). s Turner, R. J.: 'Surface Barrier Transistors, Measurements and Applications', Tele-Tech, Vol. 13, p. 78 (1954). 9 Wei-Wha Wu: 'Base Spreading Resistance: How to measure it realistically', Electro Technology, pp. 54-57 (October 1967). l0 Neilsen, E. G.: 'Behaviour of Noise Figure in Junction Transistors', Proc. I.R.E., pps. 957-963 (July 1957).
APPENDIX I H y b r i d Pi T r a n s i s t o r
Measurements
of Rin and Beta. The circuit of Fig. 22 shows one method of measuring the transistor input resistance and beta at low frequency. The load, RL, should be as small as possible to reduce the effect of rb'c and roe. Then Measurements
Rni = rbb' + rife
but
Vb p
R.,
hence gm
V3Rin
--
V2RLI~'e
. . . . (4)
Equations 2 and 3 give us Ri, and fl directly, and these values can be used to find r d and rife from a noise figure measurement. Determination of ROb" The noise figure can be measured by the method of Appendix lI and rbb' and rife determined. Alternatively, rbb' could be found from a high frequency measurement of input impedance,O) from a bridge measurement with Co'c (a) or V from a direct measurement in the edge of saturation.O) Measurement of High Frequency Beta. The current gain at high frequency is given by:
~(~) = 1 + jo~,'b'e(Co',, + Co'<)
-
V 2
Rs
V2Rs
v2
Rin --
li,,
V3 =
Vl' -
V2
. . . . (2)
-- gmRL Vo'
-- gmVb"
-
-
Va RL
Rb
(v/-
gm
--
C ; c
....
(5)
A low frequency measurement of Cob, the reverse biased collector base capacitance with emitter open, gives Cb'c directly, i.e. Cffc = Cob. A low frequency bridge such as the Wayne-Kerr B221 can be used for this measurement with a suitable biasing arrangement isolated from the bridge terminals. The high frequency beta can be measured in a variety of ways of which two have proved useful. One, using the General Radio Transfer Function and Immittance Bridge provides the real and imaginary parts of the complex beta as scale readings. The second is to use an arrangement similar to that shown in Fig. 23. C2 is tuned to provide
and &/k. -
-
Rb
VI I --
k.----
V~Rs VbRL
. . . . (3)
V~o
• o
I|.
u
l J
....
wl
~V+
-
-
~ Li
i
'V 2 Test"~-~' / transistor! J .
m
RL Vb' 40
V2rb' e _ _
=
Whence
Then
$ =
o
Fig. 22. M e a s u r e m e n t o f Rin a n d Beta.
V]Rb R] +
=
-
(b) equivalent
R1 + Rb
gx" - -
11.
o
(a} circuit
. . . . (1)
R~Rb
Rs
"L" I "L ilL °
rb'e~ i~
transistor
Fig. 23. H i g h f r e q u e n c y Beta measurement.
p~C2 _
]o
COMPUTER AIDED DESIGN
a short circuit at the collector at the operating frequency. Ca is tuned to cancel the stray jig capacitance at the operating frequency (V~ = max). A short is connected between the base and collector terminals on the jig and the voltage Va is noted. The short is removed and the transistor inserted. The new output voltage Va' is noted and:
[3(
3)ree
2 + 3 + rbb'gm
whence I'ce = R c E . ! I + 1 + "bb'gm)
. . . . (7)
f
t
ql
e,,, =
ao/re~- q__:zt" kT
since ao~l
With the base shorted to ground for a.c. the resistance seen at the collector is: (1 +
kT
dl Also
v;Iv.~
Measurement of Collector Resistance. For the hybrid pi model: rb'c = fl'rc. . . . . (6)
Roe
dV
The collector resistance Roe can be found with the arrangement of Fig. 24. The measurement should be made at a frequency sufficiently low for r0'c not to be shunted to any great extent by Cb'e (e.g. 2 kHz). The effective source resistance can be found by connecting a known resistance between collector and ground, and then Rce found by substitution. Variation of Parameter Values. As an alternative to producing separate sets of parameter values for every possible combination of junction temperature, collector voltage and emitter current, we can derive relationships between the parameter values and the temperature and bias conditions and use these for small variations around the measured points. For and ideal P - N junction:
hence gm iS proportional to emitter current and inversely proportional to absolute temperature, r b'e= [3*1/g,,, and t3 is a slowly varying function of both emitter current and temperature so that over a small range of either we can assume /3 is a constant and rb'e is then proportional to temperature and inversely proportional to emitter current. rbb' decreases slowly with both increasing temperature and emitter current but the effect of considering it constant over a small range is probably negligible, rce is proportional to re (in fact ree = rdp. where t~ is typically 1/2000) and rb'c = (/~ + l)r~. Cbc is the collector base depletion capacitance and for a graded junction varies with the reverse bias voltage as Cb'c = KVb'e"t. Finally, for small changes in voltage, current or temperature, fa can be considered constant and Cb'e which is generally much larger than Cb'e is then inversely proportional to rb'e. These relationships are summarised in Table III. The use of these rules o f thumb can serve to reduce the number of measurements required to characterise a transistor over the full range of temperature and bias conditions. Table III Interpolation Rules for Hybrid Pi Parameters
Parameter
rb'e rb'c gm
and the slope conductance
Emitter Current
T T T I/T
i//e
l/T
le
1/le l/le
(v
Cb'c
dl
qIs eqVlkT
dV
kT
Collector Voltage
t'bb" ree
I = l s { e o V / k r - 1}
Junction Temperature
Cb'e
+ • vb)-~
The difference between the junction temperature and ambient temperature can be found from
For 1 >> Is, this becomes dl
ql
dV
KT
~-T.=
Now practical P - N junctions closely approximate the ideal, hence ~c2
%
PsCr
where Pj is the internal power dissipation Pj ~- V M e
and GT is the thermal conductance generally quoted in or derivable from the manufacturer's data.
b ~--~bz rbb'
)T,,,
R,
A P P E N D I X II Transistor Noise Model
transistor
"r" Fig. 24. Measurement of Rce. WINTER1969
e
Fig. 25. Transistor noise model
The noise performance of a transistor at frequencies greater than those whei'e flicker noise predominates and less than fl, can be determined from the noise model shown in Fig. 25.0o) 7b2 is the thermal noise generator
41
associated with the base resistance rbb'. and is defined by ~b= = 4KT. rbb', per cycle bandwidth. ~= and T~2 are Shott noise generators associated with the emitter and collector junctions respectively.
iV+ High gain 10dB ~1....... h=,,,~ ~ . amplifier atten. 'v~'tme~er-'~
ie z = 2qle
and ic 2 =
Signal ~ generat°r£-I£
2qlc(l -- o)
In the common emitter configuration, the noise factor F of the transistor is given by
F =
rbb" rb'e (rbb" + rb'e/fl + RS) 2 1 +--:--RS + ~s-s[3 + 2rb'eRs
(6)
In determining the parameters of the hybrid pi model, some difficulty is usually encountered in finding rbb' to a reasonable degree of accuracy. It can be seen from equation 6 that for low values of Rs, the noise factor is largely dependent on rbb'. Thus, a measurement of F with R s = 5 D, say, can provide a measure of rbb' from
Fig. 26. M e a s u r e m e n t
I
-
rbb'
( Vs)"
1
4Rs
K T B ( A - 1)
l)2rb'eRS
....
Substituting for rb'e = Ri, to rbb'.
o f n o i s e figure.
The arrangement for measuring F at 500 kHz is shown in Fig. 26. The collector of the transistor is tuned to 500 kHz to provide a high gain at the measuring frequency. The 10 dB pad is initially switched out and the signal generator off. The narrow band voltmeter is tuned to 500 kHz and the level noted. The 10 dB pad is inserted and the signal level increased until the voltmeter level returns to its initial value. The voltage Vs, across the 5f~ resistor is noted and F is given by F
rbb' = -- (rb'e + Rs) + -~(rb'e + RS) 2 + ( F I
;ransistor ~'~r,nder test
(7)
from equation 2 leads
where R s = source resistance K = Boltzman's constant T = temperature (°K) B = bandwidth of voltmeter A = attenuation inserted (power ratio) This noise model is used in the Circuit and Transistor Noise Analysis Program CATNAP (REDAP 18). Received December 1968
R. W. Brown B.Sc.(Eng.), C.Eng., M.I.E.E., was educated at Haberdashers' Aske's Hampstead School and Northampton Engineering College, London. Following a radio engineering apprenticeship with S.T.C. Ltd. he moved to U.K.A.E.A. in 1960 where he was engaged on the detection of underground nuclear tests. He joined Canadian Marconi Co., Montreal, in 1963 and worked for the next four years on telecommunications and airborne radar systems. On returning to the U.K. in 1967 he joined Racal Research Ltd. where is is now engaged on device modelling for C-A.D.
42
COMPUTER AIDED DESIGN