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Digital distance protection of transmission lines in the presence of SSSC
Electrical Power and Energy Systems 43 (2012) 712–719
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Digital distance protection of transmission lines in the presence of SSSC Amir Ghorbani a,⇑, Babak Mozafari a, Ali Mohammad Ranjbar b a b
Department of Electrical Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran Department of Electrical Engineering, Sharif University of Technology, Tehran, Iran
a r t i c l e
i n f o
Article history: Received 4 April 2010 Received in revised form 8 April 2012 Accepted 17 May 2012 Available online 10 July 2012 Keywords: Distance relay Trip boundary Static Synchronous Series Compensator (SSSC)
a b s t r a c t In this paper the impact of Static Synchronous Series Compensator (SSSC) on the impedance calculated by distance relay is investigated. Analytical results are presented and verified by detailed simulations. Six different phase to phase and phase to ground measuring units of the distance relay are simulated to resemble the behavior of the relay. It is shown in this paper that zero sequence of the injected voltage by 48 pulse SSSC converter has the most impact on the apparent impedance seen by the phase to ground fault measuring unit and cause under reaching of distance relay. It can be concluded from the results that SSSC located in the middle of the transmission line cause to divide trip characteristics of distance relay into two separate parts. It is also shown that the over-reaching operation of distance relay might happen in some cases in the presence of SSSC. All the detailed simulations are carried out in MATLAB/Simulink environment. Ó 2012 Elsevier Ltd. All rights reserved.
1. Introduction The voltage source inverter based series VAr compensator, called Static Synchronous Series Compensator (SSSC), was first introduced by Gyugyi in 1989 [1]. Using the power electronic based technologies, a uniform and versatile shunt and series reactive power control throughout the system as well as bus voltage angle control become possible. SSSC principally can play the role of a pure series capacitive or inductive compensation in a transmission line if the output voltage of its series element lags or leads the transmission line current by 90°. Alternatively, in voltage compensation mode, by adjusting the injected series voltage independent of the current, both active and reactive power of the transmission line can be controlled simultaneously [1]. Taking advantages of the power electronic switches, the SSSC can fast modify system parameters like current and impedance of transmission line. Since distance relay calculates the fault location by measuring current and voltage in transmission line, SSSC can disturb the normal operation of a distance relay. Literature in this field can be divided up into three distinct categories concerning the installation method of the compensators in the network; series compensation impact [2–5], shunt compensation impact [6–9] and series/shunt compensation impact [10–13] on transmission line distance protection. In these work, it is shown that the presence of FACTS compensators in a fault loop affects the apparent impedance seen by the distance relay. In [3,5] the impact of SSSC has been investigated for phase to ground faults. The study first deals with the impact of SSSC on ⇑ Corresponding author. 0142-0615/$ - see front matter Ó 2012 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.ijepes.2012.05.035
the calculated impedance by a distance relay. In the next stage, SSSC is simulated in detail based on 48-pulsed voltage source converters. Analytical results are validated using the simulations. In [7,8], the performance of distance relays in the presence of shunt FACTS compensation devices, i.e., SVC and STATCOM. The work in [10] presents the impacts of VSC-based FACTS controllers on distance relays while controlling the power flow of compensated lines are evaluated analytically and by detailed simulations for different fault types and locations. In [11], an apparent impedance calculation procedure for a transmission line with UPFC based on the power frequency sequence component is investigated. In this work, it is shown that despite of the single phase to ground faults, the presence of SSSC in a fault loop cause to overreaching operation of the relay when two-phase to ground faults occur in the system. In other words, whereas the fault is not in the relay zone, relay operates wrongly which this important issue should be considered in relay setting. It is also shown that SSSC located in the middle of the transmission line cause to divide trip characteristics of distance relay into two separate parts. Simulation results include different power system operating conditions, SSSC control system settings and fault scenarios. Finally, a solution is provided to eliminate the impact of SSSC on low resistive phase to ground faults (which is the most probable fault). 2. Sample system modeling The configuration of the under study power system equipped with a SSSC device implemented in MATLAB/Simulink environment is shown in Fig. 1. It contains two series 200 km, 400 kV transmission lines having the following data:
A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
713
Fig. 1. SSSC setup in MATLAB/Simulink environment using the SimPowerSystems toolbox and the Simulink library.
Positive sequence impedance of line I and II: Z1L1 = Z1L2 = 0.0201 + j 0.2868 O/km. Zero sequence impedance of line I and II: Z0L1 = Z0L2 = 0.1065 + j 0.8671 O/km. Positive sequence impedance of sources G and H: Z1G = 1.7431 + j 19.424 O, Z1H = 0.8716 + j 9.7120 O. Zero sequence impedance of sources G and H: Z0G = 2.6147 + j 4.886 O, Z0H = 1.3074 + j 2.4430 O. System frequency = 60 Hz. Load angle between sources = 20°. Amplitude ratio between the magnitudes of the source voltages at G and H = 1.0526.
3. SSSC specifications and control system In this paper the model of SSSC has been put in based on a 48pulse voltage source converter so as to improve power quality and reduce harmonic effects. A ± 100 Mvar SSSC device is connected in series with a 400-kV transmission line through four phase-shifting transformers [14].
Fig. 2 shows the control block diagram of the used SSSC. An instantaneous three phase set of line voltages, at B1_SSSC bus is used for calculation of the reference angle h = xt based on which the compensating voltage, Vinj, is decomposed into its real or direct component, Vd and reactive or quadrature component, Vq. The compensating voltage, Vinj is controlled by a simple closed loop controller. The absolute value of the reference voltage, VRef is compared to the measured magnitude of the injected voltage, Vinj and the amplified difference (error) is passed through a PI controller and then is added, as a correction angle Da, to the synchronizing signal h = xt. An instantaneous three phase set of measured line currents, I is decomposed into its real or direct component, Id and reactive or quadrature component, Iq and then the relative angle, of the line current with respect to the Phase-Lock-Loop angle, are calculated. The phase shifter is operated from the output of polarity detector which determines whether reference, VRef is positive (capacitive compensation mode) or negative (inductive compensation mode). Depending on the polarity of Da, angle h and consequently the converter gate drive signals will be advanced or retarded and, thereby the compensating voltage, Vinj will be shifted with respect to the prevailing line current from its original + p/2 or
Fig. 2. Control block diagram of a SSSC.
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p/2 phase position. This phase shift will cause the converter to absorb real power from the AC system for the DC capacitor or, vice versa supple that to the AC system from the DC capacitor. As a result, the voltage of the DC capacitor will increase or decrease, causing a corresponding change in the magnitude of the compensating voltage. Once the desired magnitude of Vinj is reached the substantially quadrature relationship between the line current and compensating voltage gets reestablished with only a remaining small, steady angular difference necessary to absorb power from the AC system to replenish the operating losses of the converter [14,15].
(a)
4. Analysis of SSSC impact on the measured impedance by distance relay Fig. 3 show the positive, negative and zero-sequence networks of the sample system of Fig. 1, respectively, with the shunt compensator in the middle of line I. Distance relay is installed at bus P to protect the associated transmission line I. The following definitions have been done for convenience [16]: V0p, V1p, V2p V0inj, V1inj, V2inj V0E, V1E, V2E I0p1, I1p1, I2p1 I0p2, I1p2, I2p2 I0q1, I1q1, I2q1 Z0L1, Z1L1 Z0L2, Z1L2 Z0G, Z1G, Z0H, Z1H Rf X
are sequence phase voltages at relay location at Bus P are sequence phase voltages injected by SSSC are sequence phase voltages at fault location E are sequence phase currents through line I at relay location at Bus P are sequence phase currents through line II at relay location at Bus P are sequence phase currents through line I at Bus Q are sequence impedances of the line I are sequence impedances of the line II are sequence impedance of sources G and H respectively is fault resistance is fault per-unit distance from the relay location
For positive sequence network according to Fig. 3, following equations can be derived for lines I and II for a fault at B with the fault resistance Rf:
(b)
(c) Fig. 3. Sequence networks of the system; (a) positive sequence network; (b) negative sequence network; and (c) zero sequence network.
where:
k0 ¼ Z 0L2 =Z 0L1
ð8Þ
V 1p ¼ xZ 1L1 I1p1 þ Rf ðI1p1 þ I1q1 Þ þ V 1E þ V 1inj
ð1Þ
4.1. Single phase to ground fault
V 1p ¼ Z 1L2 I1p2 þ ð1 xÞZ 1L1 I1q1 þ Rf ðI1p1 þ I1q1 Þ þ V 1E
ð2Þ
For a single phase to ground fault (A–G) following equations can be used:
Extracting V1E from (2) and replacing it in (1) we have:
I1q1 ¼
x V 1inj k1 I1p1 þ I1p2 ð1 xÞ ð1 xÞZ 1L1 ð1 xÞ
ð3Þ
V 0E þ V 1E þ V 2E ¼ 0 By using (5)–(7) and (9) we have:
where:
k1 ¼ Z 1L2 =Z 1L1
ð4Þ
V A—G ¼ xZ 1L1 Ip1 þ xðZ 0L1 Z 1L1 ÞI0p1 þ þ ðK 1 K 0 ÞI0p2 þ DV A—G
By substituting (3), in (1), the following equation is obtained:
V 1p
Rf V 1inj ¼ xZ 1L1 I1p1 þ V 1inj þ k1 I1p2 þ V 1E I1p1 þ ð1 xÞ Z 1L1
ð5Þ
The negative and zero sequence voltages are obtained from Fig. 3 in the same way:
V 2p
Rf V 2inj ¼ xZ 1L1 I2p1 þ V 2inj þ k1 I2p2 þ V 2E I2p1 þ ð1 xÞ Z 1L1
ð6Þ
Rf V 0inj k0 I0p2 þ V 0E I0p1 þ ð1 xÞ Z 0L1
ð7Þ
V 0p ¼ xZ 0L1 I0p1 þ V 0inj þ
ð9Þ
Rf ½Ip1 K 1 Ip2 ð1 xÞ ð10Þ
where:
V 0p1 þ V 1p1 þ V 2p1 ¼ V A—G
ð11Þ
I0p1 þ I1p1 þ I2p1 ¼ Ip1
ð12Þ
I0p2 þ I1p2 þ I2p2 ¼ Ip2
ð13Þ
V 0inj þ V 1inj þ V 2inj ¼ V inj
ð14Þ
and:
A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
DV A—G ¼ V inj þ
Rf V inj 1 1 þ V 0nj Z 0L1 Z 1L1 ð1 xÞ Z 1L1
ð15Þ
For a single phase to ground fault (A–G), the apparent impedance is obtained by using the above equations:
Z A—G
V A—G V A—G ¼ ¼ Ip1 þ ½ðZ 0L1 Z 1L1 Þ=Z 1L1 I0p1 IA—G
ð16Þ
Rf ½Ip1 k1 Ip2 þ ðk1 k0 ÞI0p2 þ DZ A—G ð1 xÞIA—G
ð17Þ
When there is no series compensation DZA–G in (17) is zero and the apparent impedance is the same as uncompensated lines, so DZA–G depends on the series compensator and equals:
DZ A—G ¼
Rf V inj V inj 1 1 þ þ V 0inj Z 0L1 Z 1L1 IA—G ð1 xÞIA—G Z 1L1
ð18Þ
It is clear in (18), the presence series compensator in fault loop effects in calculated impedance by relay. When the fault distance from the relay is 0.5 p.u or the series compensator does not presence in fault loop, the effect of it in impedance ZA–G is only by Rf. 4.2. Phase to phase fault For a phase to phase fault (A–B) we have:
V 1E ¼ aV 2E
ð23Þ
In above equation, DZA–B depends on presence series compensator and it is equal to:
Rf ðV 1inj aV 2inj Þ ðV 1inj aV 2inj Þ þ IA—B Z 1L1 ð1 xÞIA—B
ð24Þ
In above equation Rf is fault resistance between two phases. According to (24) for Rf = 0, series compensator impact is due to the negative and positive sequence voltage differences. 4.3. Distance relay modeling The distance relay model is developed according to (16) for a single phase A–G fault and (22) for phase to phase A–B fault, where three phase voltages and currents are passed through anti–aliasing low-pass filters [17], then the phasors are extracted using Full Cycle Discrete Fourier Transform (FCDFT). Finally, after calculating the positive, negative and zero sequence components of the estimated phasors, the apparent impedances for the six measuring units (A–G, B–G, C–G, A–B, B–C, and C–A) are evaluated [16,17]. The distance relay function which is emulated using MATLAB/Simulink tool is shown in Fig. 4. This figure exhibits only A–G measuring unit as demonstrated in Eq. (16).
ð19Þ 5. Simulation results
where:
a ¼ 0:5 þ j0:886
ð20Þ
From (5), (6), and (19) we have:
V 1p aV 2p ¼ xZ 1L1 ðI1p1 aI2p1 Þ þ ðV 1inj aV 2inj Þ Rf ðV 1inj aV 2inj Þ þ k1 ðI1p2 aI2p2 Þ ðI1p1 aI2p1 Þ þ ð1 xÞ Z 1L1 ð21Þ The apparent impedance for a phase to phase (A–B) fault is as:
Z A—B ¼
Rf ½ðI1p1 aI2p1 Þ k1 ðI1p2 aI2p2 Þ ð1 xÞIA—B
þ DZ A—B
DZ A—B ¼
From (10) and (16) we have:
Z A—G ¼ xZ 1L1 þ
Z A—B ¼ xZ 1L1 þ
715
V 1p aV 2p V 1p aV 2p ¼ I1p1 aI2p1 IA—B
By substituting (21) in (22), we will have:
ð22Þ
SimPowerSystems is an enrichment design tool under simulink environment in MATLAB often used for modeling and simulating a power system. It has been employed to study the performance of a traditional distance relay in a typical power system equipped with a SSSC. Fig. 5 shows the digital simulation results. At 0.15 s, an inductive compensation of 0.07 per unit is requested. The inverter output 48-pulse voltage, Vinj_a, of phase a leads the line current, Ia, by almost 90°. As the inductive compensation demand increases, the line current, Ia, and the power flow, P1, and Q1, in the transmission line decrease. At 0.31 s, a capacitive compensation of 0.1 per unit is requested. The inverter voltage, Vinj_a, lags the line current, Ia, by almost 90°. As the capacitive compensation demand increases, the line current, Ia, and the power flow, P1, and Q1, in the
Fig. 4. Distance relay model (only A–G measuring unit).
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1.5
0.15 IVinjI
P1
Amplitude (p.u)
Amplitude (p.u)
1 0.5 0 -0.5 Q1
0.1 0.05 0
Vinj-a
-1
Vinj-q
-0.05 Ia
-1.5 0.1
0.15
0.2
0.25
0.3
Vinj-d
0.35
0.4
0.4
0.41
0.42
0.43
0.45
0.44
0.46
Time (Sec)
Time (sec)
Fig. 7. Output signal of |Vinj| calculator section in SSSC control system.
Fig. 5. Performance of a SSSC.
The SSSC three phase output voltages are shown in Fig. 6 for an A–G fault occurring at a distance of 120 km from the relay point and the SSSC reference voltage is kept to 0.1 p.u, VRef = 0.1 p.u. As shown in Fig. 6, the amplitude of the injected three phase voltage in the line increases immediately after fault occurrence. This is due to the fact that the SSSC control system is trying to regulate all three phase output voltages simultaneously by rapidly injecting reactive power to the system. So, after an A–G fault all three phases have been compensated. As mentioned earlier, SSSC compensates for the voltage independent of the line current in the form of series voltage [1]. However, referring to Fig. 6 it can be observed that all three phase output voltages of SSSC have been increased from their previously specified values (0.1 p.u). This fact can be clarified by investigating output signal of |Vinj| calculator section in SSSC control system. This output is shown in Fig. 7. It can be seen that SSSC has held the output voltage value at the previously set value (0.1 p.u). In order to analyze the impact of internal settings of SSSC on the performance of distance relay, the apparent impedances seen by the relay with and without SSSC have been drawn and compared for different values of SSSC reference voltage, VRef, in Fig. 8. The figure shows the apparent impedance trajectories when phase A to ground fault occurs in right side of SSSC and in 120 km away from the relay point for SSSC setting values of 0.05 and 0.1 p.u. As it can be clearly seen, the relay under reaches in both cases. Apparent impedance, as a function of time, are shown separately in Figs. 9 and 10. According to Figs. 9 and 10 as what has been explained before, it can be concluded that before fault oc-
Apparent Reactance (ohm)
5.1. Single phase to ground fault (A–G)
120 With SSSC (VRef =0.1)
100
With SSSC (VRef = -0.05) Without SSSC
80 60 40 20 Zone 1
0 -60
-40
-20
0
20
40
60
80
100
120
Apparent Resistance (ohm) Fig. 8. Apparent impedance calculated by the A–G measuring unit of the relay for an A–G fault occurred 120 km from the relay point.
120
Apparent Reactance (ohm)
transmission line increase. It can also be observed that the SSSC has, as expected, an excellent (subcycle) response time.
100 80 60 40 20 0
Without SSSC With SSSC (VRef =0.1)
-20
With SSSC (VRef = -0.05)
-40
0.4
0.45
0.5
0.55
0.6
Time (Sec)
Amplitude (p.u)
Fig. 9. Apparent reactance for an A–G fault occurred at 0.4 s at 120 km from the relay point.
0.8
Va-inj
0.6
Vb-inj Vc-inj
0.4 0.2 0 -0.2 -0.4 -0.6 A-G fault occurred
-0.8 0.39
0.4
0.41
0.42
0.43
0.44
0.45
Time (Sec) Fig. 6. 48-Pulse converter output three phase voltage for an A–G fault occurred 120 km from the relay point and VRef = 0.1 p.u.
curred at 0.4 s, SSSC decreases line reactance in capacitive compensation mode (VRef = 0.1 p.u) and increases line reactance in inductive compensation mode (VRef = 0.05 p.u). According to Fig. 6, it can be observed that after happening the fault, all three phases of the SSSC output voltage vary coincidently. In other words, the injected zero sequence component of the SSSC voltage increases, thereby V0inj forms the main part of Vinj in Eq. (18). Obtained from analytic synthesizes, SSSC impact on the calculated impedance can be expressed by Eq. (18). One way to validate the achieved analytical formula is to compare the apparent impedance calculated by this formula with the results obtained from direct simulation of phase to ground fault measuring unit; but its value (DZA–G) is subtracted from the calculated impedance by the phase
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80 With SSSC (V Ref =0.1)
80
With SSSC (V Ref = -0.05)
70
Without SSSC
60 50 40 30 20 10 0
0.4
0.42 0.44 0.46 0.48
0.5
0.52 0.54 0.56 0.58
Apparent Reactance (ohm)
Apparent Resistance (ohm)
90
With SSSC VRef = -0.1 p.u
60 50 40 30 20 10 0
0.6
Without SSSC With SSSC VRef =0.2 p.u
70
Zone 1
-40
-20
Time (Sec)
0
20
40
60
Apparent Resistance (ohm)
Fig. 10. Apparent resistance for an A–G fault occurred at 0.4 s at 120 km from the relay point.
Fig. 12. Apparent impedance calculated by the A–B measuring unit of the relay for an A–B–G fault occurred 190 km from the relay point.
to ground fault (A–G) measuring unit. The final calculated impedance with this consideration and the calculated impedance without presence of SSSC are shown in the Fig. 11. It can be observed that both of them have the same final value. Therefore it can be concluded that SSSC impact is due to Eq. (18). To show the impact of V0inj in the calculated impedance, this time only V0inj value is subtracted from the calculated impedance by the phase to ground fault (A–G) measuring unit. The resulted calculated impedance is shown in Fig. 11. It can be seen that in this case SSSC has a small impact on the calculated impedance. In other words, the most significant part of SSSC impact on the calculated impedance is due to zero sequence of the injected voltage.
trast to single phase to ground faults. Calculated apparent impedance by the A–B measuring unit is shown in Fig. 13 for the A–B fault occurred at 158 km from the relay point. According to the simulations, SSSC in capacitive compensation mode causes to decrease impedance and as a result leads to over-reach the relay. Bigger values of VRef causes more over-reach. SSSC in inductive compensation mode cause to increase impedance and as a result under-reach the relay. The amounts of under-reach and over-reach for A–B faults are less than the ones for A–G and A–B–G faults. The reason is that for the lower values of positive and negative sequences of the SSSC injected voltage for A–B faults and on the other hand zeros sequence of the SSSC injected voltage has less effect on the calculated impedance by the phase to phase fault measuring unit.
5.2. Double phase to ground fault (A–B–G) 55
Apparent Reactance (ohm)
In this section A–B–G fault is considered. The calculated impedance by the A–B measuring unit is shown in Fig. 12 for A–B–G fault located at 190 km from the relay point once for VRef = 0.2 and again for 0.1 p.u. It can be observed that existence of SSSC caused the relay to over-reach. The more the compensation ratio the more over-reach will be caused. For example SSSC in operating modes VRef = 0.2 and VRef = 0.1 causes the relay to over-reach for the faults in 160–198 km and 160–171 km, respectively. SSSC in inductive compensation mode causes the relay to under-reach just like the single phase to ground fault. The more compensation ratio will cause the more under-reach.
50 45 40 With SSSC (VRef = -0.05)
35
With SSSC (VRef = 0.1)
Zone 1
30 -15
-10
5.3. Phase to phase fault (A–B)
100 80 60 40 20 Zone 1
0
20
40
60
80
100
120
Apparent Resistance (ohm) Fig. 11. Apparent impedance for an A–G fault occurred at 120 km from the relay point and with/without voltage compensation.
Apparent Reactance (ohm)
Apparent Reactance (ohm)
Without SSSC With SSSC & Z-delta(Z) With SSSC With SSSC & Z-Z0inj
-20
5
10
15
20
Fig. 13. Apparent impedance calculated by the A–B measuring unit of the relay for an A–B fault occurred 158 km from the relay point.
120
-40
Without SSSC
0
Apparent Resistance (ohm)
In this section investigations are presented for phase to phase fault (A–B). SSSC has less impact for phase to phase faults, in con-
0 -60
-5
55 50 45 40 35 30 25 20 15 10 5 0
Load Angle= 20 Deg Load Angle= 70 Deg
Zone 1
-30
-20
-10
0
10
20
30
40
50
Apparent Resistance (ohm) Fig. 14. Apparent impedance calculated by the A–G measuring unit of the relay for an A–B fault occurred 105 km from the relay point.
A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
There are some special cases for A–B fault in which SSSC cause the relay to detect A–G faults wrongly. This can happen for large values of VRef when SSSC is in capacitive compensation mode. For example, the calculated impedance by A–G measuring unit of relay is shown in Fig. 14 for an A–B fault occurred at distance 105 km for two different values of system load angle. The circumstances in which relay wrongly detects A–G fault, happens more times for bigger values of load angles. The other measuring unit that wrongly detects for A–B fault, is B–G measuring unit. This factor is shown in Fig. 15 for an A–B fault located at 105 km. This factor mainly depends on Rf (resistance of fault between two phases). For larger values of Rf the distances for which relay detects wrong faults will be more.
b
70
With SSSC(VRef =0.2)
60
B
50 C
40 A
30 20
D
c
d
10 0 0
50
100
150
200
250
Apparent Resistance (ohm)
Apparent Reactance (ohm)
The trip characteristics of the relay is obtained by keeping the system operating conditions constant, while fault location (0– 95% length of transmission line I) and fault resistance Rf (from 0– 200 O) are varied [12,14]. Fig. 16 shows the trip characteristics without presence SSSC that has been calculated by A–G measuring unit. Impact of SSSC on trip characteristics are shown in Figs. 17 and 18 for different working modes of SSSC. SSSC divides the trip characteristics into two different sections. The first is related to the faults occurring between 0 to 100 km and SSSC is not present in the fault loop. According to the equation, impact of the SSSC is due to Rf for faults occurred between 0 to 100 km and for the larger values this impact is more. This fact can be observed in Figs. 17 and 18. The second part is related to the faults occurred between 100 and 190 km therefore, SSSC is fault loop which is shown with (a–
110 100 90 80 70 60 50 40 30 20 10 0
Without SSSC With SSSC(VRef = -0.1)
a
With SSSC(VRef = -0.05)
b
c B
d C
A D
0
50
100
150
200
250
300
350
400
450
Apparent Resistance (ohm) Fig. 18. Trip characteristic with/without SSSC for A–G fault and SSSC in inductive compensation mode.
60
Apparent Reactance (ohm)
Without SSSC With SSSC(VRef =0.1)
a
80
Fig. 17. Trip characteristic with/without SSSC for A–G fault and SSSC in capacitive compensation mode.
5.4. Trip characteristics
Rf =1 ohm Rf =3 ohm
50
b–c–d). The results without SSSC (A–B–C–D) are also contained for comparison. Comparing Figs. 17 and 18 it can be concluded that impact of SSSC is bigger in inductive compensation mode. It is also shown that SSSC under-reaches the relay for all the A–G faults.
40 30 20 10
6. Conclusion
Zone 1
0 -40
-30
-20
-10
0
10
20
30
40
50
Apparent Resistance (ohm) Fig. 15. Apparent impedance calculated by the B–G measuring unit of the relay for an A–B fault occurred 105 km from the relay point.
60
Apparent Reactance (ohm)
90
Apparent Reactance (ohm)
718
50 Rf =0-200 ohm & 95% Line Length
40 30 Rf =0 ohm & 0-95% Line Length
20
Rf =200 ohm & 0-95% Line Length
10 Rf=0-200 ohm & 0% Line Length
0 0
50
100
150
200
250
Apparent Resistance (ohm) Fig. 16. Trip characteristic without SSSC for A–G fault.
300
In this paper, it has been shown that existence of SSSC in a fault loop causes to some deviations in the relay calculated impedance. The most significant impact of SSSC is sensible for phase to ground faults which is more observable when it is working in inductive compensation mode. For the phase to ground faults SSSC causes to under-reach the distance relay. There are some cases in two phase to ground and phase to phase faults that SSSC causes to over-reach the distance relay, in contrast to the case of phase to ground faults. To mitigate the impact of SSSC on the calculated impedance a supplementary part can be added to the distance relay which can be used to measure DZ from SSSC output voltages. The measured DZ can be subtracted from the calculated impedance to obtain the real impedance. This method can be easily applied when SSSC is located in the beginning of transmission line. However, when SSSC is located in the middle of the line using remote signals can be the possible solution. From the results described in the preceding section, it can be observed that the trip boundaries of the relay phase to ground fault measuring units are influenced by the presence of the SSSC. Thus to provide a suitable trip boundary for the relay phase to ground fault measuring units, the boundary needs to be manipulated adaptively with the voltage injected by SSSC.
A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
References [1] Hingorani NG, Gyugyi L. Understanding FACTS concepts and technology of flexible AC transmission systems. New York: IEEE Press; 2000. [2] Khederzadeh M, Sidhu TS. Impact of TCSC on the protection of transmission lines. IEEE Trans Power Deliv 2006;21(1):80–7. [3] Khederzadeh M, Ghorbani A, Salemnia A. Impact of SSSC on the digital distance relay. IEEE/PES general meeting, Calgary, Alberta, Canada; 2009. [4] Dash PK, Pradhan AK, Panda G, Liew AC. Digital protection of power transmission lines in the presence of series connected FACTS devise. In: Proc. IEEE power engineering soc. winter meeting, vol. 3, January 23–27, 2000, pp. 1967–1972. [5] Ghorbani A. Comparing impact of STATCOM and SSSC on the performance of digital distance relay. J Power Electr 2011;11(6):890–6. [6] El-Arroudi K, Joos G, McGillis DT. Operation of impedance protection relays with the STATCOM. IEEE Trans Power Deliv 2002;17(2):381–7. [7] Sidhu TS, Varma RK, Gangadharan PK, Albasri FA, Ortiz GR. Performance of distance relays on shunt—FACTS compensated transmission lines. IEEE Trans Power Deliv 2005;20(3):1837–45. [8] Ghorbani A, Khederzadeh M, Mozafari B. Impact of SVC on the protection of transmission lines. Electr Power Energy Syst 2012;42:702–9. [9] Khederzadeh M, Ghorbani A. STATCOM modeling impacts on performance evaluation of distance protection of transmission lines. Euro Trans Electr Power 2011;21(8):2063–79.
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[10] Khederzadeh M, Ghorbani A. Impact of VSC-based multiline FACTS controllers on distance protection of transmission lines. IEEE Trans Power Deliv 2012;27(1):32–9. [11] Zhou X, Wang H, Aggarwal RK, Beaumont P. Performance evaluation of a distance relay as applied to a transmission system with UPFC. IEEE Trans Power Deliv 2006;21(3):1137–47. [12] Dash PK, Pradhan AK, Panda G, Liew AC. Adaptive relay setting for flexible AC transmission systems (FACTS). IEEE Trans Power Deliv 2000;15(1):38–43. [13] Dash PK, Pradhan AK, Panda G. Distance protection in the presence of unified power flow controller. Elec Power Syst Res 2000;54:189–98. [14] El-Moursi MS, Sharaf AM. Novel controllers for the 48-pulse VSC STATCOM and SSSC for voltage regulation and reactive power compensation. IEEE Trans Power Syst 2005;20(4):1985–97. [15] Sen Kalyan K. SSSC – static synchronous static compensator: theory, modeling, and applications. IEEE Trans Power Deliv 1998;13(1):241–6. [16] Liao Y, Elangovan S. Digital distance relaying algorithm for first-zone protection for parallel transmission lines. IEE Proc Gener Trans Distrib 1998;145(5):531–6. [17] Waikar DL, Elangovan S, Liew AC. Fault impedance estimation algorithm for digital distance relaying. IEEE Trans Power Deliv 1994;9(3):1375–83.
Contents lists available at SciVerse ScienceDirect
Electrical Power and Energy Systems journal homepage: www.elsevier.com/locate/ijepes
Digital distance protection of transmission lines in the presence of SSSC Amir Ghorbani a,⇑, Babak Mozafari a, Ali Mohammad Ranjbar b a b
Department of Electrical Engineering, Science and Research Branch, Islamic Azad University, Tehran, Iran Department of Electrical Engineering, Sharif University of Technology, Tehran, Iran
a r t i c l e
i n f o
Article history: Received 4 April 2010 Received in revised form 8 April 2012 Accepted 17 May 2012 Available online 10 July 2012 Keywords: Distance relay Trip boundary Static Synchronous Series Compensator (SSSC)
a b s t r a c t In this paper the impact of Static Synchronous Series Compensator (SSSC) on the impedance calculated by distance relay is investigated. Analytical results are presented and verified by detailed simulations. Six different phase to phase and phase to ground measuring units of the distance relay are simulated to resemble the behavior of the relay. It is shown in this paper that zero sequence of the injected voltage by 48 pulse SSSC converter has the most impact on the apparent impedance seen by the phase to ground fault measuring unit and cause under reaching of distance relay. It can be concluded from the results that SSSC located in the middle of the transmission line cause to divide trip characteristics of distance relay into two separate parts. It is also shown that the over-reaching operation of distance relay might happen in some cases in the presence of SSSC. All the detailed simulations are carried out in MATLAB/Simulink environment. Ó 2012 Elsevier Ltd. All rights reserved.
1. Introduction The voltage source inverter based series VAr compensator, called Static Synchronous Series Compensator (SSSC), was first introduced by Gyugyi in 1989 [1]. Using the power electronic based technologies, a uniform and versatile shunt and series reactive power control throughout the system as well as bus voltage angle control become possible. SSSC principally can play the role of a pure series capacitive or inductive compensation in a transmission line if the output voltage of its series element lags or leads the transmission line current by 90°. Alternatively, in voltage compensation mode, by adjusting the injected series voltage independent of the current, both active and reactive power of the transmission line can be controlled simultaneously [1]. Taking advantages of the power electronic switches, the SSSC can fast modify system parameters like current and impedance of transmission line. Since distance relay calculates the fault location by measuring current and voltage in transmission line, SSSC can disturb the normal operation of a distance relay. Literature in this field can be divided up into three distinct categories concerning the installation method of the compensators in the network; series compensation impact [2–5], shunt compensation impact [6–9] and series/shunt compensation impact [10–13] on transmission line distance protection. In these work, it is shown that the presence of FACTS compensators in a fault loop affects the apparent impedance seen by the distance relay. In [3,5] the impact of SSSC has been investigated for phase to ground faults. The study first deals with the impact of SSSC on ⇑ Corresponding author. 0142-0615/$ - see front matter Ó 2012 Elsevier Ltd. All rights reserved. http://dx.doi.org/10.1016/j.ijepes.2012.05.035
the calculated impedance by a distance relay. In the next stage, SSSC is simulated in detail based on 48-pulsed voltage source converters. Analytical results are validated using the simulations. In [7,8], the performance of distance relays in the presence of shunt FACTS compensation devices, i.e., SVC and STATCOM. The work in [10] presents the impacts of VSC-based FACTS controllers on distance relays while controlling the power flow of compensated lines are evaluated analytically and by detailed simulations for different fault types and locations. In [11], an apparent impedance calculation procedure for a transmission line with UPFC based on the power frequency sequence component is investigated. In this work, it is shown that despite of the single phase to ground faults, the presence of SSSC in a fault loop cause to overreaching operation of the relay when two-phase to ground faults occur in the system. In other words, whereas the fault is not in the relay zone, relay operates wrongly which this important issue should be considered in relay setting. It is also shown that SSSC located in the middle of the transmission line cause to divide trip characteristics of distance relay into two separate parts. Simulation results include different power system operating conditions, SSSC control system settings and fault scenarios. Finally, a solution is provided to eliminate the impact of SSSC on low resistive phase to ground faults (which is the most probable fault). 2. Sample system modeling The configuration of the under study power system equipped with a SSSC device implemented in MATLAB/Simulink environment is shown in Fig. 1. It contains two series 200 km, 400 kV transmission lines having the following data:
A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
713
Fig. 1. SSSC setup in MATLAB/Simulink environment using the SimPowerSystems toolbox and the Simulink library.
Positive sequence impedance of line I and II: Z1L1 = Z1L2 = 0.0201 + j 0.2868 O/km. Zero sequence impedance of line I and II: Z0L1 = Z0L2 = 0.1065 + j 0.8671 O/km. Positive sequence impedance of sources G and H: Z1G = 1.7431 + j 19.424 O, Z1H = 0.8716 + j 9.7120 O. Zero sequence impedance of sources G and H: Z0G = 2.6147 + j 4.886 O, Z0H = 1.3074 + j 2.4430 O. System frequency = 60 Hz. Load angle between sources = 20°. Amplitude ratio between the magnitudes of the source voltages at G and H = 1.0526.
3. SSSC specifications and control system In this paper the model of SSSC has been put in based on a 48pulse voltage source converter so as to improve power quality and reduce harmonic effects. A ± 100 Mvar SSSC device is connected in series with a 400-kV transmission line through four phase-shifting transformers [14].
Fig. 2 shows the control block diagram of the used SSSC. An instantaneous three phase set of line voltages, at B1_SSSC bus is used for calculation of the reference angle h = xt based on which the compensating voltage, Vinj, is decomposed into its real or direct component, Vd and reactive or quadrature component, Vq. The compensating voltage, Vinj is controlled by a simple closed loop controller. The absolute value of the reference voltage, VRef is compared to the measured magnitude of the injected voltage, Vinj and the amplified difference (error) is passed through a PI controller and then is added, as a correction angle Da, to the synchronizing signal h = xt. An instantaneous three phase set of measured line currents, I is decomposed into its real or direct component, Id and reactive or quadrature component, Iq and then the relative angle, of the line current with respect to the Phase-Lock-Loop angle, are calculated. The phase shifter is operated from the output of polarity detector which determines whether reference, VRef is positive (capacitive compensation mode) or negative (inductive compensation mode). Depending on the polarity of Da, angle h and consequently the converter gate drive signals will be advanced or retarded and, thereby the compensating voltage, Vinj will be shifted with respect to the prevailing line current from its original + p/2 or
Fig. 2. Control block diagram of a SSSC.
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p/2 phase position. This phase shift will cause the converter to absorb real power from the AC system for the DC capacitor or, vice versa supple that to the AC system from the DC capacitor. As a result, the voltage of the DC capacitor will increase or decrease, causing a corresponding change in the magnitude of the compensating voltage. Once the desired magnitude of Vinj is reached the substantially quadrature relationship between the line current and compensating voltage gets reestablished with only a remaining small, steady angular difference necessary to absorb power from the AC system to replenish the operating losses of the converter [14,15].
(a)
4. Analysis of SSSC impact on the measured impedance by distance relay Fig. 3 show the positive, negative and zero-sequence networks of the sample system of Fig. 1, respectively, with the shunt compensator in the middle of line I. Distance relay is installed at bus P to protect the associated transmission line I. The following definitions have been done for convenience [16]: V0p, V1p, V2p V0inj, V1inj, V2inj V0E, V1E, V2E I0p1, I1p1, I2p1 I0p2, I1p2, I2p2 I0q1, I1q1, I2q1 Z0L1, Z1L1 Z0L2, Z1L2 Z0G, Z1G, Z0H, Z1H Rf X
are sequence phase voltages at relay location at Bus P are sequence phase voltages injected by SSSC are sequence phase voltages at fault location E are sequence phase currents through line I at relay location at Bus P are sequence phase currents through line II at relay location at Bus P are sequence phase currents through line I at Bus Q are sequence impedances of the line I are sequence impedances of the line II are sequence impedance of sources G and H respectively is fault resistance is fault per-unit distance from the relay location
For positive sequence network according to Fig. 3, following equations can be derived for lines I and II for a fault at B with the fault resistance Rf:
(b)
(c) Fig. 3. Sequence networks of the system; (a) positive sequence network; (b) negative sequence network; and (c) zero sequence network.
where:
k0 ¼ Z 0L2 =Z 0L1
ð8Þ
V 1p ¼ xZ 1L1 I1p1 þ Rf ðI1p1 þ I1q1 Þ þ V 1E þ V 1inj
ð1Þ
4.1. Single phase to ground fault
V 1p ¼ Z 1L2 I1p2 þ ð1 xÞZ 1L1 I1q1 þ Rf ðI1p1 þ I1q1 Þ þ V 1E
ð2Þ
For a single phase to ground fault (A–G) following equations can be used:
Extracting V1E from (2) and replacing it in (1) we have:
I1q1 ¼
x V 1inj k1 I1p1 þ I1p2 ð1 xÞ ð1 xÞZ 1L1 ð1 xÞ
ð3Þ
V 0E þ V 1E þ V 2E ¼ 0 By using (5)–(7) and (9) we have:
where:
k1 ¼ Z 1L2 =Z 1L1
ð4Þ
V A—G ¼ xZ 1L1 Ip1 þ xðZ 0L1 Z 1L1 ÞI0p1 þ þ ðK 1 K 0 ÞI0p2 þ DV A—G
By substituting (3), in (1), the following equation is obtained:
V 1p
Rf V 1inj ¼ xZ 1L1 I1p1 þ V 1inj þ k1 I1p2 þ V 1E I1p1 þ ð1 xÞ Z 1L1
ð5Þ
The negative and zero sequence voltages are obtained from Fig. 3 in the same way:
V 2p
Rf V 2inj ¼ xZ 1L1 I2p1 þ V 2inj þ k1 I2p2 þ V 2E I2p1 þ ð1 xÞ Z 1L1
ð6Þ
Rf V 0inj k0 I0p2 þ V 0E I0p1 þ ð1 xÞ Z 0L1
ð7Þ
V 0p ¼ xZ 0L1 I0p1 þ V 0inj þ
ð9Þ
Rf ½Ip1 K 1 Ip2 ð1 xÞ ð10Þ
where:
V 0p1 þ V 1p1 þ V 2p1 ¼ V A—G
ð11Þ
I0p1 þ I1p1 þ I2p1 ¼ Ip1
ð12Þ
I0p2 þ I1p2 þ I2p2 ¼ Ip2
ð13Þ
V 0inj þ V 1inj þ V 2inj ¼ V inj
ð14Þ
and:
A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
DV A—G ¼ V inj þ
Rf V inj 1 1 þ V 0nj Z 0L1 Z 1L1 ð1 xÞ Z 1L1
ð15Þ
For a single phase to ground fault (A–G), the apparent impedance is obtained by using the above equations:
Z A—G
V A—G V A—G ¼ ¼ Ip1 þ ½ðZ 0L1 Z 1L1 Þ=Z 1L1 I0p1 IA—G
ð16Þ
Rf ½Ip1 k1 Ip2 þ ðk1 k0 ÞI0p2 þ DZ A—G ð1 xÞIA—G
ð17Þ
When there is no series compensation DZA–G in (17) is zero and the apparent impedance is the same as uncompensated lines, so DZA–G depends on the series compensator and equals:
DZ A—G ¼
Rf V inj V inj 1 1 þ þ V 0inj Z 0L1 Z 1L1 IA—G ð1 xÞIA—G Z 1L1
ð18Þ
It is clear in (18), the presence series compensator in fault loop effects in calculated impedance by relay. When the fault distance from the relay is 0.5 p.u or the series compensator does not presence in fault loop, the effect of it in impedance ZA–G is only by Rf. 4.2. Phase to phase fault For a phase to phase fault (A–B) we have:
V 1E ¼ aV 2E
ð23Þ
In above equation, DZA–B depends on presence series compensator and it is equal to:
Rf ðV 1inj aV 2inj Þ ðV 1inj aV 2inj Þ þ IA—B Z 1L1 ð1 xÞIA—B
ð24Þ
In above equation Rf is fault resistance between two phases. According to (24) for Rf = 0, series compensator impact is due to the negative and positive sequence voltage differences. 4.3. Distance relay modeling The distance relay model is developed according to (16) for a single phase A–G fault and (22) for phase to phase A–B fault, where three phase voltages and currents are passed through anti–aliasing low-pass filters [17], then the phasors are extracted using Full Cycle Discrete Fourier Transform (FCDFT). Finally, after calculating the positive, negative and zero sequence components of the estimated phasors, the apparent impedances for the six measuring units (A–G, B–G, C–G, A–B, B–C, and C–A) are evaluated [16,17]. The distance relay function which is emulated using MATLAB/Simulink tool is shown in Fig. 4. This figure exhibits only A–G measuring unit as demonstrated in Eq. (16).
ð19Þ 5. Simulation results
where:
a ¼ 0:5 þ j0:886
ð20Þ
From (5), (6), and (19) we have:
V 1p aV 2p ¼ xZ 1L1 ðI1p1 aI2p1 Þ þ ðV 1inj aV 2inj Þ Rf ðV 1inj aV 2inj Þ þ k1 ðI1p2 aI2p2 Þ ðI1p1 aI2p1 Þ þ ð1 xÞ Z 1L1 ð21Þ The apparent impedance for a phase to phase (A–B) fault is as:
Z A—B ¼
Rf ½ðI1p1 aI2p1 Þ k1 ðI1p2 aI2p2 Þ ð1 xÞIA—B
þ DZ A—B
DZ A—B ¼
From (10) and (16) we have:
Z A—G ¼ xZ 1L1 þ
Z A—B ¼ xZ 1L1 þ
715
V 1p aV 2p V 1p aV 2p ¼ I1p1 aI2p1 IA—B
By substituting (21) in (22), we will have:
ð22Þ
SimPowerSystems is an enrichment design tool under simulink environment in MATLAB often used for modeling and simulating a power system. It has been employed to study the performance of a traditional distance relay in a typical power system equipped with a SSSC. Fig. 5 shows the digital simulation results. At 0.15 s, an inductive compensation of 0.07 per unit is requested. The inverter output 48-pulse voltage, Vinj_a, of phase a leads the line current, Ia, by almost 90°. As the inductive compensation demand increases, the line current, Ia, and the power flow, P1, and Q1, in the transmission line decrease. At 0.31 s, a capacitive compensation of 0.1 per unit is requested. The inverter voltage, Vinj_a, lags the line current, Ia, by almost 90°. As the capacitive compensation demand increases, the line current, Ia, and the power flow, P1, and Q1, in the
Fig. 4. Distance relay model (only A–G measuring unit).
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1.5
0.15 IVinjI
P1
Amplitude (p.u)
Amplitude (p.u)
1 0.5 0 -0.5 Q1
0.1 0.05 0
Vinj-a
-1
Vinj-q
-0.05 Ia
-1.5 0.1
0.15
0.2
0.25
0.3
Vinj-d
0.35
0.4
0.4
0.41
0.42
0.43
0.45
0.44
0.46
Time (Sec)
Time (sec)
Fig. 7. Output signal of |Vinj| calculator section in SSSC control system.
Fig. 5. Performance of a SSSC.
The SSSC three phase output voltages are shown in Fig. 6 for an A–G fault occurring at a distance of 120 km from the relay point and the SSSC reference voltage is kept to 0.1 p.u, VRef = 0.1 p.u. As shown in Fig. 6, the amplitude of the injected three phase voltage in the line increases immediately after fault occurrence. This is due to the fact that the SSSC control system is trying to regulate all three phase output voltages simultaneously by rapidly injecting reactive power to the system. So, after an A–G fault all three phases have been compensated. As mentioned earlier, SSSC compensates for the voltage independent of the line current in the form of series voltage [1]. However, referring to Fig. 6 it can be observed that all three phase output voltages of SSSC have been increased from their previously specified values (0.1 p.u). This fact can be clarified by investigating output signal of |Vinj| calculator section in SSSC control system. This output is shown in Fig. 7. It can be seen that SSSC has held the output voltage value at the previously set value (0.1 p.u). In order to analyze the impact of internal settings of SSSC on the performance of distance relay, the apparent impedances seen by the relay with and without SSSC have been drawn and compared for different values of SSSC reference voltage, VRef, in Fig. 8. The figure shows the apparent impedance trajectories when phase A to ground fault occurs in right side of SSSC and in 120 km away from the relay point for SSSC setting values of 0.05 and 0.1 p.u. As it can be clearly seen, the relay under reaches in both cases. Apparent impedance, as a function of time, are shown separately in Figs. 9 and 10. According to Figs. 9 and 10 as what has been explained before, it can be concluded that before fault oc-
Apparent Reactance (ohm)
5.1. Single phase to ground fault (A–G)
120 With SSSC (VRef =0.1)
100
With SSSC (VRef = -0.05) Without SSSC
80 60 40 20 Zone 1
0 -60
-40
-20
0
20
40
60
80
100
120
Apparent Resistance (ohm) Fig. 8. Apparent impedance calculated by the A–G measuring unit of the relay for an A–G fault occurred 120 km from the relay point.
120
Apparent Reactance (ohm)
transmission line increase. It can also be observed that the SSSC has, as expected, an excellent (subcycle) response time.
100 80 60 40 20 0
Without SSSC With SSSC (VRef =0.1)
-20
With SSSC (VRef = -0.05)
-40
0.4
0.45
0.5
0.55
0.6
Time (Sec)
Amplitude (p.u)
Fig. 9. Apparent reactance for an A–G fault occurred at 0.4 s at 120 km from the relay point.
0.8
Va-inj
0.6
Vb-inj Vc-inj
0.4 0.2 0 -0.2 -0.4 -0.6 A-G fault occurred
-0.8 0.39
0.4
0.41
0.42
0.43
0.44
0.45
Time (Sec) Fig. 6. 48-Pulse converter output three phase voltage for an A–G fault occurred 120 km from the relay point and VRef = 0.1 p.u.
curred at 0.4 s, SSSC decreases line reactance in capacitive compensation mode (VRef = 0.1 p.u) and increases line reactance in inductive compensation mode (VRef = 0.05 p.u). According to Fig. 6, it can be observed that after happening the fault, all three phases of the SSSC output voltage vary coincidently. In other words, the injected zero sequence component of the SSSC voltage increases, thereby V0inj forms the main part of Vinj in Eq. (18). Obtained from analytic synthesizes, SSSC impact on the calculated impedance can be expressed by Eq. (18). One way to validate the achieved analytical formula is to compare the apparent impedance calculated by this formula with the results obtained from direct simulation of phase to ground fault measuring unit; but its value (DZA–G) is subtracted from the calculated impedance by the phase
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A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
80 With SSSC (V Ref =0.1)
80
With SSSC (V Ref = -0.05)
70
Without SSSC
60 50 40 30 20 10 0
0.4
0.42 0.44 0.46 0.48
0.5
0.52 0.54 0.56 0.58
Apparent Reactance (ohm)
Apparent Resistance (ohm)
90
With SSSC VRef = -0.1 p.u
60 50 40 30 20 10 0
0.6
Without SSSC With SSSC VRef =0.2 p.u
70
Zone 1
-40
-20
Time (Sec)
0
20
40
60
Apparent Resistance (ohm)
Fig. 10. Apparent resistance for an A–G fault occurred at 0.4 s at 120 km from the relay point.
Fig. 12. Apparent impedance calculated by the A–B measuring unit of the relay for an A–B–G fault occurred 190 km from the relay point.
to ground fault (A–G) measuring unit. The final calculated impedance with this consideration and the calculated impedance without presence of SSSC are shown in the Fig. 11. It can be observed that both of them have the same final value. Therefore it can be concluded that SSSC impact is due to Eq. (18). To show the impact of V0inj in the calculated impedance, this time only V0inj value is subtracted from the calculated impedance by the phase to ground fault (A–G) measuring unit. The resulted calculated impedance is shown in Fig. 11. It can be seen that in this case SSSC has a small impact on the calculated impedance. In other words, the most significant part of SSSC impact on the calculated impedance is due to zero sequence of the injected voltage.
trast to single phase to ground faults. Calculated apparent impedance by the A–B measuring unit is shown in Fig. 13 for the A–B fault occurred at 158 km from the relay point. According to the simulations, SSSC in capacitive compensation mode causes to decrease impedance and as a result leads to over-reach the relay. Bigger values of VRef causes more over-reach. SSSC in inductive compensation mode cause to increase impedance and as a result under-reach the relay. The amounts of under-reach and over-reach for A–B faults are less than the ones for A–G and A–B–G faults. The reason is that for the lower values of positive and negative sequences of the SSSC injected voltage for A–B faults and on the other hand zeros sequence of the SSSC injected voltage has less effect on the calculated impedance by the phase to phase fault measuring unit.
5.2. Double phase to ground fault (A–B–G) 55
Apparent Reactance (ohm)
In this section A–B–G fault is considered. The calculated impedance by the A–B measuring unit is shown in Fig. 12 for A–B–G fault located at 190 km from the relay point once for VRef = 0.2 and again for 0.1 p.u. It can be observed that existence of SSSC caused the relay to over-reach. The more the compensation ratio the more over-reach will be caused. For example SSSC in operating modes VRef = 0.2 and VRef = 0.1 causes the relay to over-reach for the faults in 160–198 km and 160–171 km, respectively. SSSC in inductive compensation mode causes the relay to under-reach just like the single phase to ground fault. The more compensation ratio will cause the more under-reach.
50 45 40 With SSSC (VRef = -0.05)
35
With SSSC (VRef = 0.1)
Zone 1
30 -15
-10
5.3. Phase to phase fault (A–B)
100 80 60 40 20 Zone 1
0
20
40
60
80
100
120
Apparent Resistance (ohm) Fig. 11. Apparent impedance for an A–G fault occurred at 120 km from the relay point and with/without voltage compensation.
Apparent Reactance (ohm)
Apparent Reactance (ohm)
Without SSSC With SSSC & Z-delta(Z) With SSSC With SSSC & Z-Z0inj
-20
5
10
15
20
Fig. 13. Apparent impedance calculated by the A–B measuring unit of the relay for an A–B fault occurred 158 km from the relay point.
120
-40
Without SSSC
0
Apparent Resistance (ohm)
In this section investigations are presented for phase to phase fault (A–B). SSSC has less impact for phase to phase faults, in con-
0 -60
-5
55 50 45 40 35 30 25 20 15 10 5 0
Load Angle= 20 Deg Load Angle= 70 Deg
Zone 1
-30
-20
-10
0
10
20
30
40
50
Apparent Resistance (ohm) Fig. 14. Apparent impedance calculated by the A–G measuring unit of the relay for an A–B fault occurred 105 km from the relay point.
A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
There are some special cases for A–B fault in which SSSC cause the relay to detect A–G faults wrongly. This can happen for large values of VRef when SSSC is in capacitive compensation mode. For example, the calculated impedance by A–G measuring unit of relay is shown in Fig. 14 for an A–B fault occurred at distance 105 km for two different values of system load angle. The circumstances in which relay wrongly detects A–G fault, happens more times for bigger values of load angles. The other measuring unit that wrongly detects for A–B fault, is B–G measuring unit. This factor is shown in Fig. 15 for an A–B fault located at 105 km. This factor mainly depends on Rf (resistance of fault between two phases). For larger values of Rf the distances for which relay detects wrong faults will be more.
b
70
With SSSC(VRef =0.2)
60
B
50 C
40 A
30 20
D
c
d
10 0 0
50
100
150
200
250
Apparent Resistance (ohm)
Apparent Reactance (ohm)
The trip characteristics of the relay is obtained by keeping the system operating conditions constant, while fault location (0– 95% length of transmission line I) and fault resistance Rf (from 0– 200 O) are varied [12,14]. Fig. 16 shows the trip characteristics without presence SSSC that has been calculated by A–G measuring unit. Impact of SSSC on trip characteristics are shown in Figs. 17 and 18 for different working modes of SSSC. SSSC divides the trip characteristics into two different sections. The first is related to the faults occurring between 0 to 100 km and SSSC is not present in the fault loop. According to the equation, impact of the SSSC is due to Rf for faults occurred between 0 to 100 km and for the larger values this impact is more. This fact can be observed in Figs. 17 and 18. The second part is related to the faults occurred between 100 and 190 km therefore, SSSC is fault loop which is shown with (a–
110 100 90 80 70 60 50 40 30 20 10 0
Without SSSC With SSSC(VRef = -0.1)
a
With SSSC(VRef = -0.05)
b
c B
d C
A D
0
50
100
150
200
250
300
350
400
450
Apparent Resistance (ohm) Fig. 18. Trip characteristic with/without SSSC for A–G fault and SSSC in inductive compensation mode.
60
Apparent Reactance (ohm)
Without SSSC With SSSC(VRef =0.1)
a
80
Fig. 17. Trip characteristic with/without SSSC for A–G fault and SSSC in capacitive compensation mode.
5.4. Trip characteristics
Rf =1 ohm Rf =3 ohm
50
b–c–d). The results without SSSC (A–B–C–D) are also contained for comparison. Comparing Figs. 17 and 18 it can be concluded that impact of SSSC is bigger in inductive compensation mode. It is also shown that SSSC under-reaches the relay for all the A–G faults.
40 30 20 10
6. Conclusion
Zone 1
0 -40
-30
-20
-10
0
10
20
30
40
50
Apparent Resistance (ohm) Fig. 15. Apparent impedance calculated by the B–G measuring unit of the relay for an A–B fault occurred 105 km from the relay point.
60
Apparent Reactance (ohm)
90
Apparent Reactance (ohm)
718
50 Rf =0-200 ohm & 95% Line Length
40 30 Rf =0 ohm & 0-95% Line Length
20
Rf =200 ohm & 0-95% Line Length
10 Rf=0-200 ohm & 0% Line Length
0 0
50
100
150
200
250
Apparent Resistance (ohm) Fig. 16. Trip characteristic without SSSC for A–G fault.
300
In this paper, it has been shown that existence of SSSC in a fault loop causes to some deviations in the relay calculated impedance. The most significant impact of SSSC is sensible for phase to ground faults which is more observable when it is working in inductive compensation mode. For the phase to ground faults SSSC causes to under-reach the distance relay. There are some cases in two phase to ground and phase to phase faults that SSSC causes to over-reach the distance relay, in contrast to the case of phase to ground faults. To mitigate the impact of SSSC on the calculated impedance a supplementary part can be added to the distance relay which can be used to measure DZ from SSSC output voltages. The measured DZ can be subtracted from the calculated impedance to obtain the real impedance. This method can be easily applied when SSSC is located in the beginning of transmission line. However, when SSSC is located in the middle of the line using remote signals can be the possible solution. From the results described in the preceding section, it can be observed that the trip boundaries of the relay phase to ground fault measuring units are influenced by the presence of the SSSC. Thus to provide a suitable trip boundary for the relay phase to ground fault measuring units, the boundary needs to be manipulated adaptively with the voltage injected by SSSC.
A. Ghorbani et al. / Electrical Power and Energy Systems 43 (2012) 712–719
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