- Email: [email protected]
Digital predistorter with improving index accuracy of lookup table based on FPGA
Integration, the VLSI Journal xxx (xxxx) xxx
Contents lists available at ScienceDirect
Integration, the VLSI Journal journal homepage: www.elsevier.com/locate/vlsi
Digital predistorter with improving index accuracy of lookup table based on FPGA Jijun Ren School of Communication and Information Engineering, Xi'an University of Posts and Telecommunications, Xi'an, China
A R T I C L E I N F O
A B S T R A C T
Keywords: Digital predistortion (DPD) Power amplifiers Linearization Look-up table (LUT) Taylor series
In this paper, a method of function approximation for improving index accuracy of the lookup table (LUT) of digital predistortion (DPD) is proposed to obtain more accurate linearization. The algorithm utilizes approximation of the LUT with the method of Taylor Series. The power values of forward signals are divided into integers and decimals, and the corresponding LUTs are indexed respectively. The index predistortion values of forward signals are approximated by Taylor series, which improves the index accuracy of LUT significantly. Experiment shows that the performance of a DPD system is improved.
1. Introduction Wireless communication radio systems are increasingly more sensitive to diverse sources of linear and nonlinear distortions. Power amplifier (PA) plays an important role in modern communication system, which amplifies the modulated radio frequency (RF) signal to the power level specified for transmission [1]. Nonlinearity which exists in all kinds of PAs means the distortion (including amplitude and phase distortion) to the amplified signals. It is a critical component and inherently non-linear device of modern wireless base stations, will inevitably lead to loss of adjacent spectrum, adjacent interference, and the crossing intermodulation, in-band distortion as well as out-of-band spectral growth in the transmitted signal [2]. Volterra series is widely used to describe the nonlinearity PA with memory effect [3,4]. Most PA models have their roots in the Volterra series [5–7], which can be viewed as a power series with memory. However, it is difficult to be used for implementation directly because of its huge number coefficients of polynomial terms. In practical engineering application, Volterra series requires a simplification from the computational aspects. Memory polynomial model (MPM) is one of simplified Volterra series [8]. An efficient way to implement these polynomials is to use the structure of LUT [9,10]. However, although LUT greatly reduces the complexity of MPM implementation, it is still difficult to meet the requirements of accurately describing the real characteristics of communication systems. In the recent two decades, the DPD has been exhaustively studied by many researchers, and their results have appeared in a myriad of the
literature [11–14]. However, most of the literature only contain the descriptions of the implementation in a quite ideal situation, lacking of the DPD to a real engineering system. As a result, it is desirable to study the implications of applying the DPD in a practical application scenario, such as the multi-channel transmitter. For multi-channel transmitters with different users on different carriers, these carriers will be occasionally shut down and opened during the operation of the actual system, which makes the change of the transmitted signal more complex and destructive. This characteristic of the signal adds another dimension of variation and has a significant impact on the DPD design because not only the average power, but also the probability distribution, the peak-to-average power ratio (PAPR) or even the bandwidth varies over time. A real-time LUT predistorter with a high-precision of the Taylor series approximation for multi-channel transmitters is proposed in this paper and herein the FPGA implementation issues are presented. This paper is organized as follows. Section 2 discusses detailed issues about the DPD algorithm and architecture. Section 3 presents the DPD control system and architecture. Section 4 presents the Taylor series approximation method to improve the index accuracy of LUT of proposed DPD implemented by FPGA. Experimental results are shown in Section 5, followed by a brief conclusion in Section 6. 2. DPD algorithm and architecture DPD is a classic example of a mixed-domain control system, in which the controller is implemented in digital hardware to control the RF signal. The DPD is a part of the digital baseband system, where the PA output
E-mail address: [email protected]. https://doi.org/10.1016/j.vlsi.2019.11.004 Received 29 July 2019; Received in revised form 12 October 2019; Accepted 10 November 2019 Available online xxxx 0167-9260/© 2019 Elsevier B.V. All rights reserved.
Please cite this article as: J. Ren, Digital predistorter with improving index accuracy of lookup table based on FPGA, Integration, the VLSI Journal, https://doi.org/10.1016/j.vlsi.2019.11.004
J. Ren
Integration, the VLSI Journal xxx (xxxx) xxx
coefficients of polynomial terms with the kth polynomial order and the qth memory depth (time delay). When the max memory depth Q ¼ 0, Equation (2) can be rewritten as:
is compared with the input, which means the system requires a feedback path. The coefficient of the DPD estimation is carried out in the digital domain. The basic action of the DPD can be considered to be opposite to the compression gain of the PA, that is to provide gain expansion. The DPD adds high-order signal components to offset the intermodulation distortion produced by the PA, thereby increasing the bandwidth of the signal input to the PA. Gain and bandwidth extension are features of DPDs, which makes DPD difficult.
zðnÞ ¼
K 1 X
ak;0 xðnÞjxðnÞjk
(5)
k¼1
Equation (5) represents the conventional memoryless polynomial model. The output depends only upon the present input. MPM gives a good characterization for memory effect of PA. Note that Equation (2) can be expressed equivalently as
2.1. Lookup table predistorter
zðnÞ ¼
The work of Cavers and coworkers in the 1990s established the use of LUTs as a viable, low-cost, fast-adapting predistorter technique [15]. The basic approach is to use a complex gain-based LUT to approximate the inverse of the PA's AM-to-AM (gain) and AM-to-PM (phase) characteristics, so the LUT are essentially memoryless. More recently, multiple LUT approaches have been adopted for predistortion of PA with memory effect [16].
Q X
xðn qÞ
q¼0
K 1 X
ak;q jxðn qÞjk
(6)
k¼1
At the same time, odd-order terms generate only odd-order harmonic and intermodulation, while even-order terms produce only even-order harmonic and intermodulation. It can be proved by mathematical deduction that only odd-order intermodulation falls in the signal band. Other distortion which is outside of the signal band and can be filtered. For this reason, the even-order terms are negligible and consequently. Equation (6) is simplified as follows:
2.2. Memoryless model based on LUT As shown in Fig. 1, the LUT is a memoryless model that describes a nonlinear system used in the form of gain response for different input powers. PðxðnÞÞ means the instant power calculation of x(n) and acts as the address index of the LUTðPðxðnÞÞÞ containing the corresponding polynomial coefficients. Therefore, the instant output signal zðnÞ of memoryless DPD model is obtained as follows:
zðnÞ ¼
Q X
xðn qÞ
q¼0
zðnÞ ¼
Q X
K=21 X
ak;q jxðn qÞj2k ðK ¼ evenÞ
k¼1
xðn qÞ
q¼0
ðK1Þ=2 X
ak;q jxðn qÞj2k ðK ¼ oddÞ
k¼1
Define LUTq ðjxðn qÞjÞ ¼
zðnÞ ¼ xðnÞ*LUTðPðxðnÞÞÞ
X ak;q jxðn qÞj2k k¼0
Therefore, we can obtain
2.3. MPM based on look-up table Volterra series can be used to depict nonlinear system with memory, the expression of which is given by zðnÞ ¼
Nd D X X d¼1
i1 ¼0
⋯
Nd X id ¼0
Yd hði1 ; ⋯; id Þ j¼1 x n ij
zðnÞ ¼
Q K 1 X X
ak;q xðn qÞjxðn qÞjk
3. DPD control system architectures The DPD system works by comparing the output of the PA with the desired input signal and driving the difference to zero by adjusting the coefficients of the nonlinear model in the DPD LUT. Due to the slow timevarying characteristics of transistors (device aging and temperature drift), the DPD LUT needs to be updated and optimized in a process of constant correction and iteration. Such a DPD is referred to as open-loop [17]. The well-established least squares (LS) algorithm is widely applied for open loop DPD parameter estimation Although the physical conditions of PA change slowly, the amplifiers in commercial transmitters are time-varying in terms of base band, mainly because PA has different characteristics under different input excitation signals [18,19]. Therefore, open-loop DPD cannot respond quickly to the change of signal characteristics while satisfying the requirement of stable signal.
(2)
k¼0 q¼0
where (3)
zðnÞ ¼ Iout ðnÞ þ jQout ðnÞ
(4)
(7)
LUTq ðjxðn qÞjÞ means a LUT containing the corresponding polynomial coefficients for delay q. And xðn qÞ acts as the address index of the LUT. The construction of the MPM based on LUT is illustrated in Fig. 2. Both order K and memory depth Q (equal to the number of delay branch) are two key factors for modeling the characterizing of PA with memory effect. Obviously, with the order and memory depth increase, the approximation of PA model will be more accurate. However, the model complexity will increase considerably at the same time.
(1)
xðnÞ ¼ Iin ðnÞ þ jQin ðnÞ
xðn qÞLUTq ðjxðn qÞjÞ
q¼0
xðnÞ is the time domain input signal of a non-linear system; zðnÞ is the output of a nonlinear system; d denotes the order and D denotes the maximum value of d; ij represents the memory delay corresponding to the j item in the order d; hði1 ; ⋯; id Þ represents the corresponding weighting coefficients for each item; Nd represents memory depth, Nd 1 denotes the maximum positive integer that ij can be taken, i.e. the maximum memory delay considered. PA model is referred to as memory if the output z(n) at time n is related to the present and up to Q previous input samples. As one of simplified Volterra series, MPM can be expressed as: zðnÞ ¼
Q X
In Equations (3) and (4), xðnÞ and zðnÞ, which consist of in-phase component in Iin ðnÞ and quadrature-phase component in Qin ðnÞ, are baseband input and output signal respectively. ak;q denotes the
2
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Integration, the VLSI Journal xxx (xxxx) xxx
Fig. 3 is a schematic diagram of the predistortion system. As shown in Fig. 3, the predistortion system consists of two channels: The data training channel is a loop structure, the core of which is the estimator to adapt the predistortion algorithm. By processing the feedback signal and the original input signal, the estimator module is used to obtain the DPD parameters. The predistortion algorithm of complex gain is taken as an example, the forward signal xðnÞ is multiplied with the predistortion value to obtain the predistortion signal LUTðXÞ. In the ideal case, when the signal of LUTðxðnÞÞ is fed to the amplifier, the final output will be equal to HðLUTðxðnÞÞÞ.
Fig. 1. Memoryless diagram block with LUT.
4. Improved index accuracy of LUT by Taylor Series method In mathematics, the function approximation of Taylor series is an infinitely differentiable real variable function fðxÞ, defined as Equation (8): ∞ X f ðnÞ ðaÞ n¼0
n!
ðx aÞn
(8)
, where the n! means the factorial of n, f ðnÞ ðaÞ means the n order derivative of fðxÞ at a: The two characteristics of the Taylor series are important for us to use used. One is that the Taylor series can be used to approximate the value of a function, which is the rationale for the approximation of the predistortion value. The other is the derivation and integral of power series can be carried out one by one, which is the theoretical basis for hierarchical indexing and summation. For the predistortion system using the LUT method, the LUT records the forward signal power as an index value. In the paper, the index value is x, and the corresponding predistortion value is fðxÞ. Find the infinite differentiable real variable function fðxÞ for the function fðxÞ, given the 1st order Taylor approximation formula, as shown in Equation (9): fðxÞ fðxk1 Þ þ f ð1Þ ðxk1 Þðx xk1 Þ
Fig. 2. MPM diagram block with LUT.
(9)
To improve the accuracy of approximation, the 2nd order Taylor series approximation formula is obtained as follows: fðxÞ fðxk1 Þ þ f ð1Þ ðxk1 Þðx xk1 Þ þ
1 ð2Þ f ðxk1 Þðx xk1 Þ2 2!
Fig. 3. Schematic diagram of the predistortion system with two channels.
(10)
Similarly, the nth order Taylor approximation formula can also be obtained based on the above theoretical basis. We use the memoryless DPD model as the example to express the method of improving index accuracy of LUT. Based on that, the memory DPD model is easily obtained. The LUT function of memoryless DPD model can be expressed as shown in formula (11): LUTðxÞ ¼ a0 þ a1 x þ a2 x2 þ a3 x3 þ a4 x4 þ a4 x5 þ ⋯
(11)
ðnÞ
LUT ðxÞ means the n order derivative of LUTðxÞ, then we can obtain the Equation (12) of LUT ð1Þ ðxÞ and Equation (13) of LUT ð2Þ ðxÞ: LUT ð1Þ ðxÞ ¼ a1 þ 2a2 x þ 3a3 x2 þ 4a4 x3 þ 5a5 x4 þ 6a6 x5 þ ⋯
(12)
LUT ð2Þ ðxÞ ¼ 2a2 þ 6a3 x þ 12a4 x2 þ 20a5 x3 þ 30a6 x5 þ ⋯
(13) ð1Þ
As shown in Fig. 4, LUTðxÞ means the integer LUT, LUT ðxÞ means the 1st order Taylor series decimal LUT and LUT ð2Þ ðxÞ means the 2nd order Taylor series decimal LUT. If we get the power calculation value of 36.6, as shown in Equation (9), xk1 ¼ 36:6.
Fig. 4. Schematic diagram of the LUT with 1st order Taylor series.
Furthermore, we can obtain the 2nd order Taylor series based on the Equation (14) as shown in Fig. 5.
LUTðxÞ LUTð36Þ þ f ð1Þ ð36Þð36 36:6Þ
3
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Integration, the VLSI Journal xxx (xxxx) xxx
Table 1 Accuracy of models using different method. NMSE/dB Without DPD DPD without Taylor series approximation DPD with Taylor series approximation
32.23 45.93 47.57
The normalized mean-squared error (NMSE), defined by the Equation (15), was used to validate the performance of the proposed DPD LUT with Taylor series approximation. NMSEdB ¼ 10log10
! PN yðnÞj2 n¼1 jyðnÞ ~ PN 2 n¼1 jyðnÞj
(15)
, where yðnÞ is the desired output and y~ðnÞ is the simulated output. The results are reported in Table 1. Through the above analysis, it can be concluded that the series approximation method can further improve the index accuracy of DPD LUT on the basis of the existing linear interpolation methods [20,21]. In addition, the proposed method can be implemented without changing the DPD model of the existing system. Although the use of the DPD LUT with 1st, 2nd order Taylor series consumes some additional storage
Fig. 5. Schematic diagram of the LUT with 2nd order Taylor series.
Fig. 7. Diagram of experimental testbed.
Fig. 6. FPGA implementation of DPD LUT with Taylor series approximation.
LUTðxÞ LUTð36Þ þ LUT ð1Þ ð36Þð36 36:6Þ þ
1 LUT ð2Þ ð36Þð36 36:6Þ2 2! (14)
FPGA implementation of digital predistorter with improving index accuracy of LUT by the method of Taylor approximation is shown in Fig. 6. In the real communication system of engineering application, we can use the model of ‘cut 1 bit’ to realize the function of 2!1 , and the ‘square LUT’ to be addressed to calculate the square of decimal part of the power calculation.
Fig. 8. AM–AM and AM–PM of PA output with and without proposed DPD solution. 4
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Integration, the VLSI Journal xxx (xxxx) xxx
resources of the FPGA, it can effectively improve the performance of DPD, and has important practical significance for the subsequent occasions where the performance requirements of DPD are getting higher and higher. 5. Experimental validation In recent years, the ability of the DPD system to handle multicarrier GSM (MC-GSM)/EDGE signals were an important consideration. In terms of dynamic range, noise, and spurious performance, the multicarrier GSM/EDGE signals were an important consideration to provide the most stringent set of specifications to test the ability of the DPD system. The number of carriers is also an important factor: a multitone signal has a higher peak-to-average signal ratio than a single-tone, and so for multicarrier applications, we need to back off the average signal power to prevent clipping in the DAC. We should also remember that the DAC is operating on the predistorted signal, and so the certain margin should be added to accommodate the gain expansion. In practical DPD systems, this gain expansion is often limited to a maximum of 3 dB, to prevent destructive overdrive of the PA. Shown as Fig. 7, the performances are evaluated with an experimental test setup followed by 50 dBm peak output power PA. The test signals are a 4.2 dB PAPR 6-carrier GSM. The center frequency of the test signal is 940.2 MHz. Considering the tradeoff between the complexity and accuracy of the DPD LUT we used, the polynomial order is set to 7, memory depth is set to 5, and only the odd terms are reserved because products of even-order terms fall outside of the occupied band. The AM–AM and AM–PM performance is shown in Fig. 8 The experimental validation of six-carrier GSM is illustrated in Fig. 9. From this figure, we also can see that the maximum allowable levels of noise and distortion as a function of the frequency offset from any GSM/ EDGE carrier in Fig. 9(a). A maximum channel bandwidth for the signal of 10 MHz is considered; the individual GSM carrier bandwidth is 200 kHz. We use the above FPGA implementation of DPD with improving index accuracy of LUT by Taylor series approximation method to the sixcarrier GSM system. Fig. 9(b) shows the result of traditional DPD LUT method without Taylor series approximation, and the Fig. 9(c) shows the method we mentioned can improve the ACPR of six-carrier GSM nearly 3 dB. The results are reported in Table 2. 6. Conclusion We present the method for improving index accuracy of DPD LUT in this paper. The algorithm utilizes approximation of the LUT with the method of Taylor Series. The power values of forward signals are divided into integers and decimals, and the corresponding LUTs are indexed respectively. The index predistortion values of forward signals are approximated by Taylor series, which improves the index accuracy of LUT significantly. The simulation of six-carrier of GSM system shows that when Taylor series satisfies a certain condition, the error is less than the indexing error in any range of the power value of the forward signal. Therefore, the performance of a digital predistortion system is improved nearly 3 dB.
Fig. 9. DPD LUT with Taylor series approximation in real six-carrier GSM system (a) Spectra of PA outputs, (b) Spectra of DPD LUT method without Taylor series approximation, and (c) Spectra of DPD LUT method without Taylor series approximation.
Table 2 ACPR calculations without and with linearization, for different frequency offsets. Lower ACPR offset
Without DPD DPD without Taylor series approximation DPD with Taylor series approximation
Upper ACPR offset
1.2MHz/dBc
2.4MHz/dBc
3.6MHz/dBc
1.2MHz/dBc
2.4MHz/dBc
3.6MHz/dBc
37.12 64.51 67.23
38.56 65.37 66.85
39.47 65.73 68.46
36.23 66.93 69.17
37.89 71.14 70.89
40.73 70.18 73.24
5
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Acknowledgment
[10] F.-L. Luo, Digital Front-End in Wireless Communications and Broadcasting: Circuits and Signal Processing, Cambridge Univ. Press, Cambridge, U.K., 2011. [11] Ahmad Rahati Belabad, S. Sharifian, S.A. Motamedi, An accurate digital baseband predistorter design for linearization of RF power amplifiers by a genetic algorithmbased Hammerstein structure, Analog Integr. Circuits Signal Process. 95 (2) (2018) 231–247. [12] Q. Zhang, W. Chen, Z. Feng, Reduced cost digital predistortion only with in-phase feedback signal, IEEE Microw. Wirel. Compon. Lett. 28 (3) (2018) 257–259. [13] K.J. Muhonen, M. Kavehrad, R. Krishnamurthy, Look-up table techniques for adaptive digital pre-distortion: a development and com-parison, IEEE Trans. Veh. Technol. 49 (5) (2000) 1995–2001. [14] Meenakshi Rawat, et al., Concurrent dual-band modeling and digital predistortion in the presence of unfilterable harmonic signal interference, IEEE Trans. Microw. Theory Tech. 63 (2) (2015) 625–637. [15] Cavers, K.J., Amplifier linearization using a digital predistorter with fast adaptation and low memory requirements, IEEE Trans. Veh. Technol. 39 (4) (1990) 374–382. [16] Albert Molina, K. Rajamani, K. Azadet, Concurrent dual-band digital predistortion using 2-D lookup tables with bilinear interpolation and extrapolation: direct least squares coefficient adaptation, IEEE Trans. Microw. Theory Tech. 65 (4) (2017) 1381–1389. [17] F.M. Ghannouchi, O. Hammi, Behavioral modeling and predistortion, IEEE Mirow. Mag. 10 (7) (2009) 52–64. [18] O. Hammi, F.M. Ghannouchi, Power alignment of digital predistorters for power amplifiers linearity optimization, IEEE Trans. Broadcast. 55 (1) (2009) 109–114. [19] Rahati Belabad Ahmad, Seyed Ahmad Motamedi, Saeed Sharifian, An adaptive digital predistortion for compensating nonlinear distortions in RF power amplifier with memory effects, Integr. VLSI J. 57 (2017) 184–191. [20] Albert Molina, K. Rajamani, K. Azadet, Digital predistortion using lookup tables with linear interpolation and extrapolation: direct least squares coefficient adaptation, IEEE Trans. Microw. Theory Tech. 65 (3) (2017) 980–987. [21] Descamps, Anne Sophie, et al., Digital predistortion technique based on nonuniform MP model and interpolated LUT for linearising PAs with memory effects, Electron. Lett. 50 (24) (2014) 1882–1884.
This research is partially supported by the National Natural Science Foundation of China (Granted Number 61701399). References [1] P. Kryszkiewicz, Amplifier-coupled tone reservation for minimization of OFDM nonlinear distortion, IEEE Trans. Veh. Technol. 67 (5) (2018) 5933–5936. [2] H.D. Rodrigues, T.C. Pimenta, et al., Orthogonal scalar feedback digital predistortion linearization, IEEE Trans. Broadcast. 67 (5) (2018) 319–330. [3] Jos e Cruz Nu~ nezperez, et al., Flexible test bed for the behavioural modelling of power amplifiers, COMPEL Int. J. Comput. Math. Electr. Electron. Eng. 33 (1/2) (2014) 355–375. [4] C ardenas-Valdez, Jose Ricardo, et al., Modeling memory effects in RF power amplifiers applied to a digital pre-distortion algorithm and emulated on a DSPFPGA board, Integr. VLSI J. 49 (2015) 49–64. C. [5] E.G. Lima, T.R. Cunha, H.M. Teixeira, M. Pirola, J.C. Pedro, Base-band derived Volterra series for power amplifier modeling, in: IEEE MTT-S Int. Microw. Symp. Dig, 2009, pp. 1361–1364. [6] Meenakshi Rawat, et al., Generalized rational functions for reduced-complexity behavioral modeling and digital predistortion of broadband wireless transmitters, IEEE Trans. Instrum. Meas. 63 (2) (2014) 485–498. [7] R.N. Braithwaite, Digital predistortion of an RF power amplifier using a reduced Volterra series model with a memory polynomial estimator, IEEE Trans. Microw. Theory Tech. 65 (10) (2017) 3613–3623. [8] D.R. Morgan, Z. Ma, J. Kim, et al., A generalized memory polynomial model for digital predistortion of RF power amplifiers, IEEE Trans. Signal Process. 54 (10) (2006) 3852–3860. [9] P.L. Gilabert, A. Cesari, G. Montoro, et al., Multi-lookup table FPGA implementation of an adaptive digital predistorter for linearizing RF power amplifiers with memory effects, IEEE Trans. Microw. Theory Tech. 56 (2) (2008) 372–384.
6
Contents lists available at ScienceDirect
Integration, the VLSI Journal journal homepage: www.elsevier.com/locate/vlsi
Digital predistorter with improving index accuracy of lookup table based on FPGA Jijun Ren School of Communication and Information Engineering, Xi'an University of Posts and Telecommunications, Xi'an, China
A R T I C L E I N F O
A B S T R A C T
Keywords: Digital predistortion (DPD) Power amplifiers Linearization Look-up table (LUT) Taylor series
In this paper, a method of function approximation for improving index accuracy of the lookup table (LUT) of digital predistortion (DPD) is proposed to obtain more accurate linearization. The algorithm utilizes approximation of the LUT with the method of Taylor Series. The power values of forward signals are divided into integers and decimals, and the corresponding LUTs are indexed respectively. The index predistortion values of forward signals are approximated by Taylor series, which improves the index accuracy of LUT significantly. Experiment shows that the performance of a DPD system is improved.
1. Introduction Wireless communication radio systems are increasingly more sensitive to diverse sources of linear and nonlinear distortions. Power amplifier (PA) plays an important role in modern communication system, which amplifies the modulated radio frequency (RF) signal to the power level specified for transmission [1]. Nonlinearity which exists in all kinds of PAs means the distortion (including amplitude and phase distortion) to the amplified signals. It is a critical component and inherently non-linear device of modern wireless base stations, will inevitably lead to loss of adjacent spectrum, adjacent interference, and the crossing intermodulation, in-band distortion as well as out-of-band spectral growth in the transmitted signal [2]. Volterra series is widely used to describe the nonlinearity PA with memory effect [3,4]. Most PA models have their roots in the Volterra series [5–7], which can be viewed as a power series with memory. However, it is difficult to be used for implementation directly because of its huge number coefficients of polynomial terms. In practical engineering application, Volterra series requires a simplification from the computational aspects. Memory polynomial model (MPM) is one of simplified Volterra series [8]. An efficient way to implement these polynomials is to use the structure of LUT [9,10]. However, although LUT greatly reduces the complexity of MPM implementation, it is still difficult to meet the requirements of accurately describing the real characteristics of communication systems. In the recent two decades, the DPD has been exhaustively studied by many researchers, and their results have appeared in a myriad of the
literature [11–14]. However, most of the literature only contain the descriptions of the implementation in a quite ideal situation, lacking of the DPD to a real engineering system. As a result, it is desirable to study the implications of applying the DPD in a practical application scenario, such as the multi-channel transmitter. For multi-channel transmitters with different users on different carriers, these carriers will be occasionally shut down and opened during the operation of the actual system, which makes the change of the transmitted signal more complex and destructive. This characteristic of the signal adds another dimension of variation and has a significant impact on the DPD design because not only the average power, but also the probability distribution, the peak-to-average power ratio (PAPR) or even the bandwidth varies over time. A real-time LUT predistorter with a high-precision of the Taylor series approximation for multi-channel transmitters is proposed in this paper and herein the FPGA implementation issues are presented. This paper is organized as follows. Section 2 discusses detailed issues about the DPD algorithm and architecture. Section 3 presents the DPD control system and architecture. Section 4 presents the Taylor series approximation method to improve the index accuracy of LUT of proposed DPD implemented by FPGA. Experimental results are shown in Section 5, followed by a brief conclusion in Section 6. 2. DPD algorithm and architecture DPD is a classic example of a mixed-domain control system, in which the controller is implemented in digital hardware to control the RF signal. The DPD is a part of the digital baseband system, where the PA output
E-mail address: [email protected]. https://doi.org/10.1016/j.vlsi.2019.11.004 Received 29 July 2019; Received in revised form 12 October 2019; Accepted 10 November 2019 Available online xxxx 0167-9260/© 2019 Elsevier B.V. All rights reserved.
Please cite this article as: J. Ren, Digital predistorter with improving index accuracy of lookup table based on FPGA, Integration, the VLSI Journal, https://doi.org/10.1016/j.vlsi.2019.11.004
J. Ren
Integration, the VLSI Journal xxx (xxxx) xxx
coefficients of polynomial terms with the kth polynomial order and the qth memory depth (time delay). When the max memory depth Q ¼ 0, Equation (2) can be rewritten as:
is compared with the input, which means the system requires a feedback path. The coefficient of the DPD estimation is carried out in the digital domain. The basic action of the DPD can be considered to be opposite to the compression gain of the PA, that is to provide gain expansion. The DPD adds high-order signal components to offset the intermodulation distortion produced by the PA, thereby increasing the bandwidth of the signal input to the PA. Gain and bandwidth extension are features of DPDs, which makes DPD difficult.
zðnÞ ¼
K 1 X
ak;0 xðnÞjxðnÞjk
(5)
k¼1
Equation (5) represents the conventional memoryless polynomial model. The output depends only upon the present input. MPM gives a good characterization for memory effect of PA. Note that Equation (2) can be expressed equivalently as
2.1. Lookup table predistorter
zðnÞ ¼
The work of Cavers and coworkers in the 1990s established the use of LUTs as a viable, low-cost, fast-adapting predistorter technique [15]. The basic approach is to use a complex gain-based LUT to approximate the inverse of the PA's AM-to-AM (gain) and AM-to-PM (phase) characteristics, so the LUT are essentially memoryless. More recently, multiple LUT approaches have been adopted for predistortion of PA with memory effect [16].
Q X
xðn qÞ
q¼0
K 1 X
ak;q jxðn qÞjk
(6)
k¼1
At the same time, odd-order terms generate only odd-order harmonic and intermodulation, while even-order terms produce only even-order harmonic and intermodulation. It can be proved by mathematical deduction that only odd-order intermodulation falls in the signal band. Other distortion which is outside of the signal band and can be filtered. For this reason, the even-order terms are negligible and consequently. Equation (6) is simplified as follows:
2.2. Memoryless model based on LUT As shown in Fig. 1, the LUT is a memoryless model that describes a nonlinear system used in the form of gain response for different input powers. PðxðnÞÞ means the instant power calculation of x(n) and acts as the address index of the LUTðPðxðnÞÞÞ containing the corresponding polynomial coefficients. Therefore, the instant output signal zðnÞ of memoryless DPD model is obtained as follows:
zðnÞ ¼
Q X
xðn qÞ
q¼0
zðnÞ ¼
Q X
K=21 X
ak;q jxðn qÞj2k ðK ¼ evenÞ
k¼1
xðn qÞ
q¼0
ðK1Þ=2 X
ak;q jxðn qÞj2k ðK ¼ oddÞ
k¼1
Define LUTq ðjxðn qÞjÞ ¼
zðnÞ ¼ xðnÞ*LUTðPðxðnÞÞÞ
X ak;q jxðn qÞj2k k¼0
Therefore, we can obtain
2.3. MPM based on look-up table Volterra series can be used to depict nonlinear system with memory, the expression of which is given by zðnÞ ¼
Nd D X X d¼1
i1 ¼0
⋯
Nd X id ¼0
Yd hði1 ; ⋯; id Þ j¼1 x n ij
zðnÞ ¼
Q K 1 X X
ak;q xðn qÞjxðn qÞjk
3. DPD control system architectures The DPD system works by comparing the output of the PA with the desired input signal and driving the difference to zero by adjusting the coefficients of the nonlinear model in the DPD LUT. Due to the slow timevarying characteristics of transistors (device aging and temperature drift), the DPD LUT needs to be updated and optimized in a process of constant correction and iteration. Such a DPD is referred to as open-loop [17]. The well-established least squares (LS) algorithm is widely applied for open loop DPD parameter estimation Although the physical conditions of PA change slowly, the amplifiers in commercial transmitters are time-varying in terms of base band, mainly because PA has different characteristics under different input excitation signals [18,19]. Therefore, open-loop DPD cannot respond quickly to the change of signal characteristics while satisfying the requirement of stable signal.
(2)
k¼0 q¼0
where (3)
zðnÞ ¼ Iout ðnÞ þ jQout ðnÞ
(4)
(7)
LUTq ðjxðn qÞjÞ means a LUT containing the corresponding polynomial coefficients for delay q. And xðn qÞ acts as the address index of the LUT. The construction of the MPM based on LUT is illustrated in Fig. 2. Both order K and memory depth Q (equal to the number of delay branch) are two key factors for modeling the characterizing of PA with memory effect. Obviously, with the order and memory depth increase, the approximation of PA model will be more accurate. However, the model complexity will increase considerably at the same time.
(1)
xðnÞ ¼ Iin ðnÞ þ jQin ðnÞ
xðn qÞLUTq ðjxðn qÞjÞ
q¼0
xðnÞ is the time domain input signal of a non-linear system; zðnÞ is the output of a nonlinear system; d denotes the order and D denotes the maximum value of d; ij represents the memory delay corresponding to the j item in the order d; hði1 ; ⋯; id Þ represents the corresponding weighting coefficients for each item; Nd represents memory depth, Nd 1 denotes the maximum positive integer that ij can be taken, i.e. the maximum memory delay considered. PA model is referred to as memory if the output z(n) at time n is related to the present and up to Q previous input samples. As one of simplified Volterra series, MPM can be expressed as: zðnÞ ¼
Q X
In Equations (3) and (4), xðnÞ and zðnÞ, which consist of in-phase component in Iin ðnÞ and quadrature-phase component in Qin ðnÞ, are baseband input and output signal respectively. ak;q denotes the
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Fig. 3 is a schematic diagram of the predistortion system. As shown in Fig. 3, the predistortion system consists of two channels: The data training channel is a loop structure, the core of which is the estimator to adapt the predistortion algorithm. By processing the feedback signal and the original input signal, the estimator module is used to obtain the DPD parameters. The predistortion algorithm of complex gain is taken as an example, the forward signal xðnÞ is multiplied with the predistortion value to obtain the predistortion signal LUTðXÞ. In the ideal case, when the signal of LUTðxðnÞÞ is fed to the amplifier, the final output will be equal to HðLUTðxðnÞÞÞ.
Fig. 1. Memoryless diagram block with LUT.
4. Improved index accuracy of LUT by Taylor Series method In mathematics, the function approximation of Taylor series is an infinitely differentiable real variable function fðxÞ, defined as Equation (8): ∞ X f ðnÞ ðaÞ n¼0
n!
ðx aÞn
(8)
, where the n! means the factorial of n, f ðnÞ ðaÞ means the n order derivative of fðxÞ at a: The two characteristics of the Taylor series are important for us to use used. One is that the Taylor series can be used to approximate the value of a function, which is the rationale for the approximation of the predistortion value. The other is the derivation and integral of power series can be carried out one by one, which is the theoretical basis for hierarchical indexing and summation. For the predistortion system using the LUT method, the LUT records the forward signal power as an index value. In the paper, the index value is x, and the corresponding predistortion value is fðxÞ. Find the infinite differentiable real variable function fðxÞ for the function fðxÞ, given the 1st order Taylor approximation formula, as shown in Equation (9): fðxÞ fðxk1 Þ þ f ð1Þ ðxk1 Þðx xk1 Þ
Fig. 2. MPM diagram block with LUT.
(9)
To improve the accuracy of approximation, the 2nd order Taylor series approximation formula is obtained as follows: fðxÞ fðxk1 Þ þ f ð1Þ ðxk1 Þðx xk1 Þ þ
1 ð2Þ f ðxk1 Þðx xk1 Þ2 2!
Fig. 3. Schematic diagram of the predistortion system with two channels.
(10)
Similarly, the nth order Taylor approximation formula can also be obtained based on the above theoretical basis. We use the memoryless DPD model as the example to express the method of improving index accuracy of LUT. Based on that, the memory DPD model is easily obtained. The LUT function of memoryless DPD model can be expressed as shown in formula (11): LUTðxÞ ¼ a0 þ a1 x þ a2 x2 þ a3 x3 þ a4 x4 þ a4 x5 þ ⋯
(11)
ðnÞ
LUT ðxÞ means the n order derivative of LUTðxÞ, then we can obtain the Equation (12) of LUT ð1Þ ðxÞ and Equation (13) of LUT ð2Þ ðxÞ: LUT ð1Þ ðxÞ ¼ a1 þ 2a2 x þ 3a3 x2 þ 4a4 x3 þ 5a5 x4 þ 6a6 x5 þ ⋯
(12)
LUT ð2Þ ðxÞ ¼ 2a2 þ 6a3 x þ 12a4 x2 þ 20a5 x3 þ 30a6 x5 þ ⋯
(13) ð1Þ
As shown in Fig. 4, LUTðxÞ means the integer LUT, LUT ðxÞ means the 1st order Taylor series decimal LUT and LUT ð2Þ ðxÞ means the 2nd order Taylor series decimal LUT. If we get the power calculation value of 36.6, as shown in Equation (9), xk1 ¼ 36:6.
Fig. 4. Schematic diagram of the LUT with 1st order Taylor series.
Furthermore, we can obtain the 2nd order Taylor series based on the Equation (14) as shown in Fig. 5.
LUTðxÞ LUTð36Þ þ f ð1Þ ð36Þð36 36:6Þ
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Table 1 Accuracy of models using different method. NMSE/dB Without DPD DPD without Taylor series approximation DPD with Taylor series approximation
32.23 45.93 47.57
The normalized mean-squared error (NMSE), defined by the Equation (15), was used to validate the performance of the proposed DPD LUT with Taylor series approximation. NMSEdB ¼ 10log10
! PN yðnÞj2 n¼1 jyðnÞ ~ PN 2 n¼1 jyðnÞj
(15)
, where yðnÞ is the desired output and y~ðnÞ is the simulated output. The results are reported in Table 1. Through the above analysis, it can be concluded that the series approximation method can further improve the index accuracy of DPD LUT on the basis of the existing linear interpolation methods [20,21]. In addition, the proposed method can be implemented without changing the DPD model of the existing system. Although the use of the DPD LUT with 1st, 2nd order Taylor series consumes some additional storage
Fig. 5. Schematic diagram of the LUT with 2nd order Taylor series.
Fig. 7. Diagram of experimental testbed.
Fig. 6. FPGA implementation of DPD LUT with Taylor series approximation.
LUTðxÞ LUTð36Þ þ LUT ð1Þ ð36Þð36 36:6Þ þ
1 LUT ð2Þ ð36Þð36 36:6Þ2 2! (14)
FPGA implementation of digital predistorter with improving index accuracy of LUT by the method of Taylor approximation is shown in Fig. 6. In the real communication system of engineering application, we can use the model of ‘cut 1 bit’ to realize the function of 2!1 , and the ‘square LUT’ to be addressed to calculate the square of decimal part of the power calculation.
Fig. 8. AM–AM and AM–PM of PA output with and without proposed DPD solution. 4
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resources of the FPGA, it can effectively improve the performance of DPD, and has important practical significance for the subsequent occasions where the performance requirements of DPD are getting higher and higher. 5. Experimental validation In recent years, the ability of the DPD system to handle multicarrier GSM (MC-GSM)/EDGE signals were an important consideration. In terms of dynamic range, noise, and spurious performance, the multicarrier GSM/EDGE signals were an important consideration to provide the most stringent set of specifications to test the ability of the DPD system. The number of carriers is also an important factor: a multitone signal has a higher peak-to-average signal ratio than a single-tone, and so for multicarrier applications, we need to back off the average signal power to prevent clipping in the DAC. We should also remember that the DAC is operating on the predistorted signal, and so the certain margin should be added to accommodate the gain expansion. In practical DPD systems, this gain expansion is often limited to a maximum of 3 dB, to prevent destructive overdrive of the PA. Shown as Fig. 7, the performances are evaluated with an experimental test setup followed by 50 dBm peak output power PA. The test signals are a 4.2 dB PAPR 6-carrier GSM. The center frequency of the test signal is 940.2 MHz. Considering the tradeoff between the complexity and accuracy of the DPD LUT we used, the polynomial order is set to 7, memory depth is set to 5, and only the odd terms are reserved because products of even-order terms fall outside of the occupied band. The AM–AM and AM–PM performance is shown in Fig. 8 The experimental validation of six-carrier GSM is illustrated in Fig. 9. From this figure, we also can see that the maximum allowable levels of noise and distortion as a function of the frequency offset from any GSM/ EDGE carrier in Fig. 9(a). A maximum channel bandwidth for the signal of 10 MHz is considered; the individual GSM carrier bandwidth is 200 kHz. We use the above FPGA implementation of DPD with improving index accuracy of LUT by Taylor series approximation method to the sixcarrier GSM system. Fig. 9(b) shows the result of traditional DPD LUT method without Taylor series approximation, and the Fig. 9(c) shows the method we mentioned can improve the ACPR of six-carrier GSM nearly 3 dB. The results are reported in Table 2. 6. Conclusion We present the method for improving index accuracy of DPD LUT in this paper. The algorithm utilizes approximation of the LUT with the method of Taylor Series. The power values of forward signals are divided into integers and decimals, and the corresponding LUTs are indexed respectively. The index predistortion values of forward signals are approximated by Taylor series, which improves the index accuracy of LUT significantly. The simulation of six-carrier of GSM system shows that when Taylor series satisfies a certain condition, the error is less than the indexing error in any range of the power value of the forward signal. Therefore, the performance of a digital predistortion system is improved nearly 3 dB.
Fig. 9. DPD LUT with Taylor series approximation in real six-carrier GSM system (a) Spectra of PA outputs, (b) Spectra of DPD LUT method without Taylor series approximation, and (c) Spectra of DPD LUT method without Taylor series approximation.
Table 2 ACPR calculations without and with linearization, for different frequency offsets. Lower ACPR offset
Without DPD DPD without Taylor series approximation DPD with Taylor series approximation
Upper ACPR offset
1.2MHz/dBc
2.4MHz/dBc
3.6MHz/dBc
1.2MHz/dBc
2.4MHz/dBc
3.6MHz/dBc
37.12 64.51 67.23
38.56 65.37 66.85
39.47 65.73 68.46
36.23 66.93 69.17
37.89 71.14 70.89
40.73 70.18 73.24
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Acknowledgment
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