Digital signal processing (DSP) radios: trends, benefits and challenges

Digital signal processing (DSP) radios: trends, benefits and challenges

Microprocessors and Microsystems 22 Ž1999. 485᎐491 Digital signal processing Ž DSP. radios: trends, benefits and challenges Robert H. SternowskiU Col...

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Microprocessors and Microsystems 22 Ž1999. 485᎐491

Digital signal processing Ž DSP. radios: trends, benefits and challenges Robert H. SternowskiU Collins A¨ ionics and Communications D¨ , 855 35th Street NE, MS 138 135, Cedar Rapids, IA 52498, USA Accepted 3 September 1998

Abstract Radios have progressed over the decades from ‘cat whiskers’ to regenerative to superheterodyne to the newest DSP implementations. The newest DSP evolutionary stage brings with it unprecedented improvements in size, weight, cost, power, and reliability, but faces rising performance demands due to an ever more crowded radio spectrum. With these advances also come new challenges in product technology and system integration. Component technology holds the key to hardware performance, while integration of the high speed radio digital interface directly into new all-digital platforms is both an opportunity and a challenge. 䊚 1999 Published by Elsevier Science B.V. Keywords: DSP; Digital signal processing; Software radio; Architecture; Dynamic range; ADC; Analog-to-digital converter; Standards

1. Radio evolution Since the advent of radio communications a century ago, the implementations and applications of radio equipment have undergone numerous changesᎏsome evolutionary, some revolutionary. However, as much as radio has changed, much remains constant. From Fig. 1, we see that although circuit implementations and performance have changed, basic radio operation still requires capturing incoming waves with an antenna, bandlimiting the incoming spectrum to just the desired signal, amplifying the desired signal to a useful level, and demodulating the radio signal to recover the transmitted information. Instead of using tubes and coils, today the trend is to microprocessors and software. Instead of headphone and microphone audio interfaces to the host platform, the radio more often communicates directly with other onboard computers.

What has motivated this evolution? A number of factors, both technical and operational: 䢇











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Corresponding author.

Component technology Žtubes, transistors, integrated circuits . has directly driven radio size, weight, power, reliability. Circuit architecture wtuned radio frequency ŽTRF., regenerative, superheterodyne, DSPx is driven by component availability and the increased crowding of the radio spectrum. User information demand has filled the available spectrum and created a technical quest for technology to fit more users into a finite spectrum. Dense spectrum occupancy has raised the required radio performance levels necessary to mitigate interference. Extensi¨ e computerization of systems in the global society has caused radio communications to shift from all voice to digital. Economic considerations continue the pressure to improve system size, cost, weight, power, and reliability.

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R.H. Sternowski r Microprocessors and Microsystems 22 (1999) 485᎐491

Fig. 1. The evolution of radio communications.

These trends are readily obvious by reviewing equipment evolution Žsee Fig. 2. over the years: 䢇











The tuned ‘cat whisker’, tuned radio frequency ŽTRF. and regenerative receivers in the early days of radio. The introduction of Morse and amplitude modulation ŽAM. voice superheterodyne vacuum tube radios of the 1930s and 1940s. The vacuum tube single AM, frequency modulation ŽFM., sideband ŽSSB. voice and teletype radios of the 1950s. The transistorized AM, FM, SSB voice and data radios of the 1960s and 1970s. The integrated circuit AM, FM, SSB voice and high-speed phase-shift key ŽPSK. data radios of the 1980s and 1990s. The DSP AM, FM, SSB voice and high-speed PSK data radios of the 1990s.

Clearly the rising capacity of digital radio communications continues to improve, and is now overshadowing traditional voice communications. 2. DSP radio implementations herald a new era of performance The quest to communicate more information via a finite radio spectrum by a growing population of global users, coupled with the fast advancing microprocessor industry, has pushed radio designers to seek new solutions in the realm of software-based implementations. A current state-of-the-art radio uses software to perform manyᎏbut not allᎏof the four basic radio functions enumerated earlier. The advantage for the

designer in reducing his design to a set of textbook equations implemented in software lies in: 䢇





Precision of operations unattainable with physical analog circuits. Precise manufacturing repeatability of digital circuits and software. Low cost, thanks to low cost digital integrated circuits and low parts count.

The new generation of DSP radio is best illustrated by an example. The newest of Collins’ equipments, the Collins 95S-1A receiver, is illustrative of where the state-of-the-art in radio components and technologies lies today. Put into production in 1996, this receiver Žblock diagram shown in Fig. 3. uses a single downconversion stage to quadrature baseband Žthat is, 0 Hz., and applies the baseband signal to analog-to-digital converters ŽADC.. Only coarse bandlimiting is done by a preselector bandpass filter. All remaining functions Žbandpass filters, gain control, demodulation, squelch, etc.. are implemented in software using several DSP microprocessors. Software may be downloaded externally via a computer or modem, allowing an unlimited ability to customize and upgrade the radio. One thousand seven-hundred Ž1700. surface mounted components on a single printed wiring board allow the radio to tune from 5 KHz to 2000 MHz in 1-Hz increments, with bandwidths programmable from 100 Hz to 300 KHz. Approximately one-quarter of the components constitute the bandlimiting preselector filter, while another one-half comprise the synthesizer and other RFrbaseband circuits. The DSP portion has less than 100 components. Notable is the total

R.H. Sternowski r Microprocessors and Microsystems 22 (1999) 485᎐491

Fig. 2. The evolution of radio receiver implementations.

Fig. 3. 95S-1 receiver block diagram Ždetailed..

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absence of manual adjustments; alignment and production tolerances are compensated for by DSP software. Similar equipments are available from other manufacturers, with some variations on the RF circuitry utilized prior to the ADC. All implementations have the same goal: to achieve an optimum combination of DSP circuits and analog preprocessing of the incoming spectrum to produce an affordable radio set, given the current ADC and DSP limitations. Digital transmitters are also on the horizon, utilizing essentially the same techniques as those described but in reverse. DSP software and circuits modulate by synthesizing a waveform through a digital-to-analog converter ŽDAC., amplify the signal, bandlimit it to achieve the required spectral purity, and radiate the waves. Transmit products are now coming to market. However, the similarities are such that, for the purpose of this paper, the discussion of key issues is identical to both transmitter and receiver. 3. Key challenges to harnessing DSP for radios DSP radios are still in their infancy, and present a variety of challenges to both equipment and system designers eager to offer improved economic and performance benefits to users. Three principal challenges limit the realization of added benefits: digitizer performance, interface standards, and hardwarersoftware implementation tradeoffs. 3.1. Digitizer performance: bits and megahertz needed The digitizer performs the translation between analog and digital domains, and is based primarily on the ADC and DAC components. The dynamic range Že.g. strong signal handling capability., as well as the spectral purity Že.g. noise and spurious. are a function of the number of bits of resolution of the ADC and DAC for receivers and transmitters, respectively. The maximum bandwidth that can be digitized is determined by the sampling speed of the ADC and DAC. The physics of these two critical components find resolution and sampling speed to be opposing parameters, that is, one may be improved at the expense of the other. The ADC state-of-the-art today ranges from an 8-bit, 1 GHz sample speed to 16-bit, 2 MHz sample speed converters with unit costs in the thousand dollars range. However, 12-bit, 400 KHz ADCs costing US$3 each are readily available. The designer must choose an optimum costrperformance mix of preprocessing signal conditioning circuitry preceding the ADC vs. the cost of the ADC; a more expensive ADC requires less costly preprocessing circuitry. The key design tradeoff is receiver strong signal

handling. Fig. 4 shows the problem graphically. A typical narrowband communications receiver will have a noise floor approx. y120 dBm, with a desired signal at least 10 dB greater than the noise. FM and TV broadcast signals can produce up to q10 dBm signals at the receiver input, thus requiring a dynamic range Ždifference between the largest and smallest signals simultaneously present. of s 10 y Žy110. dBs 120 dB. The mathematical relationship for dynamic range is approx. 6 dB per bit of resolution, thus 120r6s 20 bits of resolution are required for 120 dB of dynamic range. Whenever the maximum input level of the ADC is exceeded, the output of the ADC will produce random noise and render reception of signals useless. This is the very essence of the new ICAO requirements for FM immunity for VHF-AM receivers. The preceding example is true for only one strong broadcast signal. If multiple stations are present Žassumed to be of equal strength for purposes of illustration., then the voltage vectors of all signals present will randomly, as a function of the signal frequencies, sum to a peak value, referred to as the peak en¨ elope power ŽPEP.. For two signals, the PEP is 6 dB higher than either of the signals, for four signals 12 dB higher, and for 32 signals Žtypical large city FM band. 30 dB higher. Thus where we previously postulated a dynamic range requirement for 120 dB for one station, flying through an urban area with 32 FM stations adds 30 more dB to the needed dynamic range, for a total requirement of 150 dB. This corresponds to 25 bits of resolution. Simultaneously, the designer must select the bandwidth to be digitized. The VHF-AM band, 118᎐136 MHz, would be convenient to digitize as one band without tuning, instead tuning to a specific channel with software. Nyquist’s Theorem requires the ADC sampling speed to be at least double the bandwidth to be digitized Ž118᎐136 s 18 MHz., or at least 36 MHz sample speed for our example. Combining these two factors, our VHF-AM DSP radio would require a 20-bit Ž25 bits in urban areas., 36 MHz sample speed ADC-well beyond the 16-bit, 2 MHz components available. Thus the designer is forced to preprocess the RF signals by bandlimiting them with filters to match the maximum sampling bandwidth of the ADC. Given a typical narrowband communications bandwidth of 50 KHz, and the inability to build a 50-KHz wide filter between 118 and 136 MHz, the alternative is to downconvert the signals to a lower intermediate frequency where narrow bandlimiting is feasible. The result of this tradeoff is a hybrid superheterodynerDSP receiver. The 72-dB dynamic range of the 12-bit ADC is adjusted up or down in level by an automatic gain control circuit according to the signal power present inside the radio passband.

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Fig. 4. Strong interfering signals require ADC dynamic range to avoid loss of signal.

Transmitter noise and spurious performance and bandwidth are similarly limited by the bits of resolution and sample speed, respectively, of the DAC. Given that it has taken 10᎐15 years to move from 8 bits at low sample rates to 16 bits at 2 MHz, the immediate prospects for 20 Žor 25. bits at 36 MHz are rather dim. Component vendors are researching both extensions of existing technology as well as novel approaches to improving performance. The radio designer will be the immediate beneficiary of any breakthroughs in this area. 3.2. Standards enable economical access to digitized spectrum Given that we can digitize the desired signals and bandwidth with a sufficient ADC, we can recover information by employing DSP hardware and software. This can be done with a small, dedicated DSP subsystem dedicated to a receiver for each channel, or by allowing a large, high-speed central platform processor to access the desired channels as needed from the incoming digitized antenna spectrum. System performance is heavily influenced the volume of digital information flowing from digitizer to DSP. Assume our hybrid receiver has a 50-KHz bandwidth with a 100-KHz sample rate and 16 bits of

Fig. 5. DSP radio system standards must handle high-speed digital data.

resolution Žsee Fig. 5.. The digital output is 16 bits = 100 KHzs 1.6 megabitsrsecond Žmbps.. Digitizing the VHF-AM band would result in 20 bits = 26 MHz s 132 mbps. Both of these data rates are well within the capacity of circuit board interconnects, but would require special handling if the data were routed externally from a digitizer to a central onboard processor. Equally important is the format in which such data would be conveyed, in terms of signal logic levels, data structure, connectorization, and overhead signaling. The ability to interface digitizers and DSP proces-

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sors as part of a routine system integration effort relies heavily on having an industry standard for digitized spectra. The problem becomes even more severe when we consider that, in the future, it will become possible to digitize the entire 0᎐1100 MHz spectrum encompassing the radio bandsrfunctions used by aircraft ŽVLF non-directional beacons, VOR, VHF-AM, military UHF, DME, TACAN, etc... This is, of course, filled with numerous TV and FM stations. If a 32-bit, 2.2-GHz digitizer is used, then the output data stream will be 70.4 gigabitsrsecond Žgbps.. This would allow a high speed onboard processor to tune to any radio service within 0᎐1100 MHz as needed. However, communications circuitry to transport the digitized spectrum from the antenna to the processor must operate at 70 gbps, with appropriate system standards Žwhich do not yet exist.. Likewise, digital circuitry must exist to extract only the desired narrowband signals from the incoming 1100 MHz wide digitized spectrum. Perhaps 70 gbps is a little extreme for a digital spectrum data rate; assume instead a 7-gbps rate. Compared to today’s systems, the engineering and life cycle cost impact is still staggering even at the lower data rate. Any communication bus operating in the gigabit range will require carefully considered interface standards, hardware, design rules, test equipment and special trainingᎏcosts which appear to be inevitable in the future given the advance of technology, and which must be carefully planned for. 3.3. Hardware ¨ s. software implementation tradeoffs The designer is also faced with a choice of implementing a DSP design in standard off-the-shelf DSP processing integrated circuits with resident DSP software, or in dedicated integrated circuits which execute the DSP algorithms in dedicated combinationalr sequential logic. The obvious tradeoffs lie in: 䢇





Non-recurring cost of developing custom integrated circuits vs. cost of off-the-shelf general purpose DSP processors. Reprogrammability of general purpose processors vs. unalterable digital integrated circuits. Pipeline speed of dedicated integrated circuits vs. slower clock cycle time of general purpose DSP processors.

An illustrative example is the design case for Global Positioning System ŽGPS. receivers. The first production GPS receiver was built by Collins, and occupied several 2-m high equipment racks. Today, it has been reduced to one RF and one digital integrated circuit customized to the specific GPS processing require-

Fig. 6. Candidate DSP architectures tradeoff hardware and software.

ments. However, we know of no one who has gone to the bother of implementing the straightforward DSP and geometric algorithms as part of a multi-function, multi-band receiver with a general purpose receiver and DSP subsystem. Rather, anyone who wishes to add GPS capability simply embeds the US$50 GPS module Žapprox. 20 components and approx. 12 cm2 .. Perhaps this suggests alternative radio architectures Žsee Fig. 6. for systems such as aircraft where many separated radio bands are used simultaneously. A dedicated integrated circuit set Žor module. could be designed and built specifically to match the requirements of each band. Alternatively, a common antenna digitizer could be used with dedicated integrated circuits for each radio bandrmode extracting their respective signals from the wideband bit stream. Use of any dedicated integrated circuit approach would require introduction of a new hardware module into the system each time a new mode or function is to be introduced. This requires, once again, carefully thought out system specifications and standards to assure growth capability with minimal life cycle cost impact. Effectively we have such standards for far simpler system implementations, using MIL-STD1553, ARINC 429, 600 ⍀ audio, etc. Development of a set of standards to integrate many functions operating at gigabit digital signal rates with direct platform central processor links represents a new era and frontier in system integration capabilities, performance and complexity.

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4. Summary The era of DSP radios is upon us, although we are standing at the very edge of this new frontier. The radio designer has numerous system architecture options at his disposal to create a cost-effective DSP or hybrid radio to meet the increasing demands of a crowded radio spectrum. While digitizer performance is limited by slowly advancing ADC and DAC component technology, the future system application of DSP radio technology will be limited by a lack of system standards and specifications tailored to meet the de-

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manding digital architecture requirements of the new era. Robert H. Sternowski graduated from the Uni¨ ersity of Dayton (1969) with a Bachelor of Science in Electrical Engineering, the Uni¨ ersity of Richmond (1972) with a Master of Commerce, and Iowa State Uni¨ ersity (1977) with a Master of Science in Electrical Engineering. He joined Rockwell Collins in 1969 as a recei¨ er design engineer. He has ser¨ ed in a ¨ ariety of positions at Collins, and is currently manager of the Ad¨ anced Programs group, responsible for ad¨ anced technology and product planning and implementation.