Dopant transfer from poly-si thin films to c-Si: An alternative technique for device processing

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Dopant transfer from poly-si thin films to c-Si: An alternative technique for device processing L. Ricardo a,n, A. Amaral c,d, C. Nunes de Carvalho a,c, G. Lavareda a,b a

Departamento de Ciência dos Materiais, Universidade Nova de Lisboa, Campus da Caparica, 2829-516 Caparica, Portugal Centro de Tecnologias e Sistemas, Faculdade de Ciências e Tecnologia, Universidade Nova de Lisboa, Campus da Caparica, 2829-516 Caparica, Portugal c Center of Physics and Engineering of Advanced Materials, Universidade de Lisboa, Av. Rovisco Pais 1, 1049-001 Lisboa, Portugal d Departamento de Física, Instituto Superior Técnico, Universidade de Lisboa, Av. Rovisco Pais 1, 1049-001 Lisboa, Portugal b

art ic l e i nf o

a b s t r a c t

Article history: Received 25 May 2015 Received in revised form 19 August 2015 Accepted 3 September 2015

An alternative technique for production of devices which uses both silicon crystalline wafers (p-type) and heavy doped amorphous silicon thin films (n-type) is reported. The amorphous silicon acts as a finite source of dopant and is deposited (at low temperature, 70 °C) by plasma enhanced chemical vapor deposition on silicon wafers. Afterwards, the process of dopant diffusion into the crystalline silicon occurs in a diffusion furnace at 1000 °C for 2 h, to create p–n junctions. Using SIMS analyses, a dopant (P) transfer into c-Si of about 30% is verified and 87% of the dopant transferred is electrically active. Consequently, n-MOSFET devices are produced using a gate oxide thermally grown at the same diffusion temperature for one hour. The preliminary results of the MOSFET (channel length and width of 0.5 and 5 mm, respectively) show a depletion behavior with a threshold voltage, Vth ¼  8.2 V and afield-effect mobility, mFE ¼ 187.8 cm2/(Vs). & 2015 Elsevier Ltd. All rights reserved.

Keywords: Dopant diffusion Low temperature pre-deposition Amorphous silicon p–n junctions Crystalline silicon

1. Introduction

2. Experimental

The development of microelectronic device technologies started in the 60s with an industrial implementation in the 70s. Nowadays, we are surrounded by equipment assembled with electronic devices. The fact that these devices are produced at an industrial level does not mean that the processes employed for their production may not be improved. The present work reports a new pre-deposition technique for the diffusion process of crystalline silicon doping, with the advantage of using less energy, when compared to the conventional production method [1]. Two of the processing stages that are usually executed at high temperatures (E1000 °C) are eliminated – (1) the oxidation for mask purposes and (2) the thermal pre-deposition. The novelty consists in the pre-deposition of a highly doped amorphous silicon thin film that will act as a finite source of dopant of a known dose. The amorphous silicon film is deposited by plasma enhanced chemical vapor deposition (PECVD) at low substrate temperature (70 °C) [2,3]. Subsequently, a diffusion at 1000 °C for 2 h is made and the resulting junction is analysed. Next, n-type field effect transistors are fabricated. The MOSFET dimensions are: channel length and width of 0.5 and 5 mm, respectively. The main characteristics of n-MOSFETs achieved are reported.

Two samples of p-type crystalline silicon (Cz, 〈100〉, ρ ¼ 1– 20 Ω cm) with size 10  10 mm2 are used as substrates for highly doped hydrogenated amorphous silicon (a-Si:H) thin films deposition. Sample A, with 3440 Å film thickness, will be used for determination of P concentration in a-Si:H by SIMS. A thickness higher than 3000 Å is needed for a better film analysis. Sample B, deposited with the same conditions of sample A but with 506 Å film thickness, will be used as a solid source of P for diffusion in c-Si (Table 1). This small thickness facilitates the a-Si:H dehydrogenation process. These substrates, intended only for diffusion study purposes, are cleaned with anion free detergent and next rinsed with ultrapure water (ρ ¼18.2 M Ω cm) to conclude the cleaning. The amorphous silicon films are deposited by PECVD (13.56 MHz) at 70 °C. The phosphine (PH3) concentration used in the gas phase is 1.5% in silane, with a total flow of about 10 sccm. The film is deposited with a growth rate of 2.25 Å/s, until a final thickness of 500 Å is achieved. The other deposition parameters are reported in detail elsewhere [4]. The area of the amorphous film is defined using a lift-off lithography process: AZ1518 photoresist, 2 μm thick, is previously patterned leaving windows where junctions are to be made. Next, a-Si:H is deposited and then the photoresist is removed, leaving the a-Si:H patterned on the substrate. Samples

n

Corresponding author. E-mail address: [email protected] (L. Ricardo).

http://dx.doi.org/10.1016/j.mssp.2015.09.006 1369-8001/& 2015 Elsevier Ltd. All rights reserved.

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Table 1 Characteristics of the samples used for SIMS measurements. Sample

a-Si:H thickness(Å)

Processing

A B

3440 506

As-deposited After diffusion

are then placed in the tubular diffusion furnace at room temperature. The temperature is then quickly raised until 350 °C. From 350 °C to 550 °C a soft ramp is applied (0.8 °C/min), to avoid blistering phenomena [5,6]. In this range of temperatures, the a-Si: H dehydrogenation occurs. This step would not be necessary if the a-Si was deposited by other technique (e.g. sputtering), but the PECVD technique allows a much better control of P concentration. Finally, temperature rate is increased to 10 °C/min and kept constant until 1000 °C where the diffusion begins for 2 h. In the last 11 min of the diffusion process, a wet oxidation will occur simultaneously to diffusion on order to oxidize the deposited silicon. This oxide will be removed by wet etching, using a BHF solution. For MOSFET production, RCA1 and RCA2 cleaning procedures are used in first place, followed by a-Si:H deposition, dehydrogenation and diffusion as mentioned above. Next, an oxide layer (SiO2), 2190 Å thick, is grown at the same temperature by wet oxidation process for 1 h. After contact window lithography, the aluminum contacts, 1500 Å thick, are deposited by Thermal Evaporation. These contacts are then annealed at 450 °C for 30 min. The thickness measurements of the a-Si:H, oxide layer and aluminum films are made by Veeco Dektak III. The electrical characterization of the devices is made through I(V) curves (conductance or transconductance curves), using a Keithley 617 programmable electrometer and a Keithley 228A voltage/current source. Sheet resistance is measured by a Veeco FPP5000 four point probe. In depth chemical characterization is made by Probion (France) using a Secondary Ion Mass Spectrometry (SIMS) apparatus (see Table 2). A picture of the MOSFET produced is presented in Fig. 1a and the size of different regions in Fig. 1b.

Fig. . 1. (a) Picture of the n-MOSFET (1  1 cm2). (b) Masks for MOSFET fabrication, indicating: (A) back contact, (B) gate region and (C) doping zones.

3. Results and discussion 3.1. Efficiency of dopant transfer from pre-deposited layer to c-Si SIMS analysis was performed in doped amorphous silicon thin films after deposition (Fig. 2), as well as in the crystalline silicon after diffusion (Fig. 3), in order to characterize the dopant concentration profile. Considering the dose (QA0) initially present in the thin-film, the fraction of dopant which has diffused from a-Si to c-Si can be calculated, using both SIMS profiles. On the other hand, the knowledge of the dose present in the c-Si allows to obtain the fraction of atoms which are electrically active, comparing the data from SIMS and from the four-point probe measurements. If all atoms were electrically active, the sheet resistance (RS) would be Table 2 Details of SIMS measurements. Primary ions

Cs þ

Impact energy Rastered area Analysed area Detected ions polarity Analyzed elements Mass resolution (M/DM)

14.5 keV 125 μm  125 μm 60 μm in diameter Negative P, Si 3000

Fig. 2. Phosphorus concentration in the as-deposited a-Si:H film, 3440 Å thick (SIMS profile of sample A).

obtained from Eq. (1) [7], integrating the conductivity along the thickness to obtain the sheet conductance and inverting the expression to obtain RS.

RS =

1 q∫

xj

0

μ (x) N (x) dx

(1)

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as-deposited after dehydrogenation after diffusion

Intensity (a.u.)

28,68º

Si (111)

26

Fig. 3. Phosphorus concentration in c-Si after diffusion (2 h at 1000 °C) and removal of poly-Si (SIMS profile of sample B).

RS: sheet resistance, xj: junction depth, m(x): carrier mobility, and N(x): concentration of electrically active dopant atoms. However, only a fraction (f) of the diffused dopant will be electrically active

N (x) = f ⋅C (x)

(2)

C(x): concentration of dopant atoms. Assuming f independent of x (average f) it is possible to estimate its value, calculating the ratiobetween RS0 (RS for N(x) ¼C(x), i.e., f¼1),and the measured value of RS (31.92 Ω/sq)

f=

RS 0 RS

27

28

29

30

31

32

2θ (deg) Fig. 4. Diffraction spectra of a-Si:H films (a) after deposition at 70 °C, (b) after dehydrogenation at 350–550 °C with rate of 0.8 °C/min and (c) after diffusion at 1000 °C for 2 h.

Table 3 Parameters obtained from SIMS profiles (Figs. 2 and 3). xj (lm) CS (atoms/cm3 QA (atoms/cm2 ) )

Sample

1.3  1021 5  1019

A (As deposited) – B (Diffused) 1.3

4.47  1016 (a) 1.95  1015(b)

QA0 (atoms/cm2 ) 6.58  1015 (c)

(a) Calculated assuming a flat profile in Fig. 2. QA ¼ concentration  thickness. (b) Calculated by numerical integration of data from Fig. 3. (c) Inferred for the thickness of sample B (506 Å).

(3)

From SIMS measurements we obtained the profiles of: (i) sample A (not diffused) and (ii) sample B diffused for 2 h at 1000 °C (see Table 1). For both samples the phosphine concentration used for the amorphous film deposition is 1.5%. Fig. 2 shows the SIMS profile obtained for sample A. We can notice that the phosphorus concentration is kept nearly constant throughout the a-Si:H thin film. The a-Si:H/c-Si interface is not sharply defined. This can be due to: (i) some phosphorus adsorption in the initial phase of the deposition process where the wafer is exposed to the dopant gas for several minutes, prior to the deposition beginning; (ii) despite bulk a-Si:H and c-Si have approximately the same etch rate, the material discontinuityin the a-Si:H/c-Si interface canlead to a locally different SIMS etch rate; and (iii) high energy ion-beam caused some P mixing into Si during SIMS measurements. As the SIMS depth is estimated for a constant etch rate, a lower local etch rate originates a less abrupt transition. Finally, P concentration remains constantat 1016 atoms/cm3 in the c-Si bulk because of the detection limit of SIMS (Fig. 2). From this profile the P concentration in the film can be obtained: C0 ¼1.3  1021 atoms/cm3. The determination of the dose initially present in sample B before diffusion is now possible – as the concentration in the gas phase for this sample is the same of sample A, we can also use C0 as the initial concentration of sample B. As the thickness of the amorphous film is 506 Å, the initial dose present in the film is QA0 ¼6.58  1015 atoms/cm2 During diffusion, the a-Si film crystallizes, becoming polycrystalline, as can be seen in Fig. 4, which shows a peak at 28.68° identifying the c-Si. In the last processing step (after XRD analysis), it has been removed by chemical etching after being oxidized. Consequently, sample B shows the SIMS profile of Fig. 3 where the background concentration, NBC, is also shown.From this profile, thejunction depth (xj), surface concentration (CS) and dose (QAD)

can be calculated (the values are shown in Table 3). The ratio QAD /QA0 is the dopant fraction (% QADif) which has diffused from a-Si to c-Si. % QADif ¼29.86% This way it can be concluded that only 30% of dopant available is integrated in the c-Si, remaining the other 70% in the polycrystalline film, which was afterwards removed. On the other hand, the expected sheet resistance in the diffused region, RS0, obtained from Eq. (1) and using N(x) ¼C(x), is

RS 0 =

1 q∫

xj

0

μ (x) C (x) dx

= 27.77 Ω/sq

where the value of the integral was numerically calculated. C(x) was obtained from SIMS data and m(x) was interpolated from a μ ¼f(N(x)) data table, obtained from Fig. 15a of Ref. [8]. So, knowing that the measured sheet-resistance is 31.92 Ω/sq, the average fraction of electrically active dopant atoms, f, can be calculated

f=

RS 0 = 87% RS

As an overall conclusion we can say that 87% of dopant atoms diffused in c-Si contributefor electrical conduction. Fig. 3 shows that the surface doping concentration in c-Si is 5  1019 atoms/cm3. If the temperature or the time of diffusion are increased, this concentration value can be lowered. 3.2 MOSFET production Fig. 5 shows the semi-log curves of bulk-source and bulk-drain diodes of n-MOSFET, with a rectification ratio of 2.2  105 for |1 V|, which confirms the quality of the junctions. Meanwhile, for |5 V|

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4

3.0m

100m

2.5m

1m

1m

10µ

10µ

100n

100n

1n

2.0m

1n

10p 100f

0

1

2

3

4

500.0µ

100f

5

1.5m 1.0m

10p

Bulk-source diode Bulk-drain diode

I DS (A)

Current (A)

100m

0.0 -6

Voltage (V) Fig. 5. Semi-log I(V) curves of bulk-source (BS) and bulk-drain (BD) of n-MOSFET.

Current (A)

100f

100f

10f

10f

1f

1f

-6

-4

-2

0

2

4

6

Fig. 6. Gate current of n-MOSFET.

3.0m 5V

2.5m

I DS (A)

3V

1.5m

1V

1.0m

-3 V -5 V

0.0 -1

0

1

2

3

4

5

2

4

6

Fig. 8. Transconductance curves of the n-MOSFET.

Vth (V)

lFE (cm2/(Vs))

 8,2

187,8

4. Conclusions

-1 V

500.0µ

0 VGS (V)

some pA, demonstrating the high quality of this oxide as an insulating layer. The conductance curves (Fig. 7) show clearly a field effect with increasing VGS. These curves were obtained for VDS in the range of 0–5 V and VGS in the range of:  5 to 5 V with a step of 2 V. The transconductance curve (Fig. 8) allows to calculate the MOSFET parameters (Table 4), based on the saturation mode equations. Considering these values we can see that the threshold voltage has a negative value, indicating the n-MOSFET depletion mode [8]. Both types of curves referred before as well as the sign of Vth confirm the n-MOSFET depletion mode. This result can be associated to the high value of wafer resistivity (ρ ¼1–20 Ω cm). A high resistivity means a low doping concentration in the wafer that willimply a low threshold voltage. Silicon wafers with resistivity values 1–2 Ω cm should be used in order to have Vth values closer to zero.

Voltage (V)

2.0m

-2

Table 4 MOSFET characteristics: threshold voltage (Vth) and field-effect mobility (mFE).

1p

1p

-4

6

V DS (V) Fig. 7. Conductance curves of the n-MOSFET.

we obtain RON/OFF ¼ 0.9  101, which means a decrease of this ratio for higher values of voltage that can be caused by: (i) high values of series resistance, which limits higher electrical currents as a consequence of metallic contacts thickness (1500 Å); (ii) the small Al/Si contact area (0.16 mm2) of the bulk electrode, since the purpose of this contact is to polarize instead of extract high currents; (iii) the abrupt increase above |1 V| (three orders of magnitude) of the I(V) curve for reverse polarization probably due to a lack of Si/SiO2 interface passivation causing an increase of the junction leakage current. Fig. 6 shows the current which flows through the oxide layer (2190 Å thick), which is of the order of

An alternative technique for production of devices which uses both silicon crystalline wafers (p-type) and heavy doped amorphous silicon thin films (n-type) is reported. The amorphous silicon acts as a finite source of dopant and is deposited (at low temperature) by plasma enhanced chemical vapor deposition on silicon wafers. The economic advantage of this technique is the substitution of two high temperature ( 1000 °C) processing stages by one low temperature stage (70 °C) and those are: (i) the oxidation for mask purposes and (ii) the thermal pre-deposition. Afterwards, the process of dopant diffusion into the crystalline silicon occurs in a diffusion furnace at 1000 °C for two hours, to create p–n junctions. The study of phosphorous concentration by SIMS analysis throughout the process led us to conclude that only 30% of the dose present in the as-deposited a-Si film diffuses to c-Si. As the sheet resistance of the diffused sample is known (RS ¼31.92 Ω/sq), it is possible to determine the doping efficiency. This way, 87% of the diffused atoms are found to be electrically active. After this study, it followed the preliminary n-MOSFET fabrication. The source/bulk and source/drain n þ /p junctions were firstly analyzed. The results obtained for these junctions revealed a rectification ratio of 2.2  105 for |1 V| and 0.9  101 for |5 V|. The

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MOSFET characterization showed a depletion mode with a threshold voltage of  8.2 V and a field effect mobility of 187.8 cm2/(Vs). In order to increase the threshold voltage,wafers of lower electrical resistivity should be used. In a whole, this technique is an alternative possibility of device production with the following advantages: controllable pre-deposition profile (e.g. varying the concentration throughout the film thickness); different dopant species can be driven-in simultaneously, after each one has been pre deposited separately.

5

Ana Amaral was born in Lisbon, Portugal, in 1952. She graduated in 1978 from Faculdade de Ciências (UL) and obtained the Ph.D. degree in 1992, from FCT-Universidade Nova de Lisboa (UNL). She is an assistant professor in the Physics Department and a researcher at ICEMS, both at Instituto Superior Técnico (IST). His current research interests are low cost silicon junctions and the production and characterization of n and p-type oxide thin films and their applications in devices.

Acknowledgments The authors would like to thank the Portuguese Science and Technology Foundation through Project PTDC/EEA-ELC/108882/ 2008.

References [1] W.F. Smith, Principles of Materials Science and Engineering, 3rd Ed., McGrawHill, United States of America, 1995. [2] M. Brinza, J.K. Rath, R.E.I. Schropp, Sol. Energy Mater. Sol. Cells 93 (2009) 680. [3] A.M. Nardes, E.A.T. Dirani, R.F. Bianchi, J.A.R. Neves, A.M. Andrade, R.M. Faria, F. J. Fonseca, Mater. Sci. Eng.: C 24 (2004) 607. [4] G. Lavareda, A. de Calheiros Velozo, C. Nunes de Carvalho, A. Amaral, Thin Solid Films 543 (2013) 122. [5] A. de Calheiros Velozo, G. Lavareda, C. Nunes de Carvalho, A. Amaral, Thin Solid Films 543 (2013) 48. [6] A. de Calheiros Velozo, Master Thesis, Instituto Superior Técnico, Universidade de Lisboa, 2012 October. [7] G.S. May, S.M. Sze, Fundamentals of Semiconductor Fabrication, Wiley, 2003. [8] S.M. Sze, Kwok K. Ng, Physics of Semiconductor Devices, Wiley, New Jersey, 2007.

Carlos Nunes de Carvalho was born in São Paulo, Brasil, in 1948. He graduated in 1976 from Instituto Superior Técnico (IST) and he obtained his Ph.D. in Materials Science in 1996 from FCT-Universidade Nova de Lisboa (UNL). He is an assistant professor in the Materials Science Department, at FCT-UNL, since 1995. His current research interests are the production and characterization of n and p-type transparent oxide thin films and their applications in devices and also the production and processing of transparent conductive oxides.

Guilherme Lavareda was born in Lisbon, Portugal, in 1965. He graduated in 1989 and obtained the Ph.D. degree in 2005, both from FCT-Universidade Nova de Lisboa (UNL). He is an assistant professor of FCT-UNL, in the Materials Science Department, since 2005. His research interests are mainly directed towards semiconductor materials applied to energy conversion and light sensors as well as new semiconductor processing technologies.

Lídia Ricardo was born in Lisbon, Portugal, in 1990. She graduated in 2014 from Faculdade de Ciências e Tecnologia, Universidade Nova de Lisboa (FCT/UNL). She is a researcher at Cenimat (I3N). His current research interests are new semiconductor processing technologies, production and characterization of amorphous, crystalline silicon and nanoparticles as well as their applications in devices such as silicon junctions, solar cells and MOSFETs.

Please cite this article as: L. Ricardo, et al., Materials Science in Semiconductor Processing (2015), http://dx.doi.org/10.1016/j. mssp.2015.09.006i