Dynamic properties of ultraviolet sensitive detectors

Dynamic properties of ultraviolet sensitive detectors

Journal of Non-Crystalline Solids 338–340 (2004) 772–775 www.elsevier.com/locate/jnoncrysol Dynamic properties of ultraviolet sensitive detectors H. ...

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Journal of Non-Crystalline Solids 338–340 (2004) 772–775 www.elsevier.com/locate/jnoncrysol

Dynamic properties of ultraviolet sensitive detectors H. Stiebig b

a,*

, U. Nosan b, M. Krause a, M. Jankovec b, M. Topic

b

a Institut of Photovoltaics, Research Center J€ulich, D-52425 J€ulich, Germany Faculty of Electrical Engineering, University of Ljubljana, Si-1000 Ljubljana, Slovenia

Abstract The dynamic properties of ultraviolet detectors, the spectral sensitivity of which can be adjusted from a wide UV to a selective UV-B range by applying a semi-transparent Ag front contact, were studied. The investigations of ultra thin n–i–p layer sequences based on hydrogenated amorphous silicon and its alloys is of growing interest since ultra thin diodes are also attractive for applications in the field of interferometric sensors and spectrometers. Besides the steady state behavior of the detector also the dynamic properties are of interest for a precise optimization of the read-out process. The small-signal frequency response of thin diodes with an i-layer thickness down to 35 nm were studied in comparison with thicker diodes by measuring and analyzing the admittance of the devices under different bias conditions. Ó 2004 Elsevier B.V. All rights reserved. PACS: 81.05.)t; 81.40.)t

1. Introduction Thin diodes based on amorphous silicon and its alloys are promising candidates for the fabrication of ultraviolet (UV) sensitive detectors due to (i) high optical gap of a-Si:H and a-SiC:H, (ii) low dark current of the diodes and (iii) the possibility to adjust the spectral response of the detector from a broad UV to a selective UV-B range by the modification of the front contact design [1,2]. Additionally, the application of diodes with an absorber layer thickness below 50 nm is very attractive in the field of micro interferometric sensors [3] and detectors for spectral imaging [4]. Historically, the study of the optoelectronic properties of amorphous silicon based diodes have been focused on about several hundred nanometers-thick diodes, which are dominantly determined by the bulk properties of the diodes [5–7]. In this study we have investigated the dynamic properties of a series of n–i–p detectors with amorphous silicon i(a-Si:H) or amorphous silicon carbon i(a-SiC:H) layers with an i-layer thickness (di ) between 35 and 300 nm, and a semi-transparent front Ag contact. The transient behavior of the photodetectors

was analyzed by a comparison of the measured voltageand frequency-dependent admittance using a LRC meter and simulations based on SPICE (Simulation Program with Integrated Circuit Emphasis). 2. Experiment The diodes were deposited at a n–i–p layer sequence on a Cr layer to mitigate reflection of the visible light at the rear contact. The n- and p-layer thicknesses are 20 and 10 nm, respectively. As a front contact a 20 nm thick semi-transparent Ag film is used, which has the advantage that (i) the thickness of the Ag films enables the adjustment of the spectral sensitivity of the detectors and (ii) shunt problems known from thin diodes with e.g. sputtered ZnO front contacts [1] can be suppressed. The diodes have an area of 25 mm2 . The voltage- and frequency-dependent admittance measurements were carried out using a four-point measuring set-up and applying a small harmonic signals with an amplitude of 10 mV and covering a frequency range from 20 Hz up to 1 MHz and a bias between )0.5 and +0.8 V. 3. Results

*

Corresponding author. Tel.: +49-24 6161 2954; fax: +49-24 6161 3735. E-mail address: [email protected] (H. Stiebig). 0022-3093/$ - see front matter Ó 2004 Elsevier B.V. All rights reserved. doi:10.1016/j.jnoncrysol.2004.03.088

Fig. 1 shows the bias dependence of the conductance (gp ) and the capacitance (Cp ) as a function of the

H. Stiebig et al. / Journal of Non-Crystalline Solids 338–340 (2004) 772–775

0.8 V 0.6 V

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0.6 V

0V

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-4

gp (S)

10

0V

gp ðV ¼ 0 VÞ ¼

-6

10

-8

10 10

-10

10

2

10

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10

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f (Hz) Fig. 1. Measured admittance (gp , and Cp ) of a-Si:H n–i–p diodes with different i-layer thicknesses. Additionally, calculation results (symbols) based on simple RC circuits are introduced.

frequency (f ) of the small harmonic signal for diodes with an i(a-Si:H) layer thickness (di ) of 35, 100 and 300 nm. Both parameters represent the admittance, which consists of the real part (gp ) and the imaginary part (2pfCp ). At reverse bias the measured capacitance and conductance (not shown) exhibit similar values compared with the data determined under short circuit conditions. In this bias range, Cp is mainly determined by the geometric capacitance of the device. For medium positive bias (V ¼ 0:6 V) Cp slightly increases with increasing bias in the whole frequency range. This effect is more pronounced for diodes with thinner i-layer thickness. For the thinnest diode (di ¼ 35 nm) Cp increases from around 45 nF at V ¼ 0 V to 50 nF at V ¼ 0:5 V, which can be likely attributed to the variation of the effective space charge region between the p–i and i–n interfaces of around 3–4 nm. At higher bias the measured parallel capacitance increases particularly in the frequency range below 10 kHz due to an increase of the trapped charge within the device. The amplitude of the charge variation decreases with higher f , because the trapping and releasing processes of carriers in deep states cannot follow the fast signal changes. At high f (f > 3  105 Hz) the decrease of Cp is due to the finite value of the series resistance of the diodes [6]. The conductance shows no significant dependence of di at high positive bias and f < 104 Hz because under these conditions gp is mainly determined by the differential resistance of the diode. Since the dark saturation

Rs R2s

þ 1=ð2pfCg Þ

2

ð1Þ

:

A comparison between the calculations (symbols) and the measurements (lines) illustrates that a data evaluation is more complex. Only in the frequency range at around 100 kHz the influence of different geometric capacitances are reflected on gp . The consideration of an additional ohmic shunt resistance (Rsh ) parallel to Cg within the calculation cannot explain this dependence. Using Rsh derived from the dark I=V characteristics leads to a saturation of gp to a value proportional to 1=Rsh at low frequencies as shown by the simulation of the diode with a 100 nm thick i-layer (crosses). However, also in this case the shape of the calculated and measured plots does not match, which can be likely attributed to small space charge variations or parasitic effects.

60

a-SiC:H a-Si:H Simulation

0.7 V

50

Cp (nF)

Cp ( nF)

60

currents of the diodes differ less than a factor of 3 and the diode quality factors of this series vary only between 1.33 (di ¼ 35 nm) and 1.46 (di ¼ 300 nm) the dark I=V behavior of the diodes is very similar and therefore, the measured voltage-dependent gp values are comparable. In contrast, at reverse bias or under short circuit conditions gp shows a significant dependence on di , because the differential resistance is very high or infinite. Fig. 1 also plots (symbols) for all three diodes are included, which are based on simple calculations (circles) considering the real part of a series resistance (Rs ) and the geometric capacitance (Cg ) connected in series. Under these conditions gp can be described by the following relation:

35 nm 100 nm 300 nm

0.8 V

40

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V

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0V

0

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gp (S)

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773

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-2

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V

-4

0.6 V 10

-6

0.7 V 0V

10

-8

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f(Hz) Fig. 2. Measured (lines) and simulated (symbols) admittance (gp and Cp ) of n–i–p diodes with an a-Si:H and a-SiC:H i-layer of 300 nm.

H. Stiebig et al. / Journal of Non-Crystalline Solids 338–340 (2004) 772–775

In order to demonstrate the impact of the free carrier concentration on the measured admittance, Fig. 2 shows gp and Cp of diodes with a 300 nm thick a-Si:H and a-SiC:H layer. The frequency dependent gp values at V ¼ 0 V are nearly identical for both diodes whereas at higher bias the influence of the differential resistance of the diodes can be observed. In the bias range between 0.5 and 0.8 V, the voltage dependent dark current values of the a-SiC:H diode are smaller by around a factor of 20 than of the a-Si:H diode. However, similar measured data of gp and Cp for the a-Si:H diode at a bias of 0.6 and 0.7 V and the a-SiC:H diode at a bias of 0.7 and 0.8 V can be observed, since, for these data sets, comparable dark currents are recorded. Additionally, simulated data (symbols) are also introduced and will be discussed later on. Similar trends of gp and Cp as a function of the current density are also observed for the diodes with thinner a-Si:H and a-SiC:H absorption layers.

4. Discussion SPICE simulations were performed to discuss the dynamic properties of the photodetectors and to describe the recharging behavior of the localized states. The SPICE model for the investigated diodes consists of the series resistance (Rs ), which is between 6 and 9 X, the geometric capacitance (Cg ) mainly determined by the ilayer thickness, the shunt resistance caused by local shunts (Rsh > 6 MX), the differential resistance of a diode (Rd ðV Þ) and additional voltage- and frequencydependent RC circuit, connected in parallel to Cg as shown in Fig. 3. The RC elements consider (i) increased concentration and consequently variation of trapped charges in localized states and (ii) finite capture and reemission mechanism of trapped charges in localized states, which cause a certain lag or phase shift in charge variation regarding to applied signal which consequently increases the imaginary part of the admittance. The capacitance C represents the trapped charge within the device. First we have tried to find the RðV ; f Þ and CðV ; f Þ function that produces the best fit to the measured gp

and Cp values. We have focused our investigations in the bias range, where the trapping behavior of the charge states is reflected in Cp . A first-order voltage-dependent RðV ÞCðV Þ circuit cannot reproduce the measured frequency dependence. Also the simulation with a RðV ; f ÞCðV Þ allows no simultaneous fitting of gp and Cp . For the simulations R was reduced with increasing f . In Fig. 4 the simulation results of gp at V ¼ 0:7 and 0.8 V for a diode with a 35 nm thick i-layer of a-Si:H is displayed (crosses). For these parameters a good agreement between the measured and simulated Cp (not shown) values was achieved, whereas simulated gp deviated from the measured ones for f > 30 kHz. Within the simulation the increase of gp with increasing f is overrated. A simulation with an approach using a RðV ÞCðV ; f Þ circuit leads to a good agreement with the experimental data for thin diodes but not for diodes with an i-layer thickness of 300 nm. In order to fit the data at high bias (V ¼ 0:7, 0.8 V), C was varied over two orders of magnitude. The capacitance has to be reduced with increasing frequency taking into account the re-emission behavior of charge out-of shallow and deep states. In comparison to the experimental data, the simulated increase of gp is less pronounced for thick diodes and f > 100 kHz (not shown). Thus, these simulations demonstrate that both the capacitance and the resistance should be a function of the frequency and the applied bias.

80

Cp (nF)

774

0.8 V 0.7 V 0.6 V

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Measuring Simulation

0.5 V

40

0V

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gp (S)

0.7 V

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0V

0.5 V

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f (Hz)

Fig. 3. Dynamic electrical SPICE model.

Fig. 4. Measured (lines) and simulated (symbols) admittance (gp and Cp ) of an a-Si:H n–i–p diode with an i-layer thickness of 35 nm.

R1,2 /Rd

H. Stiebig et al. / Journal of Non-Crystalline Solids 338–340 (2004) 772–775

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2

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1

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the ratios with increasing voltage demonstrates that the decrease of R1 and R2 with increasing bias is less pronounced than for Rd , which varies for more than 3 orders of magnitude. The ratio of R2 =Rd is around a factor of 10 higher than R1 =Rd leading to higher time constants of the R2 C2 element. However, there is no linear relation between the Rd ðV Þ and R1;2 ðV Þ and the ratios slightly increase with thinner i-layer thickness.

300 nm 100 nm 50 nm

di

R2 /Rd

5. Conclusion di

10

0

R 1/R d 0.5

0.6

0.7

0.8

V (V) Fig. 5. Voltage dependence of the SPICE parameter R1 and R2 normalized to the differential resistance Rd of a-Si:H diodes with different i-layer thickness.

Only in the case that RðV ; f ÞCðV ; f Þ of Fig. 3 is replaced by two or three parallel-connected RðV ÞCðV Þ circuits with different time constants corresponding to different types (depths) of localized states, the description of the admittance as a function of the frequency and bias is possible. With this approach a good agreement between the simulations and experimentally determined data is achieved for series of diodes with various i-layer thicknesses. As an example Fig. 4 (circles) shows the data for a thin diode (di ¼ 35 nm) and Fig. 2 (circles) contains the data for thick diodes (di ¼ 300 nm) with different absorber material. The simulations have demonstrated that the resistance R depends on the carrier concentration within the i-layer, since (i) R decreases at higher voltages and (ii) devices with a wide-bandgap ilayers show a higher R than that of a-Si:H. Further, a data evaluation of the admittance of thin diodes is significantly affected by the variation of Cp at medium forward bias (Fig. 1), which cannot be explained by trapping of carriers in localized states and their reemission but by the variation of the space charge region. For diodes with di P 50 nm, a good agreement with experimental results was achieved describing the dynamic behavior of the diode by two frequency-independent RðV ÞCðV Þ elements. In the bias range between 0.5 and 0.8 V C1 and C2 increase by a factor of around 10 caused by the increased space charge and they differ less than a factor of 5. Fig. 5 shows the ratio of R1 =Rd and R2 =Rd as a function of the applied bias for diodes with different i-layer thicknesses. The slight increase of

The admittance (capacitance and conductance) of a series of amorphous silicon based diodes with an i-layer thickness between 35 and 300 nm was investigated. An electrical model describing the dynamic properties of n– i–p diodes was used to study its dynamic properties. Thin diodes exhibit an increase of Cp at medium forward bias in the whole frequency range which can be likely attributed to the thickness variation of the space charge region. The admittance of the whole series cannot be reproduced by using only one first-order RðV ÞCðV Þ circuit. However, the incorporation of two first-order RðV ÞCðV Þ elements leads to a good agreement with the experimental data in various operational regimes.

Acknowledgements The authors like to thank E. Bunte, W. Reetz and B. Rech for helpful discussions and gratefully acknowledge the financial support from German BMBF-DLR and Slovenian Ministry of Education, Science and Sport in the frame of bi-lateral project SVN 99/032 and the ‘Deutsche Forschungsgemeinschaft’ (Sti 181/1-1).

References [1] M. Topic, H. Stiebig, M. Krause, H. Wagner, Appl. Phys. Lett. 78 (2001) 2387. [2] M. Krause, M. Topic, H. Stiebig, H. Wagner, Phys. Stat. Sol. (A) 185 (2001) 121. [3] H. Stiebig, H. B€ uchner, E. Bunte, V. Mandryka, D. Knipp, G. J€ager, Appl. Phys. Lett. 83 (2003) 12. [4] D.A.B. Miller, IEEE J. Quantum Electron. 30 (1999) 732. [5] H. Stiebig, D. Knipp, J. Zimmer, H. Wagner, IEEE, Trans. Electron Dev. 45 (1998) 1438. [6] J. Krc, H. Stiebig, F. Smole, M. Topic, J. Non-Cryst. Solids 299– 302 (2002) 1295. [7] R. Br€ uggemann, N. Bernhard, C. Main, G.H. Bauer, Mater. Res. Soc. Symp. Proc 297 (1993) 415.