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HfO2 interface states by hydrogen
Materials Science and Engineering B 118 (2005) 197–200
Effect of interlayer composition on passivation of (1 0 0)Si/HfO2 interface states by hydrogen L. Truong, Y.G. Fedorenko, V. Afanas’ev, A. Stesmans∗ Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200D, B-3001 Leuven, Belgium
Abstract We report on a study of the influence of the particular HfO2 deposition process on the thermal passivation in molecular hydrogen of the (1 0 0)Si/HfO2 interface with the aim to minimize the interface trap density Dit . The HfO2 films, 5–10 nm thick, were grown on (1 0 0)Si by three different chemical vapour deposition (CVD) processes: atomic-layer (AL-CVD), metal-organic (MO-CVD), and nitrato CVD (N-CVD). The interface trap density Dit (E) profile for the (1 0 0)Si/HfO2 systems prior to and after passivation in H2 at 400 ◦ C has been analysed by the G–V and C–V methods. Sets of (1 0 0)Si/HfO2 samples prepared using the three indicated CVD techniques were compared both in the as-deposited state and after post-deposition annealing (PDA) in a N2 + 5% O2 mixture. The results show that the occurring Dit is highly sensitive to the type of deposition process used and can be reduced by PDA. It is inferred that the incorporation of nitrogen in interfacial layers significantly hampers the passivation efficiency. © 2005 Elsevier B.V. All rights reserved. Keywords: High-κ layers; Interface traps; Passivation; PDA; (1 0 0)Si/HfO2 system
1. Introduction Among the many candidate dielectrics considered for possible replacement of SiO2 in metal–oxide–semiconductor (MOS) electronic devices, the hafnium oxide (HfO2 ) is a leading contender due to its lower leakage current for the same equivalent oxide thickness as SiO2 [1], suitable dielectric constant (κ ≈ 15–25), and thermodynamic stability in contact with Si [2,3]. High quality HfO2 thin films have been deposited by various deposition techniques [4–6]. This deposition is often accompanied by growth of an interlayer such as silicon dioxide or silicon oxynitride which may also be formed during subsequent post-deposition thermal treatments. Though undesirable from the point of view of reduction of the effective oxide thickness, formation of a nitrogen (N)-containing interlayer might be beneficial in that it may prevent the interdiffusion and interaction of high-κ materials with silicon, acting as a diffusion barrier [7] both during metal oxide deposition and its subsequent annealing.
∗
Corresponding author. Tel.: +32 16 327179; fax: +32 16 327987. E-mail address: [email protected] (A. Stesmans).
0921-5107/$ – see front matter © 2005 Elsevier B.V. All rights reserved. doi:10.1016/j.mseb.2004.12.028
However, the presence of such interlayer might also hinder the transport of hydrogen needed to passivate the danglingbond-type defects at the (1 0 0)Si/HfO2 interface. As identified by the electron spin resonance (ESR) technique [8], these are predominantly Pb0 centers known to be highly efficient interface traps. Therefore, the passivation of Pb0 defects at the (1 0 0)Si/HfO2 interface is crucial for successful manufacturing of MOS devices. The present article discusses the influence of the chemical composition of the interlayer on the thermal passivation in molecular hydrogen of detrimental interface traps at the (1 0 0)Si/HfO2 interface.
2. Experimental Four types of samples were studied, fabricated by depositing 5–10 nm thick HfO2 on n- and p-type (1 0 0)Si substrates (labelled N, N2 , MO and AL) using three different chemical vapour deposition (CVD) processes. As to sample types N and N2 , the wet cleaning of the Si substrates entailed subjection to an RCA procedure, then dipping in a HF-water solution for 15 s, and finally blowing dry by N2 . In the sam-
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L. Truong et al. / Materials Science and Engineering B 118 (2005) 197–200
ples denoted N, HfO2 films were grown using CVD from the nitrato (N) precursor Hf(NO3 )4 at 350 ◦ C. During this deposition, a 1.5 nm thick SiON layer grew between the Si substrate and the HfO2 film [9]. In samples type N2 to prevent Si oxidation by byproducts of the Hf(NO3 )4 decomposition, a 1.2–1.5 nm thick Si3 N4 layer was grown in NH3 at 900 ◦ C prior to the N-CVD deposition of HfO2 . Both the sample types MO and AL were prepared on Si substrates subjected to the IMEC clean [10], followed by a final Si oxidation in ozonated water to grow a thin (∼0.7 nm) chemical SiOx layer needed to improve HfO2 nucleation. The MO samples were then produced by metal-organic (MO) CVD at 485 ◦ C using tetrakisdiethylaminohafnium and O2 as precursors. The AL samples were obtained using atomic-layer (AL) CVD from HfCl4 and H2 O at 300 ◦ C. To eliminate the hydrogen factor, the samples grown by MO and AL-CVD were depassivated using illumination of the interface with 10 eV photons (∼1016 photons/cm2 ), the energy of which is sufficient to photo-dissociate Si H bonds [11]. Sets of sample were divided into two groups, one was left in the as-deposited state and the other was subjected to a post-deposition annealing (PDA) in N2 + 5% O2 at 800 ◦ C for 10 min. Next, both groups were passivated in pure H2 (1.1 atm) at 400 ◦ C for 30 min. MOS capacitors with an area ranging from 5 × 10−4 to 1.25 × 10−3 cm2 were formed by thermoresistive evaporation of Au electrodes through a shadow mask in high vacuum from a resistively heated W boat. In order to evaluate the Si/HfO2 interface trap density Dit , ac conductance–voltage (G–V) and capacitance–voltage (C–V) measurements (20 Hz–1 MHz) were performed using a HP4284A LCR meter at room temperature. The interface trap distribution was either extracted by the G–V method or from the low frequency C–V curves according to the Berglund procedure [12]. In the latter case, corona charging of the bare oxide surrounding the MOS gate was applied to supply minority charge carriers if their equilibrium concentration at the interface cannot be reached otherwise. With the G–V method, Dit was calculated from the equation Gp Dit = [fD (σS )q]−1 , (1) ω max
and lower part of the silicon bandgap were obtained by using n- and p-type MOS capacitors. There are various interesting aspects: a first observation is that all samples in the asdeposited state exhibit two clear separate peaks in the Dit (E) profiles within the Si bandgap placed on top of a standard Ushaped continuum. They are located at EV + (0.23–0.3) eV and EV + (0.83–0.95) eV above the valence band edge (EV ) of silicon. From combination of electrical measurements with ESR analysis these peaks have been shown to correlate with the Pb0 -type interface defect, the peaks respectively corresponding to +/0 and 0/− transitions occurring when electrons are trapped by this amphoteric interface defect (trap) [14]. Second, there is a dependence of Dit , and, correlatively, of the intensities of the peaks, on the kind of CVD process applied. For both the samples N2 and N, Dit is significantly higher than for the MO and AL ones, the latter two exhibiting comparable trap densities. This trend is clearly mirrored by the peak Dit values (read at the peak maximum) in the Dit (E) curves, listed in Table 1 for all samples, both in as-deposited state and after PDA (obtained using the G–V method), clearly exposing the above inferred trend. These observations show that there is a clear interlayer-dependent variation in Dit , a high Dit always being observed for samples that contain nitrogen. The PDA causes a strong reduction in Dit as exposed by the results obtained by the G–V (open symbols) and C–V (filled symbols) methods shown in Fig. 1b. The two peaks in the Dit (E) profiles are still observed, but in a much reduced intensity. Possibly this has resulted from the growth of additional interlayer (SiOx ) between the HfO2 and Si substrate
where Gp is the equivalent parallel conductance (averaged bond-bending variations), ω the angular frequency of the probing signal, q the elementary charge, (Gp /ω)max the peak value of the Gp /ω versus log ω curve, and fD (σ S ) the standard deviation of the surface potential as described by Nicollian and Brews [13].
3. Results and discussion As a first step, the G–V technique was applied in order to extract Dit of as-deposited samples and those subjected to PDA. The Dit values as a function of energy E in the Si bandgap for the as-deposited samples and after PDA are shown in Fig. 1a and b, respectively. The results in the upper
Fig. 1. Interface trap density Dit as a function of energy in the Si bandgap before passivation for (a) as-deposited samples obtained by the G–V method and (b) after PDA measured by the G–V (open symbols) and C–V (solid symbols) methods. The results for samples with HfO2 layers grown using different CVD methods are presented by different symbols: N-CVD on Si3 N4 (, ) and Si ( , 䊉); MO-CVD ( , ); AL-CVD (♦, ).
L. Truong et al. / Materials Science and Engineering B 118 (2005) 197–200
199
Table 1 Measured Dit values (from G–V method) at the peak positions in the Dit (E) profiles for the various types of (100)Si/interlayer/HfO2 samples prior to passivation in H2 at 400 ◦ C Sample
Interlayer
Si-substrate type
As-deposited (1013 cm−2 eV−1 )
PDA (1012 cm−2 eV−1 )
N2
1.2–1.5 nm Si3 N4
p n
8.2 ± 0.6 8.0 ± 0.6
4.8 ± 0.8 9.3 ± 1.0
N
1.5 nm SiON
p n
2.8 ± 0.2 3.7 ± 0.2
1.8 ± 0.3 2.2 ± 0.3
MOa
0.7 nm SiOx
p n
1.4 ± 0.1 1.4 ± 0.1
1.0 ± 0.1 1.4 ± 0.2
ALa
0.7 nm SiOx
p n
1.3 ± 0.1 1.2 ± 0.1
0.5 ± 0.1 0.4 ± 0.1
a The as-deposited samples fabricated in H-containing ambient received an additional photo-depassivation treatment to eliminate the hydrogen passivation factor.
Table 2 Dit values (from G–V method) near the silicon midgap measured for the various types of (1 0 0)Si/interlayer/HfO2 samples after passivation in H2 at 400 ◦ C Sample
Interlayer
Si-substrate type
As-deposited (1012 cm−2 eV−1 )
PDA (1011 cm−2 eV−1 )
N2
1.2–1.5 nm Si3 N4
p n
15 ± 1 14 ± 1
22 ± 3 12 ± 2
N
1.5 nm SiON
p n
4 ± 0.3 2 ± 0.1
9±2 5±1
MO
0.7 nm SiOx
p n
0.9 ± 0.2 0.7 ± 0.1
AL
0.7 nm SiOx
p n
1.5 ± 0.3 0.5 ± 0.1
(interlayer modification) during PDA which would establish a more “Si/SiO2 -like” interface. Nevertheless, the chemistry of the CVD process applied is still reflected in the Dit observed after PDA. We also note that the C–V results generally exhibit larger Dit values near the band edges, possibly related to the contribution of slow traps located in the insulator. In addition, one may notice in Fig. 1b that for N-free samples the Dit peaks are shifted towards the silicon midgap. With this respect, the G–V and C–V results agree reasonably well. Likewise, we have extracted Dit values (using the G–V method) in the energy range close to the Si midgap for all samples, both in the as-grown and PDA state after passivation in H2 at 400 ◦ C, which are given in Table 2 and shown graphically in Fig. 2. As a first observation, some peak features are still observed in the Dit (E) profiles, albeit blurred and much less well defined. Not unexpectedly, this indicates that the Pb0 defects at the (1 0 0)Si/HfO2 interface can be passivated, at least partly, by molecular hydrogen at 400 ◦ C, similar to the conventional Si/SiO2 case. The hydrogen treatment of the as-deposited samples N and N2 (data for MO and AL samples are unavailable because of excessive leakage currents observed after annealing in pure H2 ) still leaves a considerable density of traps, apparently in correlation with the concentration of nitrogen in the interlayer. By contrast, from both the G–V and C–V data shown in Fig. 2b, Dit is found to be much reduced in samples subjected to PDA before the H2 passivation step. It reveals a decisive impact of the PDA treatment. A second observation is that Dit in the
Fig. 2. Interface trap density Dit as a function of energy in the Si bandgap after passivation treatment in H2 inferred by the G–V (open symbols) and C–V (solid symbols) methods for (1 0 0)Si/interlayer/HfO2 entities in the (a) as-deposited state and (b) after PDA treatment. The results for samples with HfO2 layers grown using different CVD methods are presented by different symbols: N-CVD on Si3 N4 (, ) and Si ( , 䊉); MO-CVD ( , ); ALCVD (♦, ).
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Fig. 3. Effect of the interlayer in (1 0 0)Si/interlayer/HfO2 structures, expressed as the ratio of peak Dit values (G–V method) inferred before and after H2 annealing, on the passivation efficiency of as-deposited (squares) and oxidized (circles) samples by hydrogen. Open and solid symbols represent p- and n-type capacitors, respectively.
lower part of the bandgap is higher than in the upper part. This may be due to the formation of silicate-related states during PDA at 800 ◦ C, leading to a higher density of trap levels in the lower part of Si bandgap. Third, we observe that in the n-type samples, the Dit of the MO sample is higher than for the AL sample which could be related to the contamination of the interlayer by carbon during the HfO2 film deposition using the metallo-organic precursor. Additionally, in the N-free samples there appears an even more enhanced asymmetry in the Dit distribution between the lower and upper halves of the Si bandgap. Also, the Dit obtained by the C–V method is generally higher than the Dit data inferred using the G–V method signalling the occurrence of slow oxide traps. Therefore, the defects associated with the insulating interlayer provide the major contribution to the interface trap density observed at the (1 0 0)Si/HfO2 interfaces after hydrogen passivation. The effect of the interlayer modalities on the efficiency of the treatment in H2 on the various (1 0 0)Si/interlayer/HfO2 entities studied is additionally depicted in Fig. 3, in terms of the ratio of the peak Dit values (obtained by G–V method) before and after the H2 passivation step. We observe that the incorporation of N into the interlayer impairs the passivation efficiency in the samples based on p-type silicon. This behavior suggests that nitrogen-related defects represent another factor accounting for the high density of traps in the lower part of the Si bandgap resistant to passivation by hydrogen.
4. Conclusions The interface trap density Dit (E) profile for (1 0 0)Si/ interlayer/HfO2 systems independently determined using the
electrical G–V and C–V methods is found highly sensitive to the type of HfO2 deposition process. In the as-prepared samples the Dit is high for the N-CVD process as compared to the MO-CVD and AL-CVD ones, which is attributed to a higher density of the silicon dangling-bond defects and nitrogenrelated traps in the insulator. The trap density is significantly reduced in all cases by PDA at 800 ◦ C in a N2 + 5% O2 mixture, but the higher concentration of N in the interlayer is still resulting in a higher interface state density. From electrical measurements in conjunction with ESR analysis, two peaks in the interface trap density Dit (E) profile within Si bandgap are associated with the Pb0 interface defects. These defects can be efficiently passivated by molecular hydrogen at 400 ◦ C. The incorporation of nitrogen in the interfacial layer between Si and HfO2 is found to hamper the efficiency of the passivating anneal indicating the presence of stable N-related trapping centers.
Acknowledgements The authors would like to thank S. De Gent and M.M. Heyns (IMEC, Belgium) and F. Chen and S.A. Campbell (University of Minnesota, USA) for providing the samples.
References [1] M.A. Quevedo-Lopez, M. El-Bouanani, B.E. Gnade, R.M. Wallace, M.R. Visokay, M. Douglas, M.J. Bevan, L. Colombo, J. Appl. Phys. 92 (2002) 3540. [2] J. Aarik, A. Aidla, A.A. Kiisler, T. Uustare, V. Sammelselg, Thin Solid Films 340 (1999) 110. [3] B.H. Lee, L. Kang, R. Nieh, W.J. Qi, J.C. Lee, Appl. Phys. Lett. 76 (2000) 1926. [4] S. Sayan, S. Aravamudhan, B.W. Busch, W.H. Schulte, F. Cosandey, G.D. Wilk, T. Gustafsson, E. Garfunkel, J. Vac. Sci. Technol. A 20 (2002) 507. [5] L. Kang, K. Onishi, Y. Jeon, B.H. Lee, C. Kang, W.J. Qi, R. Nieh, S. Gopalan, R. Choi, J.C. Lee, Tech. Dig. Int. Electron Devices Meet. 35 (2000) 2000. [6] B.H. Lee, R. Choi, L. Kang, S. Gopalan, R. Nieh, K. Onishi, Y. Jeon, W.J. Qi, C. Kang, J.C. Lee, Tech. Dig. Int. Electron Devices Meet. 39 (2000) 2000. [7] I.J.R. Baumvol, Surf. Sci. Rep. 36 (1999) 1. [8] A. Stesmans, V.V. Afanas’ev, Appl. Phys. Lett. 82 (2003) 4074. [9] S.A. Campbell, T.Z. Ma, R. Smith, W.L. Gladfelter, F. Chen, Microeletron. Eng. 59 (2001) 361. [10] M. Meuris, S. Verhaverbeke, P.W. Mertens, H.F. Schmidt, M.M. Heyns, M. Kubota, A. Philipossian, K. Dillenbeeck, D. Gr¨af, A. Schnegg, R. de Blank, Microelectron. Eng. 22 (1993) 21. [11] A. Pusel, U. Wetterauer, P. Hess, Phys. Rev. Lett. 81 (1998) 645. [12] C.N. Berglund, IEEE Trans. Electron. Dev. ED-13 (1966) 701. [13] E.H. Nicollian, J. Brews, MOS Physics and Technology, Wiley, New York, 1982. [14] E.H. Poindexter, Semicond. Sci. Technol. 4 (1989) 961.
Effect of interlayer composition on passivation of (1 0 0)Si/HfO2 interface states by hydrogen L. Truong, Y.G. Fedorenko, V. Afanas’ev, A. Stesmans∗ Department of Physics and Astronomy, University of Leuven, Celestijnenlaan 200D, B-3001 Leuven, Belgium
Abstract We report on a study of the influence of the particular HfO2 deposition process on the thermal passivation in molecular hydrogen of the (1 0 0)Si/HfO2 interface with the aim to minimize the interface trap density Dit . The HfO2 films, 5–10 nm thick, were grown on (1 0 0)Si by three different chemical vapour deposition (CVD) processes: atomic-layer (AL-CVD), metal-organic (MO-CVD), and nitrato CVD (N-CVD). The interface trap density Dit (E) profile for the (1 0 0)Si/HfO2 systems prior to and after passivation in H2 at 400 ◦ C has been analysed by the G–V and C–V methods. Sets of (1 0 0)Si/HfO2 samples prepared using the three indicated CVD techniques were compared both in the as-deposited state and after post-deposition annealing (PDA) in a N2 + 5% O2 mixture. The results show that the occurring Dit is highly sensitive to the type of deposition process used and can be reduced by PDA. It is inferred that the incorporation of nitrogen in interfacial layers significantly hampers the passivation efficiency. © 2005 Elsevier B.V. All rights reserved. Keywords: High-κ layers; Interface traps; Passivation; PDA; (1 0 0)Si/HfO2 system
1. Introduction Among the many candidate dielectrics considered for possible replacement of SiO2 in metal–oxide–semiconductor (MOS) electronic devices, the hafnium oxide (HfO2 ) is a leading contender due to its lower leakage current for the same equivalent oxide thickness as SiO2 [1], suitable dielectric constant (κ ≈ 15–25), and thermodynamic stability in contact with Si [2,3]. High quality HfO2 thin films have been deposited by various deposition techniques [4–6]. This deposition is often accompanied by growth of an interlayer such as silicon dioxide or silicon oxynitride which may also be formed during subsequent post-deposition thermal treatments. Though undesirable from the point of view of reduction of the effective oxide thickness, formation of a nitrogen (N)-containing interlayer might be beneficial in that it may prevent the interdiffusion and interaction of high-κ materials with silicon, acting as a diffusion barrier [7] both during metal oxide deposition and its subsequent annealing.
∗
Corresponding author. Tel.: +32 16 327179; fax: +32 16 327987. E-mail address: [email protected] (A. Stesmans).
0921-5107/$ – see front matter © 2005 Elsevier B.V. All rights reserved. doi:10.1016/j.mseb.2004.12.028
However, the presence of such interlayer might also hinder the transport of hydrogen needed to passivate the danglingbond-type defects at the (1 0 0)Si/HfO2 interface. As identified by the electron spin resonance (ESR) technique [8], these are predominantly Pb0 centers known to be highly efficient interface traps. Therefore, the passivation of Pb0 defects at the (1 0 0)Si/HfO2 interface is crucial for successful manufacturing of MOS devices. The present article discusses the influence of the chemical composition of the interlayer on the thermal passivation in molecular hydrogen of detrimental interface traps at the (1 0 0)Si/HfO2 interface.
2. Experimental Four types of samples were studied, fabricated by depositing 5–10 nm thick HfO2 on n- and p-type (1 0 0)Si substrates (labelled N, N2 , MO and AL) using three different chemical vapour deposition (CVD) processes. As to sample types N and N2 , the wet cleaning of the Si substrates entailed subjection to an RCA procedure, then dipping in a HF-water solution for 15 s, and finally blowing dry by N2 . In the sam-
198
L. Truong et al. / Materials Science and Engineering B 118 (2005) 197–200
ples denoted N, HfO2 films were grown using CVD from the nitrato (N) precursor Hf(NO3 )4 at 350 ◦ C. During this deposition, a 1.5 nm thick SiON layer grew between the Si substrate and the HfO2 film [9]. In samples type N2 to prevent Si oxidation by byproducts of the Hf(NO3 )4 decomposition, a 1.2–1.5 nm thick Si3 N4 layer was grown in NH3 at 900 ◦ C prior to the N-CVD deposition of HfO2 . Both the sample types MO and AL were prepared on Si substrates subjected to the IMEC clean [10], followed by a final Si oxidation in ozonated water to grow a thin (∼0.7 nm) chemical SiOx layer needed to improve HfO2 nucleation. The MO samples were then produced by metal-organic (MO) CVD at 485 ◦ C using tetrakisdiethylaminohafnium and O2 as precursors. The AL samples were obtained using atomic-layer (AL) CVD from HfCl4 and H2 O at 300 ◦ C. To eliminate the hydrogen factor, the samples grown by MO and AL-CVD were depassivated using illumination of the interface with 10 eV photons (∼1016 photons/cm2 ), the energy of which is sufficient to photo-dissociate Si H bonds [11]. Sets of sample were divided into two groups, one was left in the as-deposited state and the other was subjected to a post-deposition annealing (PDA) in N2 + 5% O2 at 800 ◦ C for 10 min. Next, both groups were passivated in pure H2 (1.1 atm) at 400 ◦ C for 30 min. MOS capacitors with an area ranging from 5 × 10−4 to 1.25 × 10−3 cm2 were formed by thermoresistive evaporation of Au electrodes through a shadow mask in high vacuum from a resistively heated W boat. In order to evaluate the Si/HfO2 interface trap density Dit , ac conductance–voltage (G–V) and capacitance–voltage (C–V) measurements (20 Hz–1 MHz) were performed using a HP4284A LCR meter at room temperature. The interface trap distribution was either extracted by the G–V method or from the low frequency C–V curves according to the Berglund procedure [12]. In the latter case, corona charging of the bare oxide surrounding the MOS gate was applied to supply minority charge carriers if their equilibrium concentration at the interface cannot be reached otherwise. With the G–V method, Dit was calculated from the equation Gp Dit = [fD (σS )q]−1 , (1) ω max
and lower part of the silicon bandgap were obtained by using n- and p-type MOS capacitors. There are various interesting aspects: a first observation is that all samples in the asdeposited state exhibit two clear separate peaks in the Dit (E) profiles within the Si bandgap placed on top of a standard Ushaped continuum. They are located at EV + (0.23–0.3) eV and EV + (0.83–0.95) eV above the valence band edge (EV ) of silicon. From combination of electrical measurements with ESR analysis these peaks have been shown to correlate with the Pb0 -type interface defect, the peaks respectively corresponding to +/0 and 0/− transitions occurring when electrons are trapped by this amphoteric interface defect (trap) [14]. Second, there is a dependence of Dit , and, correlatively, of the intensities of the peaks, on the kind of CVD process applied. For both the samples N2 and N, Dit is significantly higher than for the MO and AL ones, the latter two exhibiting comparable trap densities. This trend is clearly mirrored by the peak Dit values (read at the peak maximum) in the Dit (E) curves, listed in Table 1 for all samples, both in as-deposited state and after PDA (obtained using the G–V method), clearly exposing the above inferred trend. These observations show that there is a clear interlayer-dependent variation in Dit , a high Dit always being observed for samples that contain nitrogen. The PDA causes a strong reduction in Dit as exposed by the results obtained by the G–V (open symbols) and C–V (filled symbols) methods shown in Fig. 1b. The two peaks in the Dit (E) profiles are still observed, but in a much reduced intensity. Possibly this has resulted from the growth of additional interlayer (SiOx ) between the HfO2 and Si substrate
where Gp is the equivalent parallel conductance (averaged bond-bending variations), ω the angular frequency of the probing signal, q the elementary charge, (Gp /ω)max the peak value of the Gp /ω versus log ω curve, and fD (σ S ) the standard deviation of the surface potential as described by Nicollian and Brews [13].
3. Results and discussion As a first step, the G–V technique was applied in order to extract Dit of as-deposited samples and those subjected to PDA. The Dit values as a function of energy E in the Si bandgap for the as-deposited samples and after PDA are shown in Fig. 1a and b, respectively. The results in the upper
Fig. 1. Interface trap density Dit as a function of energy in the Si bandgap before passivation for (a) as-deposited samples obtained by the G–V method and (b) after PDA measured by the G–V (open symbols) and C–V (solid symbols) methods. The results for samples with HfO2 layers grown using different CVD methods are presented by different symbols: N-CVD on Si3 N4 (, ) and Si ( , 䊉); MO-CVD ( , ); AL-CVD (♦, ).
L. Truong et al. / Materials Science and Engineering B 118 (2005) 197–200
199
Table 1 Measured Dit values (from G–V method) at the peak positions in the Dit (E) profiles for the various types of (100)Si/interlayer/HfO2 samples prior to passivation in H2 at 400 ◦ C Sample
Interlayer
Si-substrate type
As-deposited (1013 cm−2 eV−1 )
PDA (1012 cm−2 eV−1 )
N2
1.2–1.5 nm Si3 N4
p n
8.2 ± 0.6 8.0 ± 0.6
4.8 ± 0.8 9.3 ± 1.0
N
1.5 nm SiON
p n
2.8 ± 0.2 3.7 ± 0.2
1.8 ± 0.3 2.2 ± 0.3
MOa
0.7 nm SiOx
p n
1.4 ± 0.1 1.4 ± 0.1
1.0 ± 0.1 1.4 ± 0.2
ALa
0.7 nm SiOx
p n
1.3 ± 0.1 1.2 ± 0.1
0.5 ± 0.1 0.4 ± 0.1
a The as-deposited samples fabricated in H-containing ambient received an additional photo-depassivation treatment to eliminate the hydrogen passivation factor.
Table 2 Dit values (from G–V method) near the silicon midgap measured for the various types of (1 0 0)Si/interlayer/HfO2 samples after passivation in H2 at 400 ◦ C Sample
Interlayer
Si-substrate type
As-deposited (1012 cm−2 eV−1 )
PDA (1011 cm−2 eV−1 )
N2
1.2–1.5 nm Si3 N4
p n
15 ± 1 14 ± 1
22 ± 3 12 ± 2
N
1.5 nm SiON
p n
4 ± 0.3 2 ± 0.1
9±2 5±1
MO
0.7 nm SiOx
p n
0.9 ± 0.2 0.7 ± 0.1
AL
0.7 nm SiOx
p n
1.5 ± 0.3 0.5 ± 0.1
(interlayer modification) during PDA which would establish a more “Si/SiO2 -like” interface. Nevertheless, the chemistry of the CVD process applied is still reflected in the Dit observed after PDA. We also note that the C–V results generally exhibit larger Dit values near the band edges, possibly related to the contribution of slow traps located in the insulator. In addition, one may notice in Fig. 1b that for N-free samples the Dit peaks are shifted towards the silicon midgap. With this respect, the G–V and C–V results agree reasonably well. Likewise, we have extracted Dit values (using the G–V method) in the energy range close to the Si midgap for all samples, both in the as-grown and PDA state after passivation in H2 at 400 ◦ C, which are given in Table 2 and shown graphically in Fig. 2. As a first observation, some peak features are still observed in the Dit (E) profiles, albeit blurred and much less well defined. Not unexpectedly, this indicates that the Pb0 defects at the (1 0 0)Si/HfO2 interface can be passivated, at least partly, by molecular hydrogen at 400 ◦ C, similar to the conventional Si/SiO2 case. The hydrogen treatment of the as-deposited samples N and N2 (data for MO and AL samples are unavailable because of excessive leakage currents observed after annealing in pure H2 ) still leaves a considerable density of traps, apparently in correlation with the concentration of nitrogen in the interlayer. By contrast, from both the G–V and C–V data shown in Fig. 2b, Dit is found to be much reduced in samples subjected to PDA before the H2 passivation step. It reveals a decisive impact of the PDA treatment. A second observation is that Dit in the
Fig. 2. Interface trap density Dit as a function of energy in the Si bandgap after passivation treatment in H2 inferred by the G–V (open symbols) and C–V (solid symbols) methods for (1 0 0)Si/interlayer/HfO2 entities in the (a) as-deposited state and (b) after PDA treatment. The results for samples with HfO2 layers grown using different CVD methods are presented by different symbols: N-CVD on Si3 N4 (, ) and Si ( , 䊉); MO-CVD ( , ); ALCVD (♦, ).
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Fig. 3. Effect of the interlayer in (1 0 0)Si/interlayer/HfO2 structures, expressed as the ratio of peak Dit values (G–V method) inferred before and after H2 annealing, on the passivation efficiency of as-deposited (squares) and oxidized (circles) samples by hydrogen. Open and solid symbols represent p- and n-type capacitors, respectively.
lower part of the bandgap is higher than in the upper part. This may be due to the formation of silicate-related states during PDA at 800 ◦ C, leading to a higher density of trap levels in the lower part of Si bandgap. Third, we observe that in the n-type samples, the Dit of the MO sample is higher than for the AL sample which could be related to the contamination of the interlayer by carbon during the HfO2 film deposition using the metallo-organic precursor. Additionally, in the N-free samples there appears an even more enhanced asymmetry in the Dit distribution between the lower and upper halves of the Si bandgap. Also, the Dit obtained by the C–V method is generally higher than the Dit data inferred using the G–V method signalling the occurrence of slow oxide traps. Therefore, the defects associated with the insulating interlayer provide the major contribution to the interface trap density observed at the (1 0 0)Si/HfO2 interfaces after hydrogen passivation. The effect of the interlayer modalities on the efficiency of the treatment in H2 on the various (1 0 0)Si/interlayer/HfO2 entities studied is additionally depicted in Fig. 3, in terms of the ratio of the peak Dit values (obtained by G–V method) before and after the H2 passivation step. We observe that the incorporation of N into the interlayer impairs the passivation efficiency in the samples based on p-type silicon. This behavior suggests that nitrogen-related defects represent another factor accounting for the high density of traps in the lower part of the Si bandgap resistant to passivation by hydrogen.
4. Conclusions The interface trap density Dit (E) profile for (1 0 0)Si/ interlayer/HfO2 systems independently determined using the
electrical G–V and C–V methods is found highly sensitive to the type of HfO2 deposition process. In the as-prepared samples the Dit is high for the N-CVD process as compared to the MO-CVD and AL-CVD ones, which is attributed to a higher density of the silicon dangling-bond defects and nitrogenrelated traps in the insulator. The trap density is significantly reduced in all cases by PDA at 800 ◦ C in a N2 + 5% O2 mixture, but the higher concentration of N in the interlayer is still resulting in a higher interface state density. From electrical measurements in conjunction with ESR analysis, two peaks in the interface trap density Dit (E) profile within Si bandgap are associated with the Pb0 interface defects. These defects can be efficiently passivated by molecular hydrogen at 400 ◦ C. The incorporation of nitrogen in the interfacial layer between Si and HfO2 is found to hamper the efficiency of the passivating anneal indicating the presence of stable N-related trapping centers.
Acknowledgements The authors would like to thank S. De Gent and M.M. Heyns (IMEC, Belgium) and F. Chen and S.A. Campbell (University of Minnesota, USA) for providing the samples.
References [1] M.A. Quevedo-Lopez, M. El-Bouanani, B.E. Gnade, R.M. Wallace, M.R. Visokay, M. Douglas, M.J. Bevan, L. Colombo, J. Appl. Phys. 92 (2002) 3540. [2] J. Aarik, A. Aidla, A.A. Kiisler, T. Uustare, V. Sammelselg, Thin Solid Films 340 (1999) 110. [3] B.H. Lee, L. Kang, R. Nieh, W.J. Qi, J.C. Lee, Appl. Phys. Lett. 76 (2000) 1926. [4] S. Sayan, S. Aravamudhan, B.W. Busch, W.H. Schulte, F. Cosandey, G.D. Wilk, T. Gustafsson, E. Garfunkel, J. Vac. Sci. Technol. A 20 (2002) 507. [5] L. Kang, K. Onishi, Y. Jeon, B.H. Lee, C. Kang, W.J. Qi, R. Nieh, S. Gopalan, R. Choi, J.C. Lee, Tech. Dig. Int. Electron Devices Meet. 35 (2000) 2000. [6] B.H. Lee, R. Choi, L. Kang, S. Gopalan, R. Nieh, K. Onishi, Y. Jeon, W.J. Qi, C. Kang, J.C. Lee, Tech. Dig. Int. Electron Devices Meet. 39 (2000) 2000. [7] I.J.R. Baumvol, Surf. Sci. Rep. 36 (1999) 1. [8] A. Stesmans, V.V. Afanas’ev, Appl. Phys. Lett. 82 (2003) 4074. [9] S.A. Campbell, T.Z. Ma, R. Smith, W.L. Gladfelter, F. Chen, Microeletron. Eng. 59 (2001) 361. [10] M. Meuris, S. Verhaverbeke, P.W. Mertens, H.F. Schmidt, M.M. Heyns, M. Kubota, A. Philipossian, K. Dillenbeeck, D. Gr¨af, A. Schnegg, R. de Blank, Microelectron. Eng. 22 (1993) 21. [11] A. Pusel, U. Wetterauer, P. Hess, Phys. Rev. Lett. 81 (1998) 645. [12] C.N. Berglund, IEEE Trans. Electron. Dev. ED-13 (1966) 701. [13] E.H. Nicollian, J. Brews, MOS Physics and Technology, Wiley, New York, 1982. [14] E.H. Poindexter, Semicond. Sci. Technol. 4 (1989) 961.