- Email: [email protected]
Effect of planarization on VLSI processing
386
World Abstracts on Microelectronics and Reliability
the maximum permissible leak rates specified in the military standards are too large by at least three orders of magnitude, and that for microelectronic packages the true values are too small to measure. The good news is that the true permissible leak rate can be raised by four orders of magnitude or more by the inclusion in the package of a means to capture water as it enters through small leaks. Three different means are presented.
High reliable package designing of the surface mount device; PLCC. AKIRASHINOHARAand TUTOMUISmGURO. Proc. 15 th Symp. Reliab. Maintainab. (Union of Japanese Scientists and Engineers, Tokyo), 13 (1985). Recently the electronic equipments are becoming compact and light. Accordingly electronic components are required to be small size and high density. On this purpose we succeeded to develop very small and high density special PLCC (Plastic Leaded Chip Carrier) packages. This new PLCC is 1/20 in volume in comparison to the standard IC package and 1/3 of the SO packages. Outer lead pitch is 0.6ram. Although this new PLCC is quite small package, showed excellent reliability. Markable good points are possible to direct-solder and to reflow-solder. No coating is necessary in order to keep high reliability after soldermounting on the circuit board. We believe this new PLCC is the best SMD (Surface Mounting Device) which realize high density compact circuit board. Recent IC assembly technology and reliability Ag paste glue die bonding. AKIRA SHINOI-IARAand SHINJI OKAMURA.Proc. 15 th S yrap. Reliab. M aintainab. (Union of Japanese Scientists and Engineers, Tokyo), 15 (1985). Recently reliability of IC has been remarkably improved, but IC customers always require lower price and higher reliability. Under such background we are pursuiting low cost assembly process. For this purpose IC makers are making effort to save the gold. The gold plating of the lead frame is changing to the silver plating. We can see new movement concerning the DIE ATTACHING material and its technology. The die attaching is also called die bonding, this process means bonding the silicon chip on the lead frame. As the die attaching technology it is well known the glass die attaching, gold-silicon eutectic die attaching, soft solder die attaching and glue die attaching. Recently the glue die attaching is becoming dominant because of it's cost reason. Good points of using the glue material on the die bonding process are low cost and less stress to the silicon chip. Bad points of the present glue material and the glue die attaching process using these glue are weak bonding strength in comparison to the gold silicon eutectic bonding and needing long curling time. Our aims are develop the new glue material which is possible fast curing and making the continuous assembly process. Designing and manufacturing surface mount assemblies. ELIZABETH GUNTHER, CHARLES L. HUTCFnNS and PAUL PETERSON. Microelectron. J. 17 (2), 13 (1986). The competitive nature of the semiconductor industry has driven vendors to continually minimize the size of electronic components, so that more functions can be achieved in a given volume. In addition, improved electronic performance, decreased mass, and the potential for lower system cost are all by products of compacted packaging and circuitry which hold interest to component manufacturers and users alike. Surface mount technology offers an excellent method of reducing component size. A typical memory array can be reduced to 50% of its original PWB size with single-sided mounting, and 25-30% with double-sided mounting. Logoc designs cannot achieve the same dramatic reduction, but decreases up to 40% and 60% can be achieved for single-sided and double-sided assemblies respectively. The key design and manufacturing process issues must be
understood in order to fully reap the benefits of surface mount technology. This article gives a general overview of the key aspects of design, process, and manufacturing of surface mounted assemblies, and offers surface mount as an opportunity to lower a system's cost without sacrificing reliablity.
Ultradense chips: the drive quickens. BERNARDCONRADCOLE. Electronics, 37 (28 April 1986). 3-D structures and superlattices will help breach VLSI barrier. One micron lithography using a dyed resist on highly reflective topography. M. BOLSEN,G. BURR, H. J. MERREMand K. VAN WERDEN. Solid St. Technol., 83 (February 1986). Highresolution patterning is hampered by limitations of optical lithography, particularly on highly reflective surfaces with pronounced topography. Three major effects influence linewidth variations over steps, viz. the bulk effect, the interference effect, and the light scattering effect. It is shown experimentally that the light scattering is the dominant cause of severe distortions of 1 #m patterns on grainy aluminum topography. These distortions can be minimized by the use of the dyed photoresist. Effect of planarizafion on VLSI processing. R. H. WILSON and P. A. PIACENTE.Semiconductor int., 116 (April 1986). The best choice for accommodating the variation of planarization resist thicknesses depends on design rules and process steps. Surface mount technology for high reliability telecoms applications. K. TAYLOR. Circuit Wld 12(3), 27 (1986). The technology of printed circuit boards suitable for surface mount assembly is discussed with reference to solder mount tolerances and board finishing. Some design features which aid the production of reliable assemblies are described. The importance of preconditioning surface mount components with the soldering conditions to be utilised during the assembly process is emphasized. Some data which show the suitability of both SOIC and small PLCC packaged components, which have been vapour phase reflow soldered, are given. The reliability for long-life applications of surface mount components and assembhes has not been demonstrated in general as yet and all manufacturers of such assemblies must validate their own assembly methods and components. The impact of surface mount technology on electronics manufacturing. GLENDA DERMAN. Microelectron. J. 17 (2), 5 (1986). This major multiclient study from Gnostic Concepts covers the entire topic of the impact of surface mount technology and includes detailed analyses of components, packages, substrates, OEM requirements, manufacturing trends, and important business issues in a thorough, concise manner. This comprehensive study examines the factors involved in the selection and implementation of surface mount technology, as it affects suppliers and materials, substrates, components, equipment vendors, and original equipment manufacturers in the electronics industry. Forecasts for surface mount components are in terms of dollar value, quantity, price, and rate of penetration. The technology of computer-aided design. PE~R H. SINGER. Semiconductor int., 108 (February 1986). From circuit conception to mask generation, the following pages will present the reader with a look at the state of the art in computer-aided design, a technology which is dramatically changing the future of the electronics industry. Fourteen experts were invited to report on current trends in their respective areas of knowledge, and give some insights into what the future may hold. Their results provide a timely and thought provoking look at the tools and techniques of today's IC designer. These t4 articles are contained within five sections, each
World Abstracts on Microelectronics and Reliability
the maximum permissible leak rates specified in the military standards are too large by at least three orders of magnitude, and that for microelectronic packages the true values are too small to measure. The good news is that the true permissible leak rate can be raised by four orders of magnitude or more by the inclusion in the package of a means to capture water as it enters through small leaks. Three different means are presented.
High reliable package designing of the surface mount device; PLCC. AKIRASHINOHARAand TUTOMUISmGURO. Proc. 15 th Symp. Reliab. Maintainab. (Union of Japanese Scientists and Engineers, Tokyo), 13 (1985). Recently the electronic equipments are becoming compact and light. Accordingly electronic components are required to be small size and high density. On this purpose we succeeded to develop very small and high density special PLCC (Plastic Leaded Chip Carrier) packages. This new PLCC is 1/20 in volume in comparison to the standard IC package and 1/3 of the SO packages. Outer lead pitch is 0.6ram. Although this new PLCC is quite small package, showed excellent reliability. Markable good points are possible to direct-solder and to reflow-solder. No coating is necessary in order to keep high reliability after soldermounting on the circuit board. We believe this new PLCC is the best SMD (Surface Mounting Device) which realize high density compact circuit board. Recent IC assembly technology and reliability Ag paste glue die bonding. AKIRA SHINOI-IARAand SHINJI OKAMURA.Proc. 15 th S yrap. Reliab. M aintainab. (Union of Japanese Scientists and Engineers, Tokyo), 15 (1985). Recently reliability of IC has been remarkably improved, but IC customers always require lower price and higher reliability. Under such background we are pursuiting low cost assembly process. For this purpose IC makers are making effort to save the gold. The gold plating of the lead frame is changing to the silver plating. We can see new movement concerning the DIE ATTACHING material and its technology. The die attaching is also called die bonding, this process means bonding the silicon chip on the lead frame. As the die attaching technology it is well known the glass die attaching, gold-silicon eutectic die attaching, soft solder die attaching and glue die attaching. Recently the glue die attaching is becoming dominant because of it's cost reason. Good points of using the glue material on the die bonding process are low cost and less stress to the silicon chip. Bad points of the present glue material and the glue die attaching process using these glue are weak bonding strength in comparison to the gold silicon eutectic bonding and needing long curling time. Our aims are develop the new glue material which is possible fast curing and making the continuous assembly process. Designing and manufacturing surface mount assemblies. ELIZABETH GUNTHER, CHARLES L. HUTCFnNS and PAUL PETERSON. Microelectron. J. 17 (2), 13 (1986). The competitive nature of the semiconductor industry has driven vendors to continually minimize the size of electronic components, so that more functions can be achieved in a given volume. In addition, improved electronic performance, decreased mass, and the potential for lower system cost are all by products of compacted packaging and circuitry which hold interest to component manufacturers and users alike. Surface mount technology offers an excellent method of reducing component size. A typical memory array can be reduced to 50% of its original PWB size with single-sided mounting, and 25-30% with double-sided mounting. Logoc designs cannot achieve the same dramatic reduction, but decreases up to 40% and 60% can be achieved for single-sided and double-sided assemblies respectively. The key design and manufacturing process issues must be
understood in order to fully reap the benefits of surface mount technology. This article gives a general overview of the key aspects of design, process, and manufacturing of surface mounted assemblies, and offers surface mount as an opportunity to lower a system's cost without sacrificing reliablity.
Ultradense chips: the drive quickens. BERNARDCONRADCOLE. Electronics, 37 (28 April 1986). 3-D structures and superlattices will help breach VLSI barrier. One micron lithography using a dyed resist on highly reflective topography. M. BOLSEN,G. BURR, H. J. MERREMand K. VAN WERDEN. Solid St. Technol., 83 (February 1986). Highresolution patterning is hampered by limitations of optical lithography, particularly on highly reflective surfaces with pronounced topography. Three major effects influence linewidth variations over steps, viz. the bulk effect, the interference effect, and the light scattering effect. It is shown experimentally that the light scattering is the dominant cause of severe distortions of 1 #m patterns on grainy aluminum topography. These distortions can be minimized by the use of the dyed photoresist. Effect of planarizafion on VLSI processing. R. H. WILSON and P. A. PIACENTE.Semiconductor int., 116 (April 1986). The best choice for accommodating the variation of planarization resist thicknesses depends on design rules and process steps. Surface mount technology for high reliability telecoms applications. K. TAYLOR. Circuit Wld 12(3), 27 (1986). The technology of printed circuit boards suitable for surface mount assembly is discussed with reference to solder mount tolerances and board finishing. Some design features which aid the production of reliable assemblies are described. The importance of preconditioning surface mount components with the soldering conditions to be utilised during the assembly process is emphasized. Some data which show the suitability of both SOIC and small PLCC packaged components, which have been vapour phase reflow soldered, are given. The reliability for long-life applications of surface mount components and assembhes has not been demonstrated in general as yet and all manufacturers of such assemblies must validate their own assembly methods and components. The impact of surface mount technology on electronics manufacturing. GLENDA DERMAN. Microelectron. J. 17 (2), 5 (1986). This major multiclient study from Gnostic Concepts covers the entire topic of the impact of surface mount technology and includes detailed analyses of components, packages, substrates, OEM requirements, manufacturing trends, and important business issues in a thorough, concise manner. This comprehensive study examines the factors involved in the selection and implementation of surface mount technology, as it affects suppliers and materials, substrates, components, equipment vendors, and original equipment manufacturers in the electronics industry. Forecasts for surface mount components are in terms of dollar value, quantity, price, and rate of penetration. The technology of computer-aided design. PE~R H. SINGER. Semiconductor int., 108 (February 1986). From circuit conception to mask generation, the following pages will present the reader with a look at the state of the art in computer-aided design, a technology which is dramatically changing the future of the electronics industry. Fourteen experts were invited to report on current trends in their respective areas of knowledge, and give some insights into what the future may hold. Their results provide a timely and thought provoking look at the tools and techniques of today's IC designer. These t4 articles are contained within five sections, each