Effect of thickness and granular structure on the electrical conductivity of the active layer in polycrystalline silicon TFTs

Solid-State Electronics Vol. 37, No. 1, pp. 159-168, 1994

0038-1101/94 $6.00 + 0.00 Copyright ~j 1994 Pergamon Press Ltd

Printed in Great Britain. All rights reserved

E F F E C T OF T H I C K N E S S A N D G R A N U L A R S T R U C T U R E ON T H E E L E C T R I C A L C O N D U C T I V I T Y OF T H E ACTIVE L A Y E R IN P O L Y C R Y S T A L L I N E S IL ICO N TFTs H. SEHIL, H. LHERMITE, F. RAOULT and Y. COLIN Groupe de Micro61ectronique eI de Visualisation--CCMO, Universit6 de Rennes I, Campus de Beaulieu, 35042 Rennes Cedex, France (Recewed25June 1992;m revisedform 5 June 1993)

A~tract--The variation of the electrical conductivity of the polycrystalline silicon thin film constituting the active layer of p+pp + accumulation TFTs is studied as a function of the film thickness. A simple electrostatic model of the study structure and of its silicon layer, associated with a numerical method of solving 2D-Poisson's equations, allows to show that the conductivity of the film depends on both carrier trapping at grain boundaries and electrostatic coupling between interfaces, between interfaces and grain boundaries parallel to the Si/SiO2 interface, when they exist, and between parallel and perpendicular grain boundaries.

NOTATION

implying a correlative grain size modification. Thus, for instance, Lu et al.[2], who published the only d implanted dose of boron (cm -2) systematic study on polycrystalline silicon film resistgrain boundary potential barrier height (V) silicon gap (eV) ivity as a function of the film thickness, used different mean lateral grain size (nm) LL deposition durations; Hayashi et al.[3] and Noguchi LT mean grain size in the direction perpendicular to et al.[4], interested in T F T field effect mobility, thinned the film (nm) films down by thermal oxidation. boron doping concentration (cm -3) grain boundary trap density (cm 2) We processed in order to avoid the modification of hole mean concentration (cm -3) the grain size. For that purpose, the different thickld thickness of the deposited polysilicon film (rim) nesses were obtained by ion etching the same initial t, thickness (nm) of the layer i in a multilayer film film previously stabilized by annealing it at high temTFT active layer thickness (nm) If perature. So we could compare the conductivity of gate oxide thickness (nm) t'ox films having the same granular structure and differing V~s back-gate/source bias (V) VDs drain/source bias (V) only in their thickness. fiat-band front-gate bias (V) A simple modeling of the film and a 2D calculation Vos front-gate/source bias (V) of the electrostatic potential distribution in the crystalabsolute permittivity (F/cm) # hole mobility in the source~lrain direction (cm2/ lites allowed us to evaluate approximately the average V.s) carrier concentration as a function of depth in the mean hole mobility in the film (cm2/V -s) ~m film and to account for the conductivity variations pre-exponential coefficient of mobility (cm2/V • s) observed on two batches of low pressure chemical a electric conductivity (f2- ~. cm z) vapour deposited (LPCVD) films: (a) as-deposited ¢~(x, y) local electrostatic potential (V) ckA grain boundary potential barrier height (V) polycrystalline silicon layers and (b) amorphous electron affinity (V) deposited layers afterwards crystallized by low temperature annealing. So we show that the distinctive features of the conductivity variation depending on film thickness I. INTRODUCTION are explained not only by the carrier trapping at A work on the leakage current in p ÷pp + accumula- grain boundaries[2,5,6], but also, when the film is tion polycrystalline silicon thin film transistors (TFT) thin enough, by the electrostatic coupling between [1] gave us the opportunity to take interest in the its front- and back-faces, or, if the film is made up influence of the thickness of the film on its electrical of several grain layers, between a face and the first conductivity. grain boundary plane parallel to this one. Then The study of the electrical properties of poly- these features are strongly related to the granular crystalline silicon thin films in connection with the structure of the film, to the shape and size of the film thickness gave rise to many works. But most grains, to the boundary trap density and doping of them concern films obtained in different conditions concentration. 159

160

H, SEHIL et al.

Table 1. Preparation of the samples Deposition Td

Batch A B

Qd

Pd

t%

Post-deposition annealing

td

T~

r,

(K) (Pa) (sccm) (rim/ran) ( n m ) Texture (K) (ran) 893 13.3 20 3.5 720 (110) -823 13.3 20 1.0 600 Amorph. 923 1080 Td, Pd, Qd, t%. are respectivelydeposition temperature, partial silane pressure, silane flow, deposition rate; td is the thickness of the deposited film, T~and r~ the amorphous film annealing temperature and time.

2. PREPARATION AND FEATURES OF THE STUDIED POLYCRYSTALLINESILICON FILMS

The films we studied came from two batches (A and B), the deposition and post-deposition thermal annealing conditions of which are given in Table 1. These films were L P C V D deposited (from silane decomposition) on a substrate of SiO2 thermally grown (100 nm at 1373 K) on monocrystalline p-type silicon wafers ((100); 5f~. cm). Afterwards, they were boron implanted. The implantation energy (60 keV) was chosen so that, before annealing, the maximum boron atom density may be located in the middle of the polysilicon layer thickness. In such conditions, annealing the films at temperatures more than 1173 K during 30 min is enough to get a uniform boron distribution[7]. Moreover, when implantation doses are not very high, the boron segregation at grain boundaries is negligible and all the implanted boron atoms are activated [8-10]. That is why we used doses d = 7.2 x 10 ~2cm 2 for batch A and 6 × 10': cm 2 for batch B, in order to obtain, after annealing at 1373 K during 30 min in oxidizing atmosphere, a uniform doping concentration N o = 1017 c m -3, calculated as d / t ~ . Besides, this procedure gives a definitive granular structure to the films before processing the TFTs. Then the films were ion etched ( S F 6 gas) in order to get eight levels of silicon thickness tf (30, 50, 70, 90, 120, 150, 180 and 250 nm) after the thermal oxidation allowing us to obtain the gate oxide of the TFTs. At the end of this stage, for every batch, we had some layers differing in their thickness but having the same uniform doping concentration and the same granular structure. Processing T F T s included an annealing stage at 1373 K for 30min after source and drain boron im-

source

front gate ^t \

~

^~

~

planting (d = 10 ~5cm 2, 30 keV) and a gate thermal oxidation stage (1373 K, 30 min, tox = 100 nm), that did not modify the doping concentration and granular structure. The real thickness value of the different layers constituting a TFT, the final granular structure and the mean grain size of the silicon active film were determined by scanning and transmission electron microscopy observations. The T F T schema is shown on Fig. I. In fact, the structure is not auto-aligned: the gate and the drain and source contacts overlapped (about 2/Jm). One notices that the source and drain contacts penetrate through the whole thickness of the film, that defines exactly the zone whose conductivity is measured. The width and the length of the channel are in a ratio of ten to one. Figure 2 gives a schematic cross-section of the polycrystalline active film for each of the batches A and B, as it is observed by scanning electron microscopy. It can be seen that these films consist in two layers: in the as-deposited polycrystalline film [Fig. 2(a)], the lower one is made up of small grains (mean lateral size L e about 100 nm) and the upper one of bigger grains, which get wider when the thickness is increased and whose L e reaches about 200 nm at the front-interface: in the amorphous deposited film [Fig. 2(b)] the grains of both layers approximately have the same mean lateral size (180_+ 30nm). In both cases the interpenetration zone of the crystallites of the upper and lower layers is located at about 100 nm from the back-interface. In a 2D-modeling it could be considered as a parallel grain boundary. In both types of film a very perturbed thin layer exists close to the back-interface, it is not indicated in the schemata and will not be directly taken into account in the modeling.

VDS

drain

~ l y c r y s t a l l i n e

Si

z,'J--z V(

I

~./~

oxide

VIllA

J

I

II~#..... I .........ffi000i~ ni~Si : ............................................................~.............. • , +........:.:..:...~. S(~i ::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::::: .......

x!de

..........................

~ / / / / / / / / / / / / / / / / / ' ~ ; ' J

~ I

back gate

VBS

I I

t b

a Fig. 1. TFT (a) structure aiad (b) biasing.

Effect of structure on polycrystalline silicon TFTs

as-deposited polycrystalline silicon

a

nm

161

200 I00

0 0

300

600

900

I 200

I

I

I

I

I

nm b

I 500 .nm

I

amorphous deposited silicon crystallized by annealing

300

f

200 ,°°

0

200

400

600

800

I 000

1 200

I

I

I

I

I

I

I

I 400

I

nm Fig. 2. Schematic cross-section of the active polysilicon layer (a) batch A, (b) batch B.

As the T F T channel is 8/~m long, there are about 60 grains between source and drain. 3. EXPERIMENTAL RESULTS For every thickness tf of the active layer, we plotted the electrical characteristics of 10 transistors of each batch at several gate (Vcs) and drain-source (VDs) biases: for given If and Vcs or Vos, all the characteristics are similar, but not absolutely identical. Figure 3(a) shows the evolution of the transfer characteristics IDS (Vcs) of the batch A transistors, at weak source-~rain bias (VDs = --0.5 V), as a function of tr. For a given thickness, the plotted characteristic is statistically the most representative one. The electrical conductivity at room temperature is extracted from the linear part of the conductance

characteristics (drain current los vs drain-source bias VDS) recorded for the gate biases VGs and //as [Fig. l(b)] which set fiat-band conditions at the front and back surfaces of the film. In previous work we showed the minimum Iomi, of the transfer characteristics at weak VDS (Fig. 3) roughly corresponds to the gate bias VFB setting fiat-band conditions at the Si/ SiO2 interface[l]; the analysis of the transconductance of polycrystalline silicon T F T s as a function of temperature by Fortunato et al.[l 1] leads to the same conclusion. In the present case the linear regime is restricted to the VDS range - 2 . 5 to 0V. Figure 3(a,b) for VDS = - - 0 . 5 V and V a s = 0 V show that the minimum of the transfer characteristics appears at VGs values near - 2 V for batch A, - 1 V for batch B. These values hold for the whole of the measured samples. The minimum can tend to vanish

1 0 -7

VDS= - 3 V

drain-source

t f(,,,nm705030 )vOS= - 0.5 V

bias = - O.S V

10 -5

<•

10 8 +

..~ 1 0 - 7 c

.=

A c

10 "9

-25

150 180

10 -9

i0-I0

i0-11

a

90 120

•

-20

-15 gate

-I0

-5

0

5

voltage VGS ( V )

-5

10

b

i

0

5

10 -5

0

5

gate voltage V(;s ( V )

Fig. 3. (a) Transfer characteristics of batch A p +pp + accumulation polysilicon TFTs for different active layer thicknesses. Batch B transfer characteristics are similar. (b) Batch B transfer characteristics around minimum for Vos = -0.5 V and VDS= --3 V. Symbols have the same meaning in both cases. S$1c 3 7 1 - - K

lO

H. SEHILet al.

162

both batches as the film thickness tf is greater than 75 nm: only the amplitude of the variation differs. When tf is smaller than 75 nm conductivity is very much influenced by the specific properties of the first deposited layers close to the back-interface. These properties depend on the deposition and annealing conditions, that accounts for the differences in the behaviour of both batches.

10 -4

a

E

10-5

4. DISCUSSION. INTERPRETATION OF THE EXPERIMENTAL RESULTS

10 "6 e-, o i0-7

I

0

50

l

I

I00

i

150

I

200

250

300

film thickness (nm) Fig. 4. Experimental variation of conductivity versus film thickness: the behaviour of the films of both batches (a) batch A: (b) batch B--is similar from 75 to 250 nm. when the film thickness is increased [case of batch A, Fig. 3(a)]: because the resistive current becomes higher than the generation current due to the highest gate voltages used. It shifts as a function of tf when the drain-source bias is increased [Fig. 3(b)] because the generation current depends on VGS and VDS at once; that is why measurements need to be made in the linear conduction regime of the T F T , in which the effect of VDS is negligible. Figure 4 shows the conductivity variation as a function of the film thickness. Every representative point ([] or I ) in these curves corresponds to the average of the values measured on ten similar T F T s for VGS = VFa, VBs = 0V, and VDS between - 2 . 5 and 0 V. Here the "error bars" do not indicate a confidence interval but the range of the measured values. It can be noticed that the look of the conductivity variation is quite significant. It is the same one for

Two kinds of phenomena have to be taken into consideration to interpret these results: (1) the carrier trapping at grain boundaries (g.b.) [5,6,12]: the charged g.b. traps generate a depletion region from the boundary in adjacent crystallites, creating a potential barrier against free carriers: (2) the electrostatic interaction between the upper and the lower silicon/silicon oxide interfaces or between a surface and a parallel grain boundary. As a thin film is completely depleted, an electrostatic coupling is set between both surfaces that limit it[l 315]; the same phenomenon exists between an interface and the first g.b. parallel to it: this g.b. acts as an electrostatic shield and pins the field lines[16-18]. 4. I. Geometrical model o / the T F T

To illustrate these phenomena, we used a simple 2D geometrical model of the T F T , the active layer of which consists in three identical monocrystalline rectangular grains between source and drain (Fig. 5). Such a model is justified because the central grain, as a result of the shielding exerted by the charged traps located at perpendicular grain boundaries, is, with regard to the potential distribution, representative of all the grains that are not in direct contact with source or drain[16-18]. A parallel grain boundary has been put at 5 n m from the back-interface in order to take the traps at this interface into account,

y I

=

(D) (N)

silicon oxide

I I I I

SOURCE I I

I

I [A

FRONT-GATE ¢N)

I

silicon

I

P

I LL I

(D)

DRAIN

parallel boundary

(D)

I A'

(N) BACK-GATE

I

silicon oxide! (D)

Fig. 5. Geometrical model of the structure in the case of a one-grain layer. The limit condition type is indicated: (D) Dirichlet; (N/ Neumann.

Effect of structure on polycrystalline silicon TFTs

163

~back-interface A' X g.b. front-interface

~

p a r a l l e l g.b.

g.b.

Y Fig. 6. Example of electrostatic potential variation in the silicon film of the model for VDS, Vas, VGS= 0 V, LL= 200nm, LT (or tr)= 150nm, Na = 10~7cm 3 Nv = 1012cm 2. Graph uses the calculation mesh.

but no interface-state density is assumed at the front-interface.

4.2. Electrostatic model The electrostatic potential distribution in the structure is obtained by solving the 2D-Poisson's equation numerically, using a finite-difference method. For this purpose the geometrical model is criss-crossed in a network [developed according to a geometric progression from the grain boundaries in order to get a better definition of c~(x,y) close to g.b.]. We assumed the grain boundary to be I nm wide, that is physically acceptable[16-21]. That is the reason why we also took the first elementary mesh of the computation network 1 nm wide. In calculations, boundary traps, whose surface density is Nv, are considered as amphotere and uniformly distributed in the grain boundary. They introduce one donor and one acceptor energy level at midgap of the silicon band scheme. To solve the 2D-Poisson's equation: div [E grad ~(x, y)]

= q[n(dp)-p(d?) + NA(C~)-U~(dp) + Uv (~b)] in the semiconductor film, we adapted the method used by Lhermite to simulate the behaviour of polycrystalline silicon MOS capacities[I 7,18]. In this relationship ~ is the silicon or the silicon oxide permittivity, ~b the electrostatic potential, q the electron charge, n and p the electron and hole concentrations depending on Boltzmann's statistics and referred to the Fermi level E~-, assumed to be constant in the whole structure; N A is the acceptor doping concentration (doping atoms being entirely ionized at room temperature); N~ and N-r are the concentrations of ionized donor and acceptor traps in grain boundaries, given by the S - R - H model[22], where the hole

and electron capture probabilities are considered as identical. In these calculations, for silicon at 300 K, we took the effective state density N c in conduction band and Nv in valence band: 2.82 and 1.02x 1019cm-3; gap EG: 1.12 eV; E: 1.036 pF • cm-~; electron affinity X: 4.04 V; NA: 1017cm -3. The g.b. trap density N T is used as a parameter, whose constant value is chosen between 10~2 and 10J3cm 2 and is the same one whatever the g.b. is. The permittivity of silicon oxide, considered as an ideal insulator, without either fixed or mobile charges, is 0.345 p F . c m ~ and the aluminium work function 4.1 eV. We enter front-gate, back-gate, source and drain biases ( VBs = VDS= 0 V; V~s adjustable) as Dirichlet's conditions (D) (~b = c re) at the simulation domain limits, but a Neuman's condition (N) ((t~b/c~y) = 0) is applied at oxide lateral limits (Fig. 5). This model allowed us to compute the electrostatic potential, the electric field components and the carrier concentration at every node of the calculation mesh. Figure 6 gives an example of the q~(x,y) variation in the polycrystalline film for Vos = Vas = VGS= 0 V, LL = 200 rim, a transverse grain size L v = 150 nm (here Lw=t O, NA=1017cm 3, Nv=1012cm 2. In such conditions, the potential barrier height ~A(X) at grain boundary is relatively great, though depletion stretches over the whole grain width. Here we are interested in the carrier concentration, calculated as: p=Nvexp(

qdp(x'y)+qZ+kT EG)

by taking EF = 0; then Fig. 6 is also a picture of

p(x,y) in the grain. It shows that the mean carrier concentration will be strongly dependent on the concentration value in its central part. In this case

H. SEHIL et al.

164

1017

effect of the interface states, charges in the oxide and work function differences. But, t h o u g h VGs has a strong effect on the m e a n value # o f the c o n c e n t r a t i o n as a function of tf, it has a m u c h lower one o n the shape of#(tr). T h a t is why we shall study its simulated variations for VGS = 0.

XXxxx

q

0.5 ~ x eeeee e x X 1015 ~ 0 . ~ ee • ++4"++

x x e ex

4

eX

:ooooooo Oo4"4".x 4"

1013

eX

4.3. Variation of fi(t t)

° o +.x A ,.~^ 0 -I-ex -- ~.~,On-t-~x

¢_a e~D

1011

The average carrier concentration p is calculated as: P

V

(9

f

10 9 30 60 depth (nm)

0

90

Fig. 7i Effect of gate bias VGs (from - 1 to + 1 V) on the concentration profile along median axis for VBs, VDS= 0 V; t r = 9 0 n m ; LL= 100nm; NA= 1017cm- 3; NT= 10'2cm 2.

mobility along an y axis, given by the l D-analytical model of Seto, can be written: /~=/~Bexp(-~)

with

EB - q2L[NA 8~ - q4'A (X)

if the electric charge at perpendicular g.b. is the only cause of carrier depletion in the grain. As shown in Fig. 7, related to the hole concentration distribution p ( x ) along the median axis A A ' of the crystallite, the potential barrier height 4~A(0) at the front interface and therefore the m e a n carrier concentration in the whole grain are very sensitive to the gate bias V~s. T h a t is why, in order to obtain c o m p a r a b l e experimental results, it is necessary to apply the gate bias VFB, which counterbalances the

..~E~ I01S

.

.

- .......

3

I015 I

tt

f

2

4

lO 11

3

lO 11

10 10

~~

1010

10 9 0 a

Ax i

LL

10 17

1013

3

dx dy

~' = ,

where (x/,y;) is the location of a node of the calculation mesh and where tr = LT. Figure 8(a) illustrates the effects o f the film thickness, lateral grain size and g.b. trap density on simulated f u r ) for the bias conditions: VGS = V~s= VDS = 0 V . The m e a n carrier c o n c e n t r a t i o n decreases under the c o m b i n e d action of carrier trapping at g.b. and electrostatic coupling between front-interface and parallel grain b o u n d a r y when the film is thinned down. As 4 = LT is decreased, the extent of the P(4) variation becomes more a n d more restricted: the grain is entirely depleted (# is close to the intrinsic c o n c e n t r a t i o n 6 × 109cm 3) and the coupling between front-interface and parallel grain b o u n d a r y is m a x i m u m , that is the reason why the effect of the lateral grain size becomes very weak. W h e n tr is increased, this coupling vanished progressively, the mean carrier c o n c e n t r a t i o n increases a n d becomes very sensitive to LL: trapping at perpendicular g.b. is the p r e d o m i n a n t p h e n o m e n o n a n d the only one in the upper part of the film. Then the m e a n carrier concentration tends to become c o n s t a n t and

I0 17

:ioi . .

y,) Ay~

p(x,,

P

IlP(x,y)dxdy #(tF) _ J d

1O0 200 film thickness (nm)

300

10 91 0 b

, , 300 I O0 200 film thickness ( nm )

Fig. 8. (a) Mean carrier concentration in one-layer films as a function of film thickness for four lateral grain sizes L L: (1) 300, (2) 200, (3) 150, (4) 100 nm as N r = 10~2cm-2 and for three g.b. trap densities NT: (4) 1012, (5) 3 × 1012, (6) 5 × 1012cm-2 as L e = 100 nm. (b) Mean carrier concentration as a function of film thickness for L L = 200rim and three values of NT: 10~2; 3 × 10'2 and 5 × 10t2cm '-: (I) when there is no parallel g.b., (2) when a parallel g.b. exists at I00 nm from the back-interface. (VGs, VBS, VDs = 0 V; N A = 1017cm-3.)

Effect of structure on polycrystalline silicon TFTs

165

y I (N)

--I

(D)

silicon oxide

I-r

I I

SOURCE

FRONT-GATE

I

LL -P"

"~-

i

I T

(N)

] A

silicon

(o)

p

DRAIN

I ~lxxxx\xxxx~ ~xx\\\\xxxx\\\\\\,~

I (D)

~xxxxxxxx\\\\\\\\x\\-~ ,~,xxxxxx~\xxxxx'~~xx\\\\\\\\\\\\\\'~

(N)

I A' BACK-GATE

I

silicon oxide

- first parallel boundary - - - second parallel boundary

(D)

Fig. 9. Geometrical model of the structure in the case of two grain layers.

to approach doping concentration if the value of L L is high enough: in that case, near the front interface, the potential barrier height at perpendicular grain boundaries is maximum and mobility is minimum[5,6]. As predicted by the analytical 1D-Baccarani's model, the 2D simulation shows that, when the film is thick enough, fi decreases as L L does [Fig. 8(a), curves 1-4] and also when Nr increases [Fig. 8(a), curves 4 - 6 and Fig. 8(b), calculated points 1]; this last effect is the more noticeable as LL is smaller. One can see/~ is more sensitive to L L than to NT. Comparison between Figs 8(a) and 4 makes obvious a similar behaviour of the experimental conductivity above 150 n m and/5(tr). As a first approximation the variation of conductivity a vs tf can be qualitatively simulated by the variation of the mean carrier concentration/5 as a

I0 17[L k (nm )

IOI Fo

300

isL +

200

10 [tx 1014Ix

150 100/~

/ ///..y...A d

10 13 ~

/"

1012

.~

10 ~-

0

'

'

100 200 film thickness (nm)

:300

Fig. I0. Mean carrier concentration in double-layer films as a function of film thickness for four lateral grain sizes LL (with N r = 10ncm-2; Vos, VBs, lids = 0 V ; NA = 1017cm-3 and the parallel g.b. at 100 nm from the back-interface).

function of tr, by assuming a constant mean mobility /gm in the whole film, whatever tr is. 4.4. Simulating the variation of conductivity as a Junction of film thickness at constant mobility In order to simulate a(tf) at constant mobility in the whole thickness range we shall introduce (Fig. 9) a new parallel g.b. at 100 n m from the back-interface in the previous model to represent the interpenetration zone between both grain layers. So the average carrier concentration, calculated as previously from x = 0 to tf (tf ~ LT), could be considered as a picture of the mean conductivity of the film. Figure 10 shows the computed behaviour of/~ vs tf is in good qualitative agreement with the experimental behaviour of the conductivity of the samples of both batches between 75 and 250 nm (Fig. 4). It also shows the effect of the lateral grain size, in accordance with the previous results related to a one-layer film. The role acted by the parallel g.b. at 100 n m is well illustrated by Fig. 8(b) which makes possible a comparison between/~(tr) in the presence of this boundary and /~(tf) in its absence: (1) electrostatic shield, making potential and carrier distributions independent in each of the two grain layers; (2) electric charged plane, leading to the existence of a depletion zone in both layers on both sides of itself. The maximum close to 90 nm in the simulation curves is due to this double effect of the parallel boundary. In the experimental curves (Fig. 4) it is due to a similar double effect of the interpenetration zone. Figure 8(b) (calculated points 2) also shows that, for Z L = 200 nm, the effect of N x on the variation of/~(tf)--or of a(tf)---is very weak: that means the electrical behaviour is strongly dependent on the film structure. However the model we have used is very schematic, and before carrying on with the simulation of experimental conductivity and deducing mobility from this

166

H. SEHILet al.

simulation, we must be aware of its main limitations. They are related to: • the interpenetration zone of the upper and lower grain layers described as a simple I nm thick parallel grain boundary, whereas in fact it stretches out over several nanometers and its position with respect to the back-interface is not absolutely constant in the film; the location chosen for the parallel g.b. can be used as a fitting parameter. the mean lateral grain size, assumed to be the only one in both grain layers and constant in the whole thickness, whereas the crystallites of the as-deposited crystalline films have a different mean size in each layer and widen when thickness is increased. • the trap density at perpendicular grain boundary, assumed to be constant; but experience showed us, by using the Levinson's model[23], that N r remains roughly constant in the accumulation channel of the batch B samples as the film is thinned down, whereas it increases in the channel of batch A samples [24,25]. • the trap density at parallel g.b., assumed to be uniform and equal to the trap density at perpendicular g.b. • the assumption of one energy level for the traps at g.b., whereas their energy should be distributed in the gap. • the zone near the back-interface, made up of the first deposited molecular layers, the specific properties of which are unknown but strongly influence the conductivity of the thinnest films (the assumption of a specific conductivity of this zone is in accordance with some experimental observations [18,26,27]). The behaviour of the thinnest films, due to the first deposited zone, can be found again by assigning a specific mean conductivity ~rI to a thin layer, close to the back-interface, whose thickness would be 4-

l O 15

4-, E

"~.~ lO

In the devices we studied, the carrier bulk mobility is unknown. But previous works on boron doped LPCVD polycrystalline silicon films[9,28,29] led us to think that, for the doping concentrations, grain boundary trap densities, grain sizes and thicknesses we used, the mean effective mobility Pm could vary between about 0.1 and 20cmZ/V.s. The model we put forward will be considered as valid if the values of I~,, and the variation pro(t1) deduced from the relationships (1) and (2) are physically acceptable. Such a calculation of /lm(/f) uses the silicon constants, the experimental values 0% NA, VGs, 6, the mean lateral grain size L k and the location of the firs1 parallel boundary with regard to the back-interlace, which determine 17. The firsl parallel boundary location, which has to be chosen inside the limits of the interpenetration zone, may be used as a fitting parameter. We gave to N r typical values (borne out by some experimental results[24,25]). Lastly, for the thinnest films, reasonable values of t I and c~ have Io be used to fit a(6). Our study model (Fig. 9) is rather well suited to the batch B amorphous-deposited films [Fig. 2(b)]: the mean lateral grain size is of the same order in both layers and N r at perpendicular g.b. in the accumulation channel, calculated by using the Lcvinson's

'~ E ~

1 O0

1015

a

D

~

L~

2

.i e~

1014

.~

10 °E

1013 ' i

1012

,

e..,

3

~ 1012

e-

1 /

_ +?sim

.->

0.1 1 O0 200 300 film thickness ( nm ) i

10 9

0

1 IE

~ 1011 2 *~

010 3a~t m

a

4.5. Comparing simulated and e x p e r i m e n t a l conducttriO,. Calculated mean mobiliO'

=

-'~

~= 101 ] o ,- 1 0 1 0 E

where ~r2 is the mean conductivity of the layer stretching out from the level tt to the front-interface. In order to take mean mobility ,um into account we shall write: a 2 = q x / 4 , ( t f - t,) x # ( 4 - tl ). (2)

1016

1014

0 .I

(I)

a(tr) X t r = ( ~ r l x t l ) + [ c r 2 x ( t t - - t O ] ,

100 2

-~- 1 0 1 3 ~

The global mean conductivity cr can be calculated according to the relationship:

'D e-

,~ 3 • [L'tm ~=

10

0.1 0

b

0

9 1 O0 200 film thickness ( nm )

IO0

Fig. I 1. Simulating experimental conductivity. Mean carrier concentration is calculated frona the 2Dmodel by using estimated values of N, and L c and chosen values oft,, a, and of the location of the parallel g.b. Mean mobility is deduced from the fitting of the experimental conductivity curve. (al In the case of amorphous deposited films, (h) in the case of polycrystalline as-deposited films. Conductivity is expressed in 10 6 (f~ I.cm i) and mobility in cm~:V's.

Effect of structure on polycrystalline silicon TFTs method[23], remains practically constant in the whole film thickness[25]. On the other hand it has to be modified to account for the behaviour of the batch A as-deposited polycrystalline samples, whose mean lateral grain size is different in the upper and in the lower layer and increases in the upper one [Fig. 2(a)] at the same time as tf does, whereas N v decreases[25]. Figure 1 l(a) shows the result obtained for batch B samples by taking t ~ = 1 0 n m , L L = 1 5 0 n m , N T = 1012cm 2, t r l = l . 6 9 x 1 0 - s f 2 - l . c m - l , parallel g.b. at i 10 nm from the back-interface. The values of #m stand in the range of the previously pointed out experimental values. At room temperature and for the evaluated lateral grain size, mobility is mainly determined by carrier scattering and potential barrier at perpendicular grain boundary. One can write, at a given level x: /~m = /IB exp - - ~

.

As tf is less than 180 nm, the mean carrier concentration is so small that there is no more potential barrier at g.b. in the whole film and /~m = ~B. In the interpenetration zone of both layers (represented by the parallel g.b.), the perpendicular g.b. density increases and leads to a ~ decrease. As tr increases, the effect of the front-interface/parallel g.b. coupling vanishes progressively:/7 and, correlatively, potential barriers increase, that brings about a strong decrease of ~mThe decreasing rate, seen in Fig. ll(a), is approximately the one which can be foreseen by using the I D-Baccarani's model concerning the correlative changes in carrier mean concentration and g.b. potential barrier height for a given doping concentration. Similar results were obtained for batch A samples [Fig. ll(b)], by taking their specific grain structure very roughly into account (an exact simulation was not searched for). The values at = 8 x 10 7 ~ ~. cm ~, t I = 10 rim, LL = 150 nm as t r is less than 80 nm and 200 nm for tf between 80 and 260 nm, N r = 3 x 10 ~2cm 2 as tf is less than 120 nm and, for tf between 120 and 260 nm, N r = 10 "cm -, parallel grain boundary at 130nm from the back-interface were used. The main difference in ~m behaviour between both batches stands in the interpenetration zone, wider and more disturbed in batch A samples (Fig. 2), that has repercussion on choosing the parallel grain boundary location and on ~m(tr) in the corresponding t t. range. 5. CONCLUSION With the help of a simple geometrical model of the polycrystalline silicon film and by solving the 2D-Poisson's equation numerically taking the carrier trapping at g.b. into account, we have related the variation of conductivity as a function of the thickness of the film to the main particularities of the latter: granular structure, grain size, doping concentration, g.b. trap density. We saw that the real phenomena

167

can be appropriately approximated by likening the interpenetration zone between two superposed grain layers to a grain boundary parallel to the film surfaces. Just like the perpendicular boundaries, the parallel grain boundary plays the role of an electrostatic shield between grains or layers because the traps it contains involve crystallite depletion by capturing free carriers. The depletion due to perpendicular and parallel boundaries and the electrostatic coupling between interfaces, or between interfaces and grain boundaries, control the O ' ( l f ) c u r v e s . The mean mobility values and the behaviour of #m(/f) deduced from the simulations of experimental a ( t 0 are in good accordance with some previous experimental results. The model is currently being improved by taking the energy distribution of the g.b. traps into account. We think to bear it out experimentally by studying the effect of hydrogenation on the conductivity variation as a function of the active layer thickness. Acknowledgements--The authors wish to thank their colleagues M. Sarret and A. Liba, who deposited the polycrystalline silicon films, and Professors B. Fortin and O. Bonnaud for helpful discussions. REFERENCES

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