- Email: [email protected]
Effects of carrier film physical properties on W CMP
Thin Solid Films 345 (1999) 278±283
Effects of carrier ®lm physical properties on W CMP D. Wang a,1, A. Zutshi b, T. Bibby a, S.P. Beaudoin a,*, T.S. Cale a,2 a
Department of Chemical, Bio. & Materials Engineering, Arizona State University, Tempe, AZ 85287, USA b IPEC PLANAR, 4717 East Hilton Ave., Phoenix, AZ 85034, USA Received 9 December 1997; received in revised form 11 May 1998; accepted 9 October 1998
Abstract The roughness, displacement under load, and thickness of 28 carrier ®lms have been measured and their effects on polishing nonuniformity (NU) and removal rate (RR) on wafer surfaces during W CMP have been evaluated. All three properties signi®cantly affect polishing results. In addition, the displacement of ®lms under load depends on the initial thickness of the ®lms, so that these two parameters are not independent. Prior stress-based CMP modeling and simulation efforts indicate that the uniformity of the stress transferred to the back of wafers by carrier ®lms plays an important role in polishing NU. The displacement and carrier ®lm roughness in¯uence the ability of the carrier ®lm to transfer stress to the wafer, and we interpret the observed NU based on potential stress transfer mechanisms. Our experimental and response surface analysis suggests that ®lms that displace slightly during polishing do not show signi®cant changes in NU or RR with increasing roughness, although increasing the ®lm displacement may decrease NU and increase RR. On the other hand, ®lms which displace greatly show little change in NU or RR with increasing displacement, while increasing roughness may reduce NU and increase RR. q 1999 Elsevier Science S.A. All rights reserved. Keywords: Planarization; Semiconductors; Stress
1. Introduction Chemical mechanical polishing (CMP) has been widely used in semiconductor manufacturing to remove and/or planarize dielectric and metal layers. Compared to other planarization methods, such as reactive ion etch back or spin-on-glass deposition and etch back, CMP provides superior local and global planarity. Very large scale integrated circuits, and especially integrated circuits with minimum device features less than 0.35 mm, require the high degree of lithographic resolution that is enabled by this method [1±3]. CMP is also an enabling technology for advanced metal interconnection schemes such as damascene processes [4±6]. Carrier ®lms and other CMP consumables have signi®cant effects on polishing removal rate (RR) and withinwafer non-uniformity (NU). Carrier ®lms mounted on the back of wafers hold the wafers in the wafer carriers during CMP. We have used wafer scale stress modeling [7,8] to * Corresponding author. Tel.: 1 1-602-9657769; fax: 1 1-6029650037. E-mail address: [email protected] (S.P. Beaudoin) 1 Present address: Micron Display Technology, 3000South Denver Way, Boise, ID 83705, USA. 2 Present address: Rensselaer Polytechnic Institute, Center for Advanced Interconnect Science & Technology, Troy, NY 12180-3590, USA.
suggest a possible mechanism by which carrier ®lm properties such as compressibility and thickness affect polishing NU. In this paper, we discuss the results of experiments designed to determine the effects of carrier ®lm thickness, roughness, and compressibility on RR and NU trends seen in tungsten (W) polishing. Selected carrier ®lms with a range of compressibilities, roughnesses and thicknesses were studied using a `standard' W polishing protocol. Tungsten possesses chemical and physical properties that allow the development of stable and reproducible CMP processes. The stable processes make the effects of carrier ®lm properties on W CMP performance easier to study, and for this reason, we have chosen W polishing as our system of interest. Of particular importance to the stability of W polishing processes are the resistance of W to chemical attack and its hardness at room temperature. W is strongly attacked only by ¯uorine and is dissolved only by a mixture of nitric and hydro¯uoric acids [9]. W is also harder than Si. 2. Experimental procedures 2.1. Characterization of carrier ®lms We characterized 28 carrier ®lms having a wide range of compressibilities, thicknesses and surface roughnesses. The
0040-6090/99/$ - see front matter q 1999 Elsevier Science S.A. All rights reserved. PII: S00 40-6090(98)0148 6-2
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
279
Table 1 Carrier ®lms and their roughness and compressibility data
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Carrier ®lm type
Roughness average, SD (mm)
Asperity density, SD (per 5 mm)
Compressibility, SD
Displacement, SD (inch)
40 ®lm BUP 500 DF 200 DF 200 high DF 200 low DF 200 med DF 245 IPCF 001 IPCF 002 IPCF 003 IPCF 004 JR 111 MIC high MIC low MIC med PET 1040 PET 1500 Q2000 R200 T1 R200 T2 R200 T3 R200 T4 RHODES SPH 210 SPH 250 SUB 500 SUB 800 WB 20
9.27, 0.66 2.07, 0.63 9.84, 0.9 9.79, 0.42 9.51, 0.54 10.3, 0.63 10.3, 0.76 8.39, 0.70 13.1, 1.00 12.0, 0.77 7.93,0.75 2.10 5.79, 0.30 0.42, 0.19 0.61, 0.19 11.8, 0.34 13.3, 0.73 19.6, 3.02 3.99, 0.42 4.27, 0.19 5.53, 0.50 12.0, 1.28 19.1, 1.21 13.3, 0.32 15.3, 2.03 23.0, 2.86 16.6, 1.45 0.57, 0.04
34.6, 4.04 49.0 30.8, 4.76 29.6 29.4, 3.51 27.8, 2.17 25.0, 2.92 30.6, 5.86 25.2, 3.03 30.0, 3.54 33.4, 4.10 52.0 36.6, 1.82 49.2 48.6 30.0, 2.35 30.0, 2.45 18.2, 3.77 45.6, 4.51 43.4, 3.44 35.2, 4.76 31.0, 4.00 14.2, 3.27 32.0, 1.87 30.2, 2.28 13.4, 3.21 22.4, 1.52 54.2, 10.5
0.19, 0.021 0.03, 0.004 0.17, 0.008 0.18, 0.008 0.21, 0.012 0.20, 0.034 0.26, 0.038 0.17, 0.081 0.16, 0.022 0.15, 0.010 0.16, 0.006 0.05, 0.004 0.18, 0.022 0.23, 0.024 0.25, 0.015 0.20, 0.009 0.09, 0.011 0.02, 0.004 0.15, 0.013 0.10, 0.007 0.10, 0.008 0.08, 0.009 0.03, 0.005 0.10, 0.003 0.12, 0.096 0.03, 0.008 0.03, 0.006 0.10, 0.003
3.7E 2.0E 4.0E 4.2E 4.6E 4.7E 4.8E 3.6E 3.4E 3.6E 3.3E 1.2E 1.0E 0.9E 1.0E 4.1E 2.6E 1.1E 3.0E 2.1E 1.9E 1.7E 1.7E 2.5E 2.9E 1.6E 1.6E 2.0E
carrier ®lms studied and their physical properties are listed in Table 1. The ®lms labeled Q2000, Rhodes, SUBA 500 and SUBA 800 are typically used as polishing pads. They were used as carrier ®lms in this work to determine the effects of their physical properties. 2.1.1. Compressibility measurements The compressibility of a substance is its reduction in volume due to an applied pressure, which quantitatively is the reciprocal of the bulk modulus [10]. It is an important property of a carrier ®lm because (1) the ®lms are under a relatively high pressure (from 3 to 10 psi) during polishing, (2) the distribution of stress on the wafer is affected by the ®lm compressibility, and (3) the variations in stress on the wafer cause variations in the local RR and the NU [7,8]. Carrier ®lm compressibility was measured on a SATEC (model 60 HVL) material tensile test machine. This machine records the displacement of the top surface of a ®lm when pressure is applied to the ®lm. The machine has a movable top plate and a stationary bottom plate. The sample is placed on the bottom plate and the top plate moves towards the bottom plate at a preset speed. Once the pressure between the two plates reaches the preset `test pressure', the top plate stops and continuously adjusts its position to maintain this pressure on the sample. The machine records the vertical displacement of the ®lms,
2 03, 0.0004 2 03, 0.0003 2 03, 0.0002 2 03, 0.0002 2 03, 0.0003 2 03, 0.0008 2 03, 0.0007 2 03, 0.0017 2 03, 0.0005 2 03, 0.0002 2 03, 0.0001 2 03, 0.0001 2 03, 0.0001 2 03, 0.0001 2 03, 0.0001 2 03, 0.0002 2 03, 0.0003 2 03, 0.0002 2 03, 0.0002 2 03, 0.0001 2 03, 0.0002 2 03, 0.0002 2 03, 0.0003 2 03, 0.0001 2 03, 0.0002 2 03, 0.0004 2 03, 0.0003 2 03, 0.0001
DT, at different pressures (loads). In this work, the speed at which the top plate approached the bottom plate was 0.005 inch/s and the test pressure was 10 psi. To simulate polishing conditions, the ®lms were sprayed with water during testing. Before each test, the ®lms were preconditioned by applying the test pressure to the ®lms for 3 min to simulate the wear that occurs during polishing. The original thickness of the ®lms, T0, was measured using a micrometer after the preconditioning. The compressibility test was then conducted by increasing the pressure from 0 to the test pressure and maintaining it for 3 minutes while monitoring the ®lm displacement. After each test, the pressure was released and the test was repeated starting from zero load. The loading cycle was repeated three times for each test ®lm. The compressibility C can be calculated as C DT=T0 . There was essentially no difference in the values of TF, the ®lm thickness following testing, and T0, the initial ®lm thickness, for the ®lms studied. This suggests that cycling the load on these ®lms three times does not irreversibly affect their ®nal thickness. As discussed below, the displacements and compressibilities of the carrier ®lms were used to divide the ®lms into ten groups. The polishing performance of six of the original 28 ®lms was then studied. These ®lms represented six of the original ten groups and covered all interesting displacement and roughness ranges.
280
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
RA
1 ZxL uyudx L x0
1
where L is the sampling length and y is the ordinate height of the surface, relative to the centerline. 2.1.4. AD: asperity density AD is the number of peak/valley pairs encountered over a 5 mm sampling length. If the pro®le rises above the centerline more than once without falling below it, these multiple peaks are considered only as one asperity. AD is an indicator of the space between adjacent asperities. The RA and AD of the ®lms were correlated with the ®lms' polishing performance, as discussed below. 2.2. Polishing experiments Fig. 1. Observed relationship between carrier ®lm roughness average and asperity density.
2.1.2. Surface roughness measurements Surface roughness is de®ned as the vertical distance from peaks to valleys in surface irregularities on the ®lms [10]. In this work, surface roughness was measured on a Tencor P-2 pro®lometer. To use the P-2, the sample is mounted on a testing plate, a stylus is placed in contact with the sample surface, and the sample is moved across the stylus at a constant speed. The speed was set at 0.4 mm/min in this study, and 5 mm paths were sampled. Five replicate analyses were performed on each sample. The surface pro®les provided information on the `roughness average' (RA) and `asperity density' (AD) of the ®lms. 2.1.3. RA: roughness average RA is the arithmetic average of the absolute values of the surface height deviations from the center line, which divides the measured pro®les such that the sum of all areas above the centerline is equal to the sum of all areas below it [11]. RA is calculated according to
The polishing experiments were carried out on an IPEC Avanti 472 polishing machine. The W CMP process parameters used were based on an established protocol developed at IPEC PLANAR (A. Zutshi, pers. commun.): Downforce: 5 psi Platen speed: 50 rev./min Carrier speed: 50 rev./min Pad conditioner: diamond conditioner; conditioning done between wafers Slurry: Baiplanar 7L from Baikowski International Polish pads: IC 1000 over SUBA IV from Rodel All the tests were performed at room temperature on 200 mm CVD W sheet wafers. The pad was `broken in' using 5 W dummy wafers. All polishing parameters were kept constant except the carrier ®lms, so that variations in the RR and NU were due only to the ®lm differences. Three wafers were polished using each carrier ®lm. To assess the RR variations, 41-point diameter scan measurements were performed pre- and post-polish at an edge exclusion of 3 mm using a CDE Resmap thickness measurement tool. The effects of the physical properties of six carrier ®lms were assessed, as discussed below. 3. Results 3.1. Relation between RA and AD As shown in Fig. 1, a linear relationship exists between the roughness average (RA) and asperity density (AD) of the ®lms. Since these parameters are related, it was unnecessary to correlate polishing results with both parameters, and we correlated the polishing results with RA. 3.2. Grouping of carrier ®lms
Fig. 2. Grouping of the carrier ®lms based on roughness and displacement.
In our previous work, we showed that both the thickness and the compressibility of carrier ®lms affects the NU of polished wafers [7,8]. We hypothesized that both of these ®lm properties were intimately related to the displacement
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
281
Table 2 Polishing results for the six carrier ®lms Film type
Roughness (mm)
Displacement (mil)
Number of replicates
Mean RR, SD (A/min)
Mean NU, SD (%)
WB 20 DF 200Med DF 200 JR 111 R200 T4 SUBA 800
1.0 11.0 10.0 2.0 13.0 23.0
2.04 4.64 3.95 1.23 1.66 1.59
3 3 3 3 2 2
4130, 53 4050, 92 4413, 32 4140, 317 4340, 57 4285, 106
7.25, 1.14 4.04, 0.34 2.89, 0.15 8.51, 1.11 3.9, 0 3.69, 0.47
under load. In addition to ®lm displacement effects, we hypothesized that ®lm roughness strongly affects polishing NU. Fig. 2 groups the ®lms based on their displacements and surface roughnesses. Based on a statistically-based analysis of variance (ANOVA) and a Duncon multiple range test [12], the carrier ®lms were grouped in four different roughness groups and three different displacement groups, as shown. SUBA800, JR111, R200T4, WB20, DF200 Med and DF200 ®lms were chosen for further study. These ®lms were not selected based on industrial use patterns. Rather they were chosen as representatives of the most interesting roughness and displacement regions in Fig. 2, in the hope of determining mechanistic information about the effects of these parameters on polishing. 3.3. Polishing results and discussion The polishing results, RR and NU, are listed in Table 2. These results were analyzed using the statistics software package Design Expert [13]. The data are from a balanced design (with three runs for each carrier ®lm) that ends with unbalanced data (with two sets of data for the carrier ®lms R200T4 and SUBA800). Response surfaces for the RR and NU were generated. The Design Expert software provided
Fig. 3. Non-uniformity (NU) response surface. (The numbers are the %NU for each contour line, and the labels are the observed data. The region above the 1% line corresponds to a process whose NU is less than 1%, which is outside the valid region.)
the following correlation equations for RR and NU RR 3534:8 2 157:36 £ RA 1 970:73 £ D 2 344:94 £ D2 1 101:24 £ RA £ D 2 NU 14:27 1 0:57188 £ RA 2 7:1706 £ D 1 1:9241 £ D2 2 0:48104 £ RA £ D 3 Ê /min), NU is the where RR is the average removal rate (A polishing non-uniformity (%), RA is the ®lm roughness average (mm), and D is the ®lm displacement under a 10 psi load (mil). Figs. 3 and 4 show the contours of the NU and RR response surfaces generated by Eqs. (2) and (3). By comparing these ®gures, it can be seen that trends in RR variation with roughness and compressibility correlate with the trends exhibited in the NU. This is consistent with W CMP results found elsewhere (A. Zutshi, pers. commun.). There are ®ve important features to note in Fig. 3. First, the data show that increasing roughness decreases slightly the NU at all displacements in the low displacement regime. Second, the response surface suggests that increasing roughness also decreases the NU in the high displacement regime.
Fig. 4. Removal rate response surface. (The numbers are the removal rate in nm/min of each contour line and the labels are the experimental data.)
282
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
Fig. 5. Effects of ®lm roughness on NU in the low displacement region. (a1) and (b1) represent hypothetical stress variations applied to the bulk ®lms. (a2) and (b2) represent ®lms before loading with low and high roughness, respectively. (a3) and (b3) represent deformations of ®lms with low and high roughness in the low displacement region after loading. (a4) and (b4) represent stress variations passed through the asperities onto the wafer.
The magnitude of this effect is small in the low carrier ®lm displacement region (less than 1.8 mil), and may be large in the high displacement region (greater than 3 mil). The response surface suggests that increasing displacement decreases the NU at any roughness studied in the low displacement region, while the data suggest that increasing displacement increases the NU (slightly) in the high displacement region. Finally, there are roughness and displacement interaction effects in the low displacement and low roughness region. Fig. 4, which shows the effects of carrier ®lm displacement and roughness on RR, mirrors the trends shown in Fig. 3. Speci®cally, in the low displacement region, the data show that increasing roughness has a minor effect on RR, while the response surface suggests that increasing displacement may signi®cantly increase the RR in this range. In the high displacement region, the data suggest that increasing displacement slightly decreases RR, while the response surface suggests that increasing roughness may signi®cantly increase the RR. Our previous modeling work [7,8] shows that stress in carrier ®lms may be transferred to the wafer surface and high local stresses may increase local removal rates while low stresses may decrease these rates. Our prior work further showed that these stresses result from radial and circumferential deformation of the carrier ®lm due to the applied down force during polishing and the physical properties of the carrier ®lm. The results in Figs. 3 and 4 are interpreted below in terms of stress effects. 3.4. Interpretation of data Fig. 5 describes schematically a physical model that may explain the effects of carrier ®lm roughness on RR and NU in the low displacement region in terms of our previous modeling efforts. The ®lms in this region have very low displacements, i.e. both the bulk material and the asperities (roughness) can be considered to be `hard' or almost `incompressible', and the asperities are assumed to pass any stress distribution generated in the ®lm directly onto the wafer. In this scenario, changes in the roughness (the size and frequency of the asperities) has little effect on the
stress distribution on the wafer, and thus no effect on the local RR or the NU. Since the local RR is not affected by the roughness, there is no net effect on the overall RR. Due to the lack of data to validate the response surface model in the high roughness, low displacement region, rigorous interpretation of the predicted behavior will not be attempted. However, we can suggest possible mechanisms that support the prediction. Speci®cally, in the low ®lm displacment region, where any stress non-uniformities generated in the ®lm are passed directly to the wafer, increases in the displacement of the ®lm will allow the stress non-uniformities to be absorbed in the ®lm. Thus, the non-uniformities will not be passed to the wafer surface, and will not cause local removal rate variations. At the same time, due to the net increase in overall displacement of the ®lm, more stress may be applied to the wafer surface, resulting in a higher overall removal rate. A tentative physical model that explains the observed effect of carrier ®lm displacement on RR and NU for high displacement carrier ®lms in terms of the stress distribution at the carrier ®lm±wafer interface is also suggested. For a given ®lm roughness, the deformation of the asperities will be high for ®lms exhibiting very high displacements under load. In this case, several results may be observed. First, the deformation of the asperities in this high deformation region may cause stress generated in the carrier ®lms to be absorbed by the asperities rather than transmitted to the wafer, reducing the overall level of stress transferred to the wafer surface and thus reducing the overall RR. Increasing the displacement of the ®lms will enhance this effect, leading to further RR reductions. However, the high degree of deformation of the asperities may produce non-uniform displacement of the carrier ®lm surface, increasing the variation in the stress that is passed to the surface of the wafer. This will lead to increased NU. In the high displacement region, the trends predicted by the response surface are not interpreted, due to a lack of data to validate the response surface model. 3.4.1. Interaction effects between roughness and displacement The NU increases as the displacement increases in the low roughness region of Fig. 3 while it decreases as the displacement increases in the high roughness region of Fig. 3. The low roughness and low displacement region is apparently a transition region where the interaction between roughness and displacement is complex. Future work includes obtaining additional data in the transition region and conducting polish tests to better de®ne the response curves in this region. 3.4.2. Potential impact of roughness-displacement effects on polishing From Fig. 3, the carrier ®lm roughness and compressibility are shown to have different effects on CMP based on their relative magnitudes. These two factors interact with
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
each other and may dominate the process NU. The most commonly used carrier ®lm, DF200, is in the medium roughness and high displacement region. Lot-to-lot variations in ®lm roughness and displacement in these ®lms will lead to variations in process NU. In particular, the NU might be very sensitive to roughness. Based on the analysis presented above, it appears that there may be an optimal roughness-displacement relationship in carrier ®lms used for W polishing. The use of carrier ®lms that contain the proper relationship between these parameters will facilitate the attainment of high polishing rates and low polishing non-uniformities. 4. Conclusions We have reported the effects of carrier ®lm displacement asperity density (AD) and surface roughness (RA) on W CMP over a limited range of these parameters. The results suggest that the roughness and the displacement of the carrier ®lms may strongly in¯uence polishing performance. Increasing the carrier ®lm roughness has little effect on process NU or RR for low displacement carrier ®lms, while increasing displacement in high displacement ®lms increases the process NU slightly and slightly reduces the RR. Displacement/roughness interaction effects are present in this process, in the low roughness, low displacement regime. These experimental results are not extensive enough to allow absolute interpretation of the response surfaces generated, despite the fact that the response surface results are provocative. Speci®cally, the response surface analysis suggests that increasing either the roughness of high displa-
283
cement carrier ®lms or increasing the displacement of high roughness, low displacement carrier ®lms may signi®cantly enhance the process RR and NU. Future work will involve the collection of more data throughout the roughness-displacement regions studied here to allow more concrete interpretation of the effects of these parameters. The experimental results presented here are consistent with previous stress simulation results which focused on the effects of pad and carrier ®lm thickness and compressibility on NU for smooth carrier ®lms and pads [7,8]. References [1] S. Sivaram, H. Bath, R. Leggett, A. Maury, K. Monnig, R. Tolles, Solid State Technol., May (1992) 87. [2] M. Fury, Solid State Technol., April (1995) 47. [3] R.V. Joshi, H.M. Dalal, in: Advanced Metallization for ULSI Applications in 1994, MRS, 1995, p. 19. [4] S.M. Rossnagel, J. Vacuum Sci. Technol. B 13(1) (1995) 125. [5] K. Veno, K. Ohto, K. Tsurenari, K. Kojiyana, K. Kituta, T. Kikkawa, IEDM-IEEE, (1992) 305. [6] C. Kaanta, S. Bombardier, W. Cote, W. Hill, G. Kerszykowski, H. Landis, D. Poindexter, C. Pollard, VLSI Multilevel Interconnection Conf. (VMIC), 1991, p. 144. [7] D. Wang, J. Lee, S. Beaudoin, T. Bibby, K. Holland, T. Cale, J. Electrochem. Soc. 144 (1997) 1121. [8] C. Srinivasa-Murthy, D. Wang, S.P. Beaudoin, T. Bibby, K. Holland, T.S. Cale, Thin Solid Films 308±309 (1997) 533. [9] G.D. Rieck, Tungsten and Its Compounds, Pergamon, Oxford, 1967. [10] Dictionary of Scienti®c and Technical Terms, 3rd edn., McGraw± Hill, New York, 1984. [11] Tencor P-2 manual, 1990. [12] D. Montgomery, Design and Analysis of Experiments, Wiley, New York, 1991. [13] Design Expert 4.0 Manual (1991).
Effects of carrier ®lm physical properties on W CMP D. Wang a,1, A. Zutshi b, T. Bibby a, S.P. Beaudoin a,*, T.S. Cale a,2 a
Department of Chemical, Bio. & Materials Engineering, Arizona State University, Tempe, AZ 85287, USA b IPEC PLANAR, 4717 East Hilton Ave., Phoenix, AZ 85034, USA Received 9 December 1997; received in revised form 11 May 1998; accepted 9 October 1998
Abstract The roughness, displacement under load, and thickness of 28 carrier ®lms have been measured and their effects on polishing nonuniformity (NU) and removal rate (RR) on wafer surfaces during W CMP have been evaluated. All three properties signi®cantly affect polishing results. In addition, the displacement of ®lms under load depends on the initial thickness of the ®lms, so that these two parameters are not independent. Prior stress-based CMP modeling and simulation efforts indicate that the uniformity of the stress transferred to the back of wafers by carrier ®lms plays an important role in polishing NU. The displacement and carrier ®lm roughness in¯uence the ability of the carrier ®lm to transfer stress to the wafer, and we interpret the observed NU based on potential stress transfer mechanisms. Our experimental and response surface analysis suggests that ®lms that displace slightly during polishing do not show signi®cant changes in NU or RR with increasing roughness, although increasing the ®lm displacement may decrease NU and increase RR. On the other hand, ®lms which displace greatly show little change in NU or RR with increasing displacement, while increasing roughness may reduce NU and increase RR. q 1999 Elsevier Science S.A. All rights reserved. Keywords: Planarization; Semiconductors; Stress
1. Introduction Chemical mechanical polishing (CMP) has been widely used in semiconductor manufacturing to remove and/or planarize dielectric and metal layers. Compared to other planarization methods, such as reactive ion etch back or spin-on-glass deposition and etch back, CMP provides superior local and global planarity. Very large scale integrated circuits, and especially integrated circuits with minimum device features less than 0.35 mm, require the high degree of lithographic resolution that is enabled by this method [1±3]. CMP is also an enabling technology for advanced metal interconnection schemes such as damascene processes [4±6]. Carrier ®lms and other CMP consumables have signi®cant effects on polishing removal rate (RR) and withinwafer non-uniformity (NU). Carrier ®lms mounted on the back of wafers hold the wafers in the wafer carriers during CMP. We have used wafer scale stress modeling [7,8] to * Corresponding author. Tel.: 1 1-602-9657769; fax: 1 1-6029650037. E-mail address: [email protected] (S.P. Beaudoin) 1 Present address: Micron Display Technology, 3000South Denver Way, Boise, ID 83705, USA. 2 Present address: Rensselaer Polytechnic Institute, Center for Advanced Interconnect Science & Technology, Troy, NY 12180-3590, USA.
suggest a possible mechanism by which carrier ®lm properties such as compressibility and thickness affect polishing NU. In this paper, we discuss the results of experiments designed to determine the effects of carrier ®lm thickness, roughness, and compressibility on RR and NU trends seen in tungsten (W) polishing. Selected carrier ®lms with a range of compressibilities, roughnesses and thicknesses were studied using a `standard' W polishing protocol. Tungsten possesses chemical and physical properties that allow the development of stable and reproducible CMP processes. The stable processes make the effects of carrier ®lm properties on W CMP performance easier to study, and for this reason, we have chosen W polishing as our system of interest. Of particular importance to the stability of W polishing processes are the resistance of W to chemical attack and its hardness at room temperature. W is strongly attacked only by ¯uorine and is dissolved only by a mixture of nitric and hydro¯uoric acids [9]. W is also harder than Si. 2. Experimental procedures 2.1. Characterization of carrier ®lms We characterized 28 carrier ®lms having a wide range of compressibilities, thicknesses and surface roughnesses. The
0040-6090/99/$ - see front matter q 1999 Elsevier Science S.A. All rights reserved. PII: S00 40-6090(98)0148 6-2
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
279
Table 1 Carrier ®lms and their roughness and compressibility data
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28
Carrier ®lm type
Roughness average, SD (mm)
Asperity density, SD (per 5 mm)
Compressibility, SD
Displacement, SD (inch)
40 ®lm BUP 500 DF 200 DF 200 high DF 200 low DF 200 med DF 245 IPCF 001 IPCF 002 IPCF 003 IPCF 004 JR 111 MIC high MIC low MIC med PET 1040 PET 1500 Q2000 R200 T1 R200 T2 R200 T3 R200 T4 RHODES SPH 210 SPH 250 SUB 500 SUB 800 WB 20
9.27, 0.66 2.07, 0.63 9.84, 0.9 9.79, 0.42 9.51, 0.54 10.3, 0.63 10.3, 0.76 8.39, 0.70 13.1, 1.00 12.0, 0.77 7.93,0.75 2.10 5.79, 0.30 0.42, 0.19 0.61, 0.19 11.8, 0.34 13.3, 0.73 19.6, 3.02 3.99, 0.42 4.27, 0.19 5.53, 0.50 12.0, 1.28 19.1, 1.21 13.3, 0.32 15.3, 2.03 23.0, 2.86 16.6, 1.45 0.57, 0.04
34.6, 4.04 49.0 30.8, 4.76 29.6 29.4, 3.51 27.8, 2.17 25.0, 2.92 30.6, 5.86 25.2, 3.03 30.0, 3.54 33.4, 4.10 52.0 36.6, 1.82 49.2 48.6 30.0, 2.35 30.0, 2.45 18.2, 3.77 45.6, 4.51 43.4, 3.44 35.2, 4.76 31.0, 4.00 14.2, 3.27 32.0, 1.87 30.2, 2.28 13.4, 3.21 22.4, 1.52 54.2, 10.5
0.19, 0.021 0.03, 0.004 0.17, 0.008 0.18, 0.008 0.21, 0.012 0.20, 0.034 0.26, 0.038 0.17, 0.081 0.16, 0.022 0.15, 0.010 0.16, 0.006 0.05, 0.004 0.18, 0.022 0.23, 0.024 0.25, 0.015 0.20, 0.009 0.09, 0.011 0.02, 0.004 0.15, 0.013 0.10, 0.007 0.10, 0.008 0.08, 0.009 0.03, 0.005 0.10, 0.003 0.12, 0.096 0.03, 0.008 0.03, 0.006 0.10, 0.003
3.7E 2.0E 4.0E 4.2E 4.6E 4.7E 4.8E 3.6E 3.4E 3.6E 3.3E 1.2E 1.0E 0.9E 1.0E 4.1E 2.6E 1.1E 3.0E 2.1E 1.9E 1.7E 1.7E 2.5E 2.9E 1.6E 1.6E 2.0E
carrier ®lms studied and their physical properties are listed in Table 1. The ®lms labeled Q2000, Rhodes, SUBA 500 and SUBA 800 are typically used as polishing pads. They were used as carrier ®lms in this work to determine the effects of their physical properties. 2.1.1. Compressibility measurements The compressibility of a substance is its reduction in volume due to an applied pressure, which quantitatively is the reciprocal of the bulk modulus [10]. It is an important property of a carrier ®lm because (1) the ®lms are under a relatively high pressure (from 3 to 10 psi) during polishing, (2) the distribution of stress on the wafer is affected by the ®lm compressibility, and (3) the variations in stress on the wafer cause variations in the local RR and the NU [7,8]. Carrier ®lm compressibility was measured on a SATEC (model 60 HVL) material tensile test machine. This machine records the displacement of the top surface of a ®lm when pressure is applied to the ®lm. The machine has a movable top plate and a stationary bottom plate. The sample is placed on the bottom plate and the top plate moves towards the bottom plate at a preset speed. Once the pressure between the two plates reaches the preset `test pressure', the top plate stops and continuously adjusts its position to maintain this pressure on the sample. The machine records the vertical displacement of the ®lms,
2 03, 0.0004 2 03, 0.0003 2 03, 0.0002 2 03, 0.0002 2 03, 0.0003 2 03, 0.0008 2 03, 0.0007 2 03, 0.0017 2 03, 0.0005 2 03, 0.0002 2 03, 0.0001 2 03, 0.0001 2 03, 0.0001 2 03, 0.0001 2 03, 0.0001 2 03, 0.0002 2 03, 0.0003 2 03, 0.0002 2 03, 0.0002 2 03, 0.0001 2 03, 0.0002 2 03, 0.0002 2 03, 0.0003 2 03, 0.0001 2 03, 0.0002 2 03, 0.0004 2 03, 0.0003 2 03, 0.0001
DT, at different pressures (loads). In this work, the speed at which the top plate approached the bottom plate was 0.005 inch/s and the test pressure was 10 psi. To simulate polishing conditions, the ®lms were sprayed with water during testing. Before each test, the ®lms were preconditioned by applying the test pressure to the ®lms for 3 min to simulate the wear that occurs during polishing. The original thickness of the ®lms, T0, was measured using a micrometer after the preconditioning. The compressibility test was then conducted by increasing the pressure from 0 to the test pressure and maintaining it for 3 minutes while monitoring the ®lm displacement. After each test, the pressure was released and the test was repeated starting from zero load. The loading cycle was repeated three times for each test ®lm. The compressibility C can be calculated as C DT=T0 . There was essentially no difference in the values of TF, the ®lm thickness following testing, and T0, the initial ®lm thickness, for the ®lms studied. This suggests that cycling the load on these ®lms three times does not irreversibly affect their ®nal thickness. As discussed below, the displacements and compressibilities of the carrier ®lms were used to divide the ®lms into ten groups. The polishing performance of six of the original 28 ®lms was then studied. These ®lms represented six of the original ten groups and covered all interesting displacement and roughness ranges.
280
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
RA
1 ZxL uyudx L x0
1
where L is the sampling length and y is the ordinate height of the surface, relative to the centerline. 2.1.4. AD: asperity density AD is the number of peak/valley pairs encountered over a 5 mm sampling length. If the pro®le rises above the centerline more than once without falling below it, these multiple peaks are considered only as one asperity. AD is an indicator of the space between adjacent asperities. The RA and AD of the ®lms were correlated with the ®lms' polishing performance, as discussed below. 2.2. Polishing experiments Fig. 1. Observed relationship between carrier ®lm roughness average and asperity density.
2.1.2. Surface roughness measurements Surface roughness is de®ned as the vertical distance from peaks to valleys in surface irregularities on the ®lms [10]. In this work, surface roughness was measured on a Tencor P-2 pro®lometer. To use the P-2, the sample is mounted on a testing plate, a stylus is placed in contact with the sample surface, and the sample is moved across the stylus at a constant speed. The speed was set at 0.4 mm/min in this study, and 5 mm paths were sampled. Five replicate analyses were performed on each sample. The surface pro®les provided information on the `roughness average' (RA) and `asperity density' (AD) of the ®lms. 2.1.3. RA: roughness average RA is the arithmetic average of the absolute values of the surface height deviations from the center line, which divides the measured pro®les such that the sum of all areas above the centerline is equal to the sum of all areas below it [11]. RA is calculated according to
The polishing experiments were carried out on an IPEC Avanti 472 polishing machine. The W CMP process parameters used were based on an established protocol developed at IPEC PLANAR (A. Zutshi, pers. commun.): Downforce: 5 psi Platen speed: 50 rev./min Carrier speed: 50 rev./min Pad conditioner: diamond conditioner; conditioning done between wafers Slurry: Baiplanar 7L from Baikowski International Polish pads: IC 1000 over SUBA IV from Rodel All the tests were performed at room temperature on 200 mm CVD W sheet wafers. The pad was `broken in' using 5 W dummy wafers. All polishing parameters were kept constant except the carrier ®lms, so that variations in the RR and NU were due only to the ®lm differences. Three wafers were polished using each carrier ®lm. To assess the RR variations, 41-point diameter scan measurements were performed pre- and post-polish at an edge exclusion of 3 mm using a CDE Resmap thickness measurement tool. The effects of the physical properties of six carrier ®lms were assessed, as discussed below. 3. Results 3.1. Relation between RA and AD As shown in Fig. 1, a linear relationship exists between the roughness average (RA) and asperity density (AD) of the ®lms. Since these parameters are related, it was unnecessary to correlate polishing results with both parameters, and we correlated the polishing results with RA. 3.2. Grouping of carrier ®lms
Fig. 2. Grouping of the carrier ®lms based on roughness and displacement.
In our previous work, we showed that both the thickness and the compressibility of carrier ®lms affects the NU of polished wafers [7,8]. We hypothesized that both of these ®lm properties were intimately related to the displacement
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
281
Table 2 Polishing results for the six carrier ®lms Film type
Roughness (mm)
Displacement (mil)
Number of replicates
Mean RR, SD (A/min)
Mean NU, SD (%)
WB 20 DF 200Med DF 200 JR 111 R200 T4 SUBA 800
1.0 11.0 10.0 2.0 13.0 23.0
2.04 4.64 3.95 1.23 1.66 1.59
3 3 3 3 2 2
4130, 53 4050, 92 4413, 32 4140, 317 4340, 57 4285, 106
7.25, 1.14 4.04, 0.34 2.89, 0.15 8.51, 1.11 3.9, 0 3.69, 0.47
under load. In addition to ®lm displacement effects, we hypothesized that ®lm roughness strongly affects polishing NU. Fig. 2 groups the ®lms based on their displacements and surface roughnesses. Based on a statistically-based analysis of variance (ANOVA) and a Duncon multiple range test [12], the carrier ®lms were grouped in four different roughness groups and three different displacement groups, as shown. SUBA800, JR111, R200T4, WB20, DF200 Med and DF200 ®lms were chosen for further study. These ®lms were not selected based on industrial use patterns. Rather they were chosen as representatives of the most interesting roughness and displacement regions in Fig. 2, in the hope of determining mechanistic information about the effects of these parameters on polishing. 3.3. Polishing results and discussion The polishing results, RR and NU, are listed in Table 2. These results were analyzed using the statistics software package Design Expert [13]. The data are from a balanced design (with three runs for each carrier ®lm) that ends with unbalanced data (with two sets of data for the carrier ®lms R200T4 and SUBA800). Response surfaces for the RR and NU were generated. The Design Expert software provided
Fig. 3. Non-uniformity (NU) response surface. (The numbers are the %NU for each contour line, and the labels are the observed data. The region above the 1% line corresponds to a process whose NU is less than 1%, which is outside the valid region.)
the following correlation equations for RR and NU RR 3534:8 2 157:36 £ RA 1 970:73 £ D 2 344:94 £ D2 1 101:24 £ RA £ D 2 NU 14:27 1 0:57188 £ RA 2 7:1706 £ D 1 1:9241 £ D2 2 0:48104 £ RA £ D 3 Ê /min), NU is the where RR is the average removal rate (A polishing non-uniformity (%), RA is the ®lm roughness average (mm), and D is the ®lm displacement under a 10 psi load (mil). Figs. 3 and 4 show the contours of the NU and RR response surfaces generated by Eqs. (2) and (3). By comparing these ®gures, it can be seen that trends in RR variation with roughness and compressibility correlate with the trends exhibited in the NU. This is consistent with W CMP results found elsewhere (A. Zutshi, pers. commun.). There are ®ve important features to note in Fig. 3. First, the data show that increasing roughness decreases slightly the NU at all displacements in the low displacement regime. Second, the response surface suggests that increasing roughness also decreases the NU in the high displacement regime.
Fig. 4. Removal rate response surface. (The numbers are the removal rate in nm/min of each contour line and the labels are the experimental data.)
282
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
Fig. 5. Effects of ®lm roughness on NU in the low displacement region. (a1) and (b1) represent hypothetical stress variations applied to the bulk ®lms. (a2) and (b2) represent ®lms before loading with low and high roughness, respectively. (a3) and (b3) represent deformations of ®lms with low and high roughness in the low displacement region after loading. (a4) and (b4) represent stress variations passed through the asperities onto the wafer.
The magnitude of this effect is small in the low carrier ®lm displacement region (less than 1.8 mil), and may be large in the high displacement region (greater than 3 mil). The response surface suggests that increasing displacement decreases the NU at any roughness studied in the low displacement region, while the data suggest that increasing displacement increases the NU (slightly) in the high displacement region. Finally, there are roughness and displacement interaction effects in the low displacement and low roughness region. Fig. 4, which shows the effects of carrier ®lm displacement and roughness on RR, mirrors the trends shown in Fig. 3. Speci®cally, in the low displacement region, the data show that increasing roughness has a minor effect on RR, while the response surface suggests that increasing displacement may signi®cantly increase the RR in this range. In the high displacement region, the data suggest that increasing displacement slightly decreases RR, while the response surface suggests that increasing roughness may signi®cantly increase the RR. Our previous modeling work [7,8] shows that stress in carrier ®lms may be transferred to the wafer surface and high local stresses may increase local removal rates while low stresses may decrease these rates. Our prior work further showed that these stresses result from radial and circumferential deformation of the carrier ®lm due to the applied down force during polishing and the physical properties of the carrier ®lm. The results in Figs. 3 and 4 are interpreted below in terms of stress effects. 3.4. Interpretation of data Fig. 5 describes schematically a physical model that may explain the effects of carrier ®lm roughness on RR and NU in the low displacement region in terms of our previous modeling efforts. The ®lms in this region have very low displacements, i.e. both the bulk material and the asperities (roughness) can be considered to be `hard' or almost `incompressible', and the asperities are assumed to pass any stress distribution generated in the ®lm directly onto the wafer. In this scenario, changes in the roughness (the size and frequency of the asperities) has little effect on the
stress distribution on the wafer, and thus no effect on the local RR or the NU. Since the local RR is not affected by the roughness, there is no net effect on the overall RR. Due to the lack of data to validate the response surface model in the high roughness, low displacement region, rigorous interpretation of the predicted behavior will not be attempted. However, we can suggest possible mechanisms that support the prediction. Speci®cally, in the low ®lm displacment region, where any stress non-uniformities generated in the ®lm are passed directly to the wafer, increases in the displacement of the ®lm will allow the stress non-uniformities to be absorbed in the ®lm. Thus, the non-uniformities will not be passed to the wafer surface, and will not cause local removal rate variations. At the same time, due to the net increase in overall displacement of the ®lm, more stress may be applied to the wafer surface, resulting in a higher overall removal rate. A tentative physical model that explains the observed effect of carrier ®lm displacement on RR and NU for high displacement carrier ®lms in terms of the stress distribution at the carrier ®lm±wafer interface is also suggested. For a given ®lm roughness, the deformation of the asperities will be high for ®lms exhibiting very high displacements under load. In this case, several results may be observed. First, the deformation of the asperities in this high deformation region may cause stress generated in the carrier ®lms to be absorbed by the asperities rather than transmitted to the wafer, reducing the overall level of stress transferred to the wafer surface and thus reducing the overall RR. Increasing the displacement of the ®lms will enhance this effect, leading to further RR reductions. However, the high degree of deformation of the asperities may produce non-uniform displacement of the carrier ®lm surface, increasing the variation in the stress that is passed to the surface of the wafer. This will lead to increased NU. In the high displacement region, the trends predicted by the response surface are not interpreted, due to a lack of data to validate the response surface model. 3.4.1. Interaction effects between roughness and displacement The NU increases as the displacement increases in the low roughness region of Fig. 3 while it decreases as the displacement increases in the high roughness region of Fig. 3. The low roughness and low displacement region is apparently a transition region where the interaction between roughness and displacement is complex. Future work includes obtaining additional data in the transition region and conducting polish tests to better de®ne the response curves in this region. 3.4.2. Potential impact of roughness-displacement effects on polishing From Fig. 3, the carrier ®lm roughness and compressibility are shown to have different effects on CMP based on their relative magnitudes. These two factors interact with
D. Wang et al. / Thin Solid Films 345 (1999) 278±283
each other and may dominate the process NU. The most commonly used carrier ®lm, DF200, is in the medium roughness and high displacement region. Lot-to-lot variations in ®lm roughness and displacement in these ®lms will lead to variations in process NU. In particular, the NU might be very sensitive to roughness. Based on the analysis presented above, it appears that there may be an optimal roughness-displacement relationship in carrier ®lms used for W polishing. The use of carrier ®lms that contain the proper relationship between these parameters will facilitate the attainment of high polishing rates and low polishing non-uniformities. 4. Conclusions We have reported the effects of carrier ®lm displacement asperity density (AD) and surface roughness (RA) on W CMP over a limited range of these parameters. The results suggest that the roughness and the displacement of the carrier ®lms may strongly in¯uence polishing performance. Increasing the carrier ®lm roughness has little effect on process NU or RR for low displacement carrier ®lms, while increasing displacement in high displacement ®lms increases the process NU slightly and slightly reduces the RR. Displacement/roughness interaction effects are present in this process, in the low roughness, low displacement regime. These experimental results are not extensive enough to allow absolute interpretation of the response surfaces generated, despite the fact that the response surface results are provocative. Speci®cally, the response surface analysis suggests that increasing either the roughness of high displa-
283
cement carrier ®lms or increasing the displacement of high roughness, low displacement carrier ®lms may signi®cantly enhance the process RR and NU. Future work will involve the collection of more data throughout the roughness-displacement regions studied here to allow more concrete interpretation of the effects of these parameters. The experimental results presented here are consistent with previous stress simulation results which focused on the effects of pad and carrier ®lm thickness and compressibility on NU for smooth carrier ®lms and pads [7,8]. References [1] S. Sivaram, H. Bath, R. Leggett, A. Maury, K. Monnig, R. Tolles, Solid State Technol., May (1992) 87. [2] M. Fury, Solid State Technol., April (1995) 47. [3] R.V. Joshi, H.M. Dalal, in: Advanced Metallization for ULSI Applications in 1994, MRS, 1995, p. 19. [4] S.M. Rossnagel, J. Vacuum Sci. Technol. B 13(1) (1995) 125. [5] K. Veno, K. Ohto, K. Tsurenari, K. Kojiyana, K. Kituta, T. Kikkawa, IEDM-IEEE, (1992) 305. [6] C. Kaanta, S. Bombardier, W. Cote, W. Hill, G. Kerszykowski, H. Landis, D. Poindexter, C. Pollard, VLSI Multilevel Interconnection Conf. (VMIC), 1991, p. 144. [7] D. Wang, J. Lee, S. Beaudoin, T. Bibby, K. Holland, T. Cale, J. Electrochem. Soc. 144 (1997) 1121. [8] C. Srinivasa-Murthy, D. Wang, S.P. Beaudoin, T. Bibby, K. Holland, T.S. Cale, Thin Solid Films 308±309 (1997) 533. [9] G.D. Rieck, Tungsten and Its Compounds, Pergamon, Oxford, 1967. [10] Dictionary of Scienti®c and Technical Terms, 3rd edn., McGraw± Hill, New York, 1984. [11] Tencor P-2 manual, 1990. [12] D. Montgomery, Design and Analysis of Experiments, Wiley, New York, 1991. [13] Design Expert 4.0 Manual (1991).