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Effects of dust on various lubricated sliding contacts
200
World Abstracts on Microelectronics and Reliability 2. R E L I A B I L I T Y
OF
COMPONENTS,
An investigation of corrosion on integrated circuits via pressure-temperature-humidity-bias stressing. DON VANOVERLOOP. IEEE Trans. Reliab. 39(1), 30 (1990). Pressure-temperature-humidity-bias (PTHB) is a consistent, repeatable stress capable of reducing qualification and evaluation cycle time through acceleration of moisture- and bias-induced failure mechanisms. Moreover, PTHB is more capable of finding a susceptibility to corrosion than either THB or autoclave stressing, as illustrated by the historical monitor and precondition stressing results. Therefore, PTHB was implemented as the primary humidity stress in environmental stressing for device qualification, evaluation, and the monitor program. Mold compound A was inferior with respect to prevention of corrosion failures. All memory devices which were previously assembled with this mold compound have been converted to other mold compounds with lower extractable chloride content. A newly developed model for stress induced slit-like voiding. H. KANEKO, M. HASUNUMA, A. SAWABE, T. KAWANOUE, Y. KOHANAWA, S. KOMATUSU and M. MIYAUCHI. 28th A. Proc. Reliab. Phys. Syrup. (IEEE), 194 (March 1990). Thermodynamical analysis of stress induced voiding has clarified that a slit-like void is the origin of metal line open failures. Wedge-shaped voids nucleate initially at specific grain boundaries where { l 11} planes of the fcc come into contact nearly face to face and are misaligned. These wedge-shaped voids deform spontaneously into slit-like shapes in order to reduce the surface free energy during void growth. This spontaneous deformation of void shape reduces the time necessary to open the metal line. Present results strongly suggest that removing these boundaries by improving the degree of selective orientation of the metal films or by changing the metal film orientation from ( l 11 to (100) is effective in preventing stress induced metal line open failure. The effects of defects on the early failure of metal interconnects. KEVIN G. KEMP, KELVIN F. POOLE and DAVID F. FROST. 1EEE Trans. Reliab. 39(1), 26 (1990). Our method predicts the effect of particular defects on the failure rate of metal interconneetions in semiconductor integrated circuits due to electromigration. The defects of interest are missing material which reduces the effective cross-section of the conductor at the point of the defect. Reliability measures for the conductor are computed from a given defect distribution. These defects appreciably increase conductor failure rate during early life but have little effect on median life for line-widths above 1 micron. However, for defect densities typically encountered in current semiconductor manufacturing environments a rapid decrease in medial life is predicted for conductors less than 0.3 micron wide. This result extends the practical data for submicron conductors. Poorer median life, as well as poorer yield, due to these defects will ultimately limit the trend toward narrower line-widths-unless a way is found to overcome this problem. Effects of dust on various lubricated sliding contacts. JI-GAo ZHANG, CHuN-HuI MEI and XL~o-M1N WEN. IEEE Trans. Comport. Hybrids mfg Technol. 13(1), 46 (1990). Sliding electric contact experiments show that in dusty environments, liquid lubricants appear to perform better than wax lubricants. Experimental and theoretical analysis indicates that high permittivity of the lubricants plays an important role in attracting dust. The mixture of dust particles and wax could be very harmful to the contact, especially under low normal force. Dust particles floated on the surface of liquid droplets appear to have high mobility, which reduces the dust problem.
TUBES,
TRANSISTORS
AND
ICs
Electric current flowing through the contacts possibly melts the wax and decreases contact resistance. On the other hand, electric current weakens the mobility and floating ability of dust on the liquid surface which leads to an increase in resistance. Simply reducing the contact size may cause the embedding of dust into wear tracks in low normal force application. A new technique fur imaging the logic state of passivated conductors: biased resistive contrast imaging. EDWARD I. COLE JR. 28th A. Proc. Reliab. Phys. Symp. (IEEE), 45 (March 1990). A new scanning electron microscopy imaging technique, Biased Resistive Contrast Imaging, has been developed to examine the voltage level of conductors on passivated CMOS integrated circuits. This technique employs a modified Resistive Contrast Imaging system to acquire image data on powered circuits. The image is generated by monitoring small fluctuations in the power supply current of an integrated circuit as an electron beam is scanned over the circuit surface. The images produced with this new technique resemble voltage contrast data from circuits with the passivation removed and the surface topography subtracted. Non-destructive applications of this imaging method to functional and failed integrated circuits are described. Possible irradiation effects and methods to minimize them are also discussed. New directions in electrical testing of PCBs for the 1990s. G. HROUNDAS. Circuit Wld 16(4), 29 (1990). As SMT circuit boards continue to increase in complexity, the PCB manufacturer-in order to stay alive in an increasingly competitive market--will be forced to produce boards of the highest quality to meet marketplace performance standards. In addition, he will have to produce them economically at a profit. The complex board of today will be a subsystem tomorrow. It will certainly contain finer features, more embedded resistors, and will even exhibit analogue-like and RF-like features plus even more sophisticated networks. All of these developments are expected to have a strong impact on electrical testing techniques. This paper discussed the problems of increasing yields by means of better process control and higher quality testing for a changing spectrum of faults. The effects of both latent and immediate PCB faults are examined for various grades of products, including low grade commercial, commercial, ground-based military, high re1. commercial, and high tech. military and commercial. Illustrations and tables are provided showing the impact of fault detection on product quality as well as the economic impact achieved for various levels of product quality by means of software SPC (statistical process control). The most important issue facing the PCB manufacturer in the 1990s is certain to be quality of product. This paper outlines strategies for the manufacturer to improve his process through improving the quality of electrical test and the provision of highly accurate fault data as well as the highest possible fault coverage. Visual inspection of surfuce-mounted solder Dints. F. LILLEY, C. A. HOBSON and M. KOUKASH. Circuit Wld 16(4), 13 (1990). Electronics manufacturing throughout the world now uses an increasing percentage of Surface Mount Technology (SMT). The compact and light-weight surfacemounted components offer a number of advantages to manufacturers. Unfortunately, however, these same beneficial characteristics make the quality of the product difficult to guarantee. As miniaturisation continues, the inspection problem becomes worse, and so advanced methods of inspection are required.
World Abstracts on Microelectronics and Reliability 2. R E L I A B I L I T Y
OF
COMPONENTS,
An investigation of corrosion on integrated circuits via pressure-temperature-humidity-bias stressing. DON VANOVERLOOP. IEEE Trans. Reliab. 39(1), 30 (1990). Pressure-temperature-humidity-bias (PTHB) is a consistent, repeatable stress capable of reducing qualification and evaluation cycle time through acceleration of moisture- and bias-induced failure mechanisms. Moreover, PTHB is more capable of finding a susceptibility to corrosion than either THB or autoclave stressing, as illustrated by the historical monitor and precondition stressing results. Therefore, PTHB was implemented as the primary humidity stress in environmental stressing for device qualification, evaluation, and the monitor program. Mold compound A was inferior with respect to prevention of corrosion failures. All memory devices which were previously assembled with this mold compound have been converted to other mold compounds with lower extractable chloride content. A newly developed model for stress induced slit-like voiding. H. KANEKO, M. HASUNUMA, A. SAWABE, T. KAWANOUE, Y. KOHANAWA, S. KOMATUSU and M. MIYAUCHI. 28th A. Proc. Reliab. Phys. Syrup. (IEEE), 194 (March 1990). Thermodynamical analysis of stress induced voiding has clarified that a slit-like void is the origin of metal line open failures. Wedge-shaped voids nucleate initially at specific grain boundaries where { l 11} planes of the fcc come into contact nearly face to face and are misaligned. These wedge-shaped voids deform spontaneously into slit-like shapes in order to reduce the surface free energy during void growth. This spontaneous deformation of void shape reduces the time necessary to open the metal line. Present results strongly suggest that removing these boundaries by improving the degree of selective orientation of the metal films or by changing the metal film orientation from ( l 11 to (100) is effective in preventing stress induced metal line open failure. The effects of defects on the early failure of metal interconnects. KEVIN G. KEMP, KELVIN F. POOLE and DAVID F. FROST. 1EEE Trans. Reliab. 39(1), 26 (1990). Our method predicts the effect of particular defects on the failure rate of metal interconneetions in semiconductor integrated circuits due to electromigration. The defects of interest are missing material which reduces the effective cross-section of the conductor at the point of the defect. Reliability measures for the conductor are computed from a given defect distribution. These defects appreciably increase conductor failure rate during early life but have little effect on median life for line-widths above 1 micron. However, for defect densities typically encountered in current semiconductor manufacturing environments a rapid decrease in medial life is predicted for conductors less than 0.3 micron wide. This result extends the practical data for submicron conductors. Poorer median life, as well as poorer yield, due to these defects will ultimately limit the trend toward narrower line-widths-unless a way is found to overcome this problem. Effects of dust on various lubricated sliding contacts. JI-GAo ZHANG, CHuN-HuI MEI and XL~o-M1N WEN. IEEE Trans. Comport. Hybrids mfg Technol. 13(1), 46 (1990). Sliding electric contact experiments show that in dusty environments, liquid lubricants appear to perform better than wax lubricants. Experimental and theoretical analysis indicates that high permittivity of the lubricants plays an important role in attracting dust. The mixture of dust particles and wax could be very harmful to the contact, especially under low normal force. Dust particles floated on the surface of liquid droplets appear to have high mobility, which reduces the dust problem.
TUBES,
TRANSISTORS
AND
ICs
Electric current flowing through the contacts possibly melts the wax and decreases contact resistance. On the other hand, electric current weakens the mobility and floating ability of dust on the liquid surface which leads to an increase in resistance. Simply reducing the contact size may cause the embedding of dust into wear tracks in low normal force application. A new technique fur imaging the logic state of passivated conductors: biased resistive contrast imaging. EDWARD I. COLE JR. 28th A. Proc. Reliab. Phys. Symp. (IEEE), 45 (March 1990). A new scanning electron microscopy imaging technique, Biased Resistive Contrast Imaging, has been developed to examine the voltage level of conductors on passivated CMOS integrated circuits. This technique employs a modified Resistive Contrast Imaging system to acquire image data on powered circuits. The image is generated by monitoring small fluctuations in the power supply current of an integrated circuit as an electron beam is scanned over the circuit surface. The images produced with this new technique resemble voltage contrast data from circuits with the passivation removed and the surface topography subtracted. Non-destructive applications of this imaging method to functional and failed integrated circuits are described. Possible irradiation effects and methods to minimize them are also discussed. New directions in electrical testing of PCBs for the 1990s. G. HROUNDAS. Circuit Wld 16(4), 29 (1990). As SMT circuit boards continue to increase in complexity, the PCB manufacturer-in order to stay alive in an increasingly competitive market--will be forced to produce boards of the highest quality to meet marketplace performance standards. In addition, he will have to produce them economically at a profit. The complex board of today will be a subsystem tomorrow. It will certainly contain finer features, more embedded resistors, and will even exhibit analogue-like and RF-like features plus even more sophisticated networks. All of these developments are expected to have a strong impact on electrical testing techniques. This paper discussed the problems of increasing yields by means of better process control and higher quality testing for a changing spectrum of faults. The effects of both latent and immediate PCB faults are examined for various grades of products, including low grade commercial, commercial, ground-based military, high re1. commercial, and high tech. military and commercial. Illustrations and tables are provided showing the impact of fault detection on product quality as well as the economic impact achieved for various levels of product quality by means of software SPC (statistical process control). The most important issue facing the PCB manufacturer in the 1990s is certain to be quality of product. This paper outlines strategies for the manufacturer to improve his process through improving the quality of electrical test and the provision of highly accurate fault data as well as the highest possible fault coverage. Visual inspection of surfuce-mounted solder Dints. F. LILLEY, C. A. HOBSON and M. KOUKASH. Circuit Wld 16(4), 13 (1990). Electronics manufacturing throughout the world now uses an increasing percentage of Surface Mount Technology (SMT). The compact and light-weight surfacemounted components offer a number of advantages to manufacturers. Unfortunately, however, these same beneficial characteristics make the quality of the product difficult to guarantee. As miniaturisation continues, the inspection problem becomes worse, and so advanced methods of inspection are required.