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Electrical behavior of amorphous indium–gallium–zinc oxide thin film transistors by embedding Au nanoparticles in the channel layer
Current Applied Physics 14 (2014) 1767e1770
Contents lists available at ScienceDirect
Current Applied Physics journal homepage: www.elsevier.com/locate/cap
Electrical behavior of amorphous indiumegalliumezinc oxide thin film transistors by embedding Au nanoparticles in the channel layer Heewang Yang a, Byungsu Cho a, b, Joohyun Park c, Seokyoon Shin a, Giyul Ham a, Hyungtak Seo d, *, Hyeongtag Jeon a, c, ** a
Division of Materials Science and Engineering, Hanyang University, Seoul 133-791, South Korea Samsung Display Co. Ltd., Tangjeong, Chungcheongnam-Do 336-741, South Korea Department of Nano-scale Semiconductor Engineering, Hanyang University, Seoul 133-791, South Korea d Department of Materials Science and Engineering and Department of Energy Systems Research, Ajou University, Suwon 443-739, South Korea b c
a r t i c l e i n f o
a b s t r a c t
Article history: Received 19 February 2014 Received in revised form 14 September 2014 Accepted 27 September 2014 Available online 17 October 2014
We reported the effects on the electrical behavior of amorphous indiumegalliumezinc oxide (a-IGZO) thin film transistors (TFTs) after introducing various positions and sizes of Au nanoparticles (NPs) in the channel layer. These TFTs showed an off-current increase and threshold voltage (Vth) shift compared to conventional a-IGZO TFTs. The effects of Au NPs are explained to form the carrier conduction path which causes the current leakage in the channel layer, and act as either electron injection sites or trap sites. Therefore, this study demonstrates that the optimized control of size and position of Au NPs in the channel layer is crucial for its application in the electrical stability improvement and Vth control of aIGZO TFTs. © 2014 Elsevier B.V. All rights reserved.
Keywords: a-IGZO TFTs Au Nanoparticles
1. Introduction Amorphous oxide semiconductors (AOSs) represented by amorphous indiumegalliumezinc oxide (a-IGZO) have been considered as the most promising channel material of thin film transistors (TFTs) in the next generation display industry, because a-IGZO TFTs offer a number of advantages, including high field effect mobility, high optical transparency, and low processing temperature in comparison with amorphous silicon (a-Si) TFTs [1e3]. Despite their many merits, the electrical instability of a-IGZO TFTs under the gate bias remains as a crucial problem for practical applications [4]. A few factors such as interactions with ambient at the back channel surface of a-IGZO, the amount of oxygen vacancies and trap sites in the channel layer affect the electrical stability of aIGZO TFTs [5e8]. To improve the instability problems, several studies about the passivation layer have been reported [9]. However, the channel layer of bottom-gate type a-IGZO TFTs cannot
* Corresponding author. Department of Materials Science and Engineering and Department of Energy Systems Research, Ajou University, Suwon 443-739, South Korea. ** Corresponding author. Division of Materials Science and Engineering, Hanyang University, Seoul 133-791, South Korea. E-mail addresses: [email protected] (H. Seo), [email protected] (H. Jeon). http://dx.doi.org/10.1016/j.cap.2014.09.027 1567-1739/© 2014 Elsevier B.V. All rights reserved.
avoid exposure to reactant gases during the passivation process [10]. Recently, our laboratory has applied Au nanoparticles (NPs) to aIGZO TFTs [11]. It is well known that Au NPs exhibit outstanding thermal stability and oxidation resistance [12]. The Au NPs on the back channel surface of a-IGZO contributed to enhance the electrical stability of threshold voltage (Vth) [11]. This effect can be explained by considering the carrier saturation of a-IGZO by Au NPs under various conditions. Nonetheless, a thorough understanding of the carrier transport mechanism in a-IGZO TFTs with Au NPs is still lacking, and further investigation needs to be carried out. In the present study, we focused primarily on the electrical behavior of a-IGZO TFTs with Au NPs, in the case of Au NPs embedded in the channel layer. It was found that the position and size of Au NPs significantly influenced the Vth and off-current of a-IGZO TFTs. We suggest that Au NPs in the channel layer can act as electron injection sites as well as trap sites according to their position, and form the carrier conduction path which leads to an increase in the off-current of a-IGZO TFTs. Therefore, this result indicates that the optimized control of Au NPs size and position should be made to achieve the improvement of TFT properties. Otherwise, it can give rise to the adverse effects such as off-current increase.
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H. Yang et al. / Current Applied Physics 14 (2014) 1767e1770
2. Experimental details We fabricated a typical bottom-gate type device structure for the a-IGZO TFTs. A p-type Si substrate (1e10 U cm) and a thermally oxidized 100 nm thick SiO2 layer were used as the gate electrode and gate dielectric, respectively. The a-IGZO channel layer was deposited via a radio frequency (RF) magnetron sputtering system, using an aIGZO sputtering target (In2O3:Ga2O3:ZnO ¼ 1:1:1 mol %). The sputtering was performed with Ar and O2 mixing gas (mixing ratio of 54:2 for Ar:O2), at a RF power of 100 W, a process pressure of 5.0 mTorr, and room temperature. A lift-off process was utilized to define the channel length (L) and width (W) of 200 and 800 mm, respectively. In the process of the a-IGZO channel layer deposition, Au NPs with various positions and sizes were deposited via an electron-beam evaporator at room temperature. After the elimination of photo-resist (PR) and deposition of a-IGZO channel layer, the source and drain electrodes of Ti/Au (8/40 nm) were deposited via an electron-beam evaporator, using a shadow mask. All fabricated a-IGZO TFTs with Au NPs were annealed in a furnace at 300 C in air ambient for 1 h. The transfer IDS VGS characteristics of a-IGZO TFTs with Au NPs were analyzed under VGS from 5 V to 25 V, applying VDS of 10 V, using an Agilent B1500A precision semiconductor parameter analyzer (Agilent Technologies, Inc., Santa Clara, CA) at room temperature. The size and distribution of the Au NPs were confirmed using high resolution transmission electron microscopy (HRTEM). 3. Results and discussion The transfer IDS VGS characteristics of a-IGZO TFTs with about 3.6 nm Au NPs with various positions are shown in Fig. 1. The inset in Fig.1 exhibits a schematic illustration of a-IGZO TFTs with Au NPs. Au NPs were embedded at each position, from 20 nm above the front channel to the back channel of a-IGZO. Interestingly, except in the case of Au NPs on the back channel surface of a-IGZO, the off-current of a-IGZO TFTs with Au NPs was increased from 8.1 1012 to 6.4 108 A compared to those without Au NPs. In addition, field effect mobility (mFE) and subthreshold swing (S. S) were decreased, as summarized in Table 1. As Au NPs approached the front channel of a-IGZO, the Vth values of a-IGZO TFTs with Au NPs were gradually shifted in the positive direction from 10.9 to 19.9 V. Therefore, it is tentatively supposed that Au NPs can act as either electron injection sites or trap sites in the a-IGZO channel layer, according to their position, as will be described in detail below.
Fig. 1. Transfer curve for a-IGZO TFTs with about 3.6 nm Au NPs depending on Au NPs position. Inset: Schematic cross-section of fabricated a-IGZO TFTs with Au NPs.
Fig. 2 presents the energy band diagrams for a-IGZO TFTs with Au NPs on the back channel surface, under the gate bias conditions. It has been reported that the Schottky barrier is built between aIGZO and Au NPs [13]. The electrons on the conduction band of aIGZO can easily move to Au NPs, since a depletion layer is created by the potential energy difference. As a result, an electric field for drift is formed from a-IGZO to Au NPs. When a positive gate bias is applied, electrons from Au NPs seem to be injected into a-IGZO beyond the Schottky barrier by an increased electric field, as can be seen in Fig. 2(a). Consequently, the Vth value of a-IGZO TFT with Au NPs was shifted negatively, due to an increase in concentration of the electron forming the channel [8]. According to Fig. 2(b), the electron trapping into the Au NPs seems to be dominant in the negative gate bias, because of a decreased electric field for drift. Therefore, the off-current of a-IGZO TFTs with Au NPs showed no significant variance from those without Au NPs, as shown in Fig. 1. In the case of Au NPs embedded in the a-IGZO channel layer under a positive gate bias, the energy band diagrams for a-IGZO TFTs with Au NPs depending on the position of Au NPs are described in Fig. 3. When Au NPs are embedded close to the back channel of a-IGZO, it is thought that the region of a-IGZO below Au NPs is more affected by an electric field than that of a-IGZO above Au NPs. This is due to their regional size difference, as can be seen in Fig. 3(a) [14]. Therefore, the amount of electrons injected into aIGZO is larger than that of electrons trapped into Au NPs. According to Fig. 3(b), when Au NPs are embedded close to the front channel of a-IGZO, electrons appear to be trapped into a-IGZO, since an electric field in the region of a-IGZO below Au NPs decreases. This is why a-IGZO TFTs with Au NPs showed a positive shift of Vth values compared to those with Au NPs on the back channel surface of aIGZO. On the basis of above results, it was indicated that the Vth value of a-IGZO TFTs can be controlled by introducing Au NPs in the channel layer. In order to investigate the off-current of a-IGZO TFTs with Au NPs, electrical analysis for the transfer IDS VGS characteristics was performed, as a function of varying Au NPs size from approximately 2.2 to 3.6 nm. All of Au NPs were embedded 50 nm above the front channel of a-IGZO. Electrical properties of a-IGZO TFTs with Au NPs of various sizes are summarized in Table 2. With the size of Au NPs decreasing to 2.2 nm, the off-current of a-IGZO TFTs with Au NPs was decreased from 3.5 108 to 2.9 1012 A, as shown in Fig. 4. This result can be understood by assuming that Au NPs form the carrier conduction path causing the current leakage in the a-IGZO channel layer at Au NPs size greater than 2.2 nm. As a result, the offcurrent of a-IGZO TFTs with Au NPs was increased, as can be seen in Fig. 1. However, when the size of Au NPs was 2.2 nm, the off-current of a-IGZO TFTs with Au NPs was similar to those without Au NPs. Therefore, we thought that 2.2 nm Au NPs did not contribute to the formation of a carrier conduction path. Fig. 5(a) and (b) exhibit the TEM images of Au NPs in the a-IGZO channel layer, for Au NPs of approximately 3.6 and 2.2 nm. It was observed that Au NPs are evenly distributed in the a-IGZO channel layer. In addition, the distance between Au NPs decreases with increasing in size and density. In order to prove our suggestion, the band alignments between Au NPs under the gate bias are described in Fig. 5(c) and (d). The off-current behavior of a-IGZO TFTs with Au NPs on the back channel surface may be explained by considering that the electron transport between Au NPs cannot be caused by the presence of air as the insulator between them. According to Fig. 5(c), when the Au NPs size and density were about 3.6 nm and 3.1 1012 cm2, we expect that electrons are easily moved through the front channel of a-IGZO, as well as Au NPs, because the conduction band of a-IGZO between Au NPs increases by the depletion effect. However, the electron transport between 2.2 nm Au NPs appears to occur only rarely, due to long distance between Au NPs,
H. Yang et al. / Current Applied Physics 14 (2014) 1767e1770
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Table 1 Electrical properties of a-IGZO TFTs with about 3.6 nm Au NPs as a function of Au NPs position. Au NPs position (nm)
Without
70
60
50
40
30
20
mFE (cm2/Vs)
5.1 13.9 0.34 1.2 107
5.0 10.9 0.41 9.8 106
4.1 11.3 10.2 1.7 103
4.6 12.8 9.89 2.8 103
4.9 15.5 11.9 2.0 103
4.5 18.2 10.9 9.6 102
4.7 19.9 12.2 6.7 102
Vth (V) S. S (V/decade) Ion/off ratio
Fig. 2. Energy band diagrams for a-IGZO TFTs with Au NPs on the back channel surface under (a) a positive gate bias and (b) a negative gate bias.
Fig. 3. Energy band diagrams for a-IGZO TFTs with Au NPs embedded close to (a) the back channel of a-IGZO and (b) the front channel of a-IGZO, under a positive gate bias.
as can be seen in Fig. 5(d). These results indicated that the distance between Au NPs is a critical factor affecting the formation of a carrier conduction path in the a-IGZO channel layer, and leading to an increase in off-current of a-IGZO TFTs with Au NPs. 4. Conclusions In summary, we investigated the electrical behavior of a-IGZO TFTs with Au NPs, as a function of Au NPs position and size. When Au NPs are embedded in the a-IGZO channel layer, it was shown that the off-current increased, and the Vth values were determined by the position of Au NPs. These results can be explained by assuming that Au NPs function not only as electron injection sites Table 2 Electrical properties and Au NPs density of a-IGZO TFTs with Au NPs depending on the size of Au NPs. Au NPs size (nm)
mFE (cm2/Vs)
3.6
5.0 Vth (V) 12.9 S. S (V/decade) 5.31 Ion/off ratio 3.6 103 2 NPs density (cm ) 3.1 1012
2.8
2.6
2.4
2.2
4.8 12.8 4.97 6.9 103 2.4 1012
4.9 12.7 4.26 2.6 104 2.1 1012
4.8 13.0 2.71 2.0 105 1.9 1012
5.1 13.1 0.23 2.5 106 1.8 1012
Fig. 4. Transfer curves for a-IGZO TFTs with Au NPs embedded 50 nm above the a-IGZO front channel, as a function of Au NP size.
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Fig. 5. TEM images for Au NPs of (a) approximately 3.6 nm and (b) approximately 2.2 nm in size. The band alignments between the Au NPs of (c) approximately 3.6 nm and (d) approximately 2.2 nm in size under the gate bias.
but also as electron trap sites, and form the carrier conduction path which causes the current leakage in the a-IGZO channel layer. Furthermore, it was found that the carrier conduction path is particularly affected by the distance between Au NPs. This result provides the basis for optimizing Au NPs condition by tuning their size and position in the a-IGZO channel layer, leading to improved electrical stability, and Vth value control, while suppressing the offcurrent level. Acknowledgments This work was supported by a National Research Foundation of Korea (NRF) grant funded by the Korean Government (MEST) (No. 2011-0015436). References [1] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, H. Hosono, Nat. Lond. 432 (2004) 488e492.
[2] R. Hayashi, A. Sato, M. Ofuji, K. Abe, H. Yabuta, M. Sano, H. Kumomi, K. Nomura, T. Kamiya, M. Hirano, H. Hosono, SID Int. Symp. Dig. Tech. 39 (2008) 621e624. [3] E. Fortunato, P. Barquinha, R. Martins, Adv. Mater. 24 (2012) 2945e2986. [4] J.F. Conley, IEEE Trans. Device Mater. Reliab. 10 (2010) 460e475. [5] J.-S. Park, J.K. Jeong, H.-J. Chung, Y.-G. Mo, H.D. Kim, Appl. Phys. Lett. 92 (2008) 072104. [6] D. Kang, H. Lim, C. Kim, I. Song, J. Park, Y. Park, Appl. Phys. Lett. 90 (2007) 192101. [7] B. Ryu, H.-K. Noh, E.-A. Choi, K.J. Chang, Appl. Phys. Lett. 97 (2010) 022108. [8] A. Suresh, J.F. Muth, Appl. Phys. Lett. 92 (2008) 033502. [9] S. Yang, D.-H. Cho, M.K. Ryu, S.-H.K. Park, C.-S. Hwang, J. Jang, J.K. Jeong, Appl. Phys. Lett. 96 (2010) 213511. [10] J.S. Park, T.S. Kim, K.S. Son, K.-H. Lee, W.-J. Maeng, H.-S. Kim, E.S. Kim, K.B. Park, J.-B. Seon, W. Choi, M.K. Ryu, S.Y. Lee, Appl. Phys. Lett. 96 (2010) 262109. [11] B. Cho, J. Lee, H. Seo, H. Jeon, Appl. Phys. Lett. 102 (2013) 102108. [12] M.-C. Daniel, D. Astruc, Chem. Rev. 104 (2004) 293e346. [13] Y. Shimura, K. Nomura, H. Yanagi, T. Kamiya, M. Hirano, H. Hosono, Thin Solid Films 516 (2008) 5899e5902. [14] S.Y. Lee, D.H. Kim, E. Chong, Y.W. Jeon, D.H. Kim, Appl. Phys. Lett. 98 (2011) 122105.
Contents lists available at ScienceDirect
Current Applied Physics journal homepage: www.elsevier.com/locate/cap
Electrical behavior of amorphous indiumegalliumezinc oxide thin film transistors by embedding Au nanoparticles in the channel layer Heewang Yang a, Byungsu Cho a, b, Joohyun Park c, Seokyoon Shin a, Giyul Ham a, Hyungtak Seo d, *, Hyeongtag Jeon a, c, ** a
Division of Materials Science and Engineering, Hanyang University, Seoul 133-791, South Korea Samsung Display Co. Ltd., Tangjeong, Chungcheongnam-Do 336-741, South Korea Department of Nano-scale Semiconductor Engineering, Hanyang University, Seoul 133-791, South Korea d Department of Materials Science and Engineering and Department of Energy Systems Research, Ajou University, Suwon 443-739, South Korea b c
a r t i c l e i n f o
a b s t r a c t
Article history: Received 19 February 2014 Received in revised form 14 September 2014 Accepted 27 September 2014 Available online 17 October 2014
We reported the effects on the electrical behavior of amorphous indiumegalliumezinc oxide (a-IGZO) thin film transistors (TFTs) after introducing various positions and sizes of Au nanoparticles (NPs) in the channel layer. These TFTs showed an off-current increase and threshold voltage (Vth) shift compared to conventional a-IGZO TFTs. The effects of Au NPs are explained to form the carrier conduction path which causes the current leakage in the channel layer, and act as either electron injection sites or trap sites. Therefore, this study demonstrates that the optimized control of size and position of Au NPs in the channel layer is crucial for its application in the electrical stability improvement and Vth control of aIGZO TFTs. © 2014 Elsevier B.V. All rights reserved.
Keywords: a-IGZO TFTs Au Nanoparticles
1. Introduction Amorphous oxide semiconductors (AOSs) represented by amorphous indiumegalliumezinc oxide (a-IGZO) have been considered as the most promising channel material of thin film transistors (TFTs) in the next generation display industry, because a-IGZO TFTs offer a number of advantages, including high field effect mobility, high optical transparency, and low processing temperature in comparison with amorphous silicon (a-Si) TFTs [1e3]. Despite their many merits, the electrical instability of a-IGZO TFTs under the gate bias remains as a crucial problem for practical applications [4]. A few factors such as interactions with ambient at the back channel surface of a-IGZO, the amount of oxygen vacancies and trap sites in the channel layer affect the electrical stability of aIGZO TFTs [5e8]. To improve the instability problems, several studies about the passivation layer have been reported [9]. However, the channel layer of bottom-gate type a-IGZO TFTs cannot
* Corresponding author. Department of Materials Science and Engineering and Department of Energy Systems Research, Ajou University, Suwon 443-739, South Korea. ** Corresponding author. Division of Materials Science and Engineering, Hanyang University, Seoul 133-791, South Korea. E-mail addresses: [email protected] (H. Seo), [email protected] (H. Jeon). http://dx.doi.org/10.1016/j.cap.2014.09.027 1567-1739/© 2014 Elsevier B.V. All rights reserved.
avoid exposure to reactant gases during the passivation process [10]. Recently, our laboratory has applied Au nanoparticles (NPs) to aIGZO TFTs [11]. It is well known that Au NPs exhibit outstanding thermal stability and oxidation resistance [12]. The Au NPs on the back channel surface of a-IGZO contributed to enhance the electrical stability of threshold voltage (Vth) [11]. This effect can be explained by considering the carrier saturation of a-IGZO by Au NPs under various conditions. Nonetheless, a thorough understanding of the carrier transport mechanism in a-IGZO TFTs with Au NPs is still lacking, and further investigation needs to be carried out. In the present study, we focused primarily on the electrical behavior of a-IGZO TFTs with Au NPs, in the case of Au NPs embedded in the channel layer. It was found that the position and size of Au NPs significantly influenced the Vth and off-current of a-IGZO TFTs. We suggest that Au NPs in the channel layer can act as electron injection sites as well as trap sites according to their position, and form the carrier conduction path which leads to an increase in the off-current of a-IGZO TFTs. Therefore, this result indicates that the optimized control of Au NPs size and position should be made to achieve the improvement of TFT properties. Otherwise, it can give rise to the adverse effects such as off-current increase.
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H. Yang et al. / Current Applied Physics 14 (2014) 1767e1770
2. Experimental details We fabricated a typical bottom-gate type device structure for the a-IGZO TFTs. A p-type Si substrate (1e10 U cm) and a thermally oxidized 100 nm thick SiO2 layer were used as the gate electrode and gate dielectric, respectively. The a-IGZO channel layer was deposited via a radio frequency (RF) magnetron sputtering system, using an aIGZO sputtering target (In2O3:Ga2O3:ZnO ¼ 1:1:1 mol %). The sputtering was performed with Ar and O2 mixing gas (mixing ratio of 54:2 for Ar:O2), at a RF power of 100 W, a process pressure of 5.0 mTorr, and room temperature. A lift-off process was utilized to define the channel length (L) and width (W) of 200 and 800 mm, respectively. In the process of the a-IGZO channel layer deposition, Au NPs with various positions and sizes were deposited via an electron-beam evaporator at room temperature. After the elimination of photo-resist (PR) and deposition of a-IGZO channel layer, the source and drain electrodes of Ti/Au (8/40 nm) were deposited via an electron-beam evaporator, using a shadow mask. All fabricated a-IGZO TFTs with Au NPs were annealed in a furnace at 300 C in air ambient for 1 h. The transfer IDS VGS characteristics of a-IGZO TFTs with Au NPs were analyzed under VGS from 5 V to 25 V, applying VDS of 10 V, using an Agilent B1500A precision semiconductor parameter analyzer (Agilent Technologies, Inc., Santa Clara, CA) at room temperature. The size and distribution of the Au NPs were confirmed using high resolution transmission electron microscopy (HRTEM). 3. Results and discussion The transfer IDS VGS characteristics of a-IGZO TFTs with about 3.6 nm Au NPs with various positions are shown in Fig. 1. The inset in Fig.1 exhibits a schematic illustration of a-IGZO TFTs with Au NPs. Au NPs were embedded at each position, from 20 nm above the front channel to the back channel of a-IGZO. Interestingly, except in the case of Au NPs on the back channel surface of a-IGZO, the off-current of a-IGZO TFTs with Au NPs was increased from 8.1 1012 to 6.4 108 A compared to those without Au NPs. In addition, field effect mobility (mFE) and subthreshold swing (S. S) were decreased, as summarized in Table 1. As Au NPs approached the front channel of a-IGZO, the Vth values of a-IGZO TFTs with Au NPs were gradually shifted in the positive direction from 10.9 to 19.9 V. Therefore, it is tentatively supposed that Au NPs can act as either electron injection sites or trap sites in the a-IGZO channel layer, according to their position, as will be described in detail below.
Fig. 1. Transfer curve for a-IGZO TFTs with about 3.6 nm Au NPs depending on Au NPs position. Inset: Schematic cross-section of fabricated a-IGZO TFTs with Au NPs.
Fig. 2 presents the energy band diagrams for a-IGZO TFTs with Au NPs on the back channel surface, under the gate bias conditions. It has been reported that the Schottky barrier is built between aIGZO and Au NPs [13]. The electrons on the conduction band of aIGZO can easily move to Au NPs, since a depletion layer is created by the potential energy difference. As a result, an electric field for drift is formed from a-IGZO to Au NPs. When a positive gate bias is applied, electrons from Au NPs seem to be injected into a-IGZO beyond the Schottky barrier by an increased electric field, as can be seen in Fig. 2(a). Consequently, the Vth value of a-IGZO TFT with Au NPs was shifted negatively, due to an increase in concentration of the electron forming the channel [8]. According to Fig. 2(b), the electron trapping into the Au NPs seems to be dominant in the negative gate bias, because of a decreased electric field for drift. Therefore, the off-current of a-IGZO TFTs with Au NPs showed no significant variance from those without Au NPs, as shown in Fig. 1. In the case of Au NPs embedded in the a-IGZO channel layer under a positive gate bias, the energy band diagrams for a-IGZO TFTs with Au NPs depending on the position of Au NPs are described in Fig. 3. When Au NPs are embedded close to the back channel of a-IGZO, it is thought that the region of a-IGZO below Au NPs is more affected by an electric field than that of a-IGZO above Au NPs. This is due to their regional size difference, as can be seen in Fig. 3(a) [14]. Therefore, the amount of electrons injected into aIGZO is larger than that of electrons trapped into Au NPs. According to Fig. 3(b), when Au NPs are embedded close to the front channel of a-IGZO, electrons appear to be trapped into a-IGZO, since an electric field in the region of a-IGZO below Au NPs decreases. This is why a-IGZO TFTs with Au NPs showed a positive shift of Vth values compared to those with Au NPs on the back channel surface of aIGZO. On the basis of above results, it was indicated that the Vth value of a-IGZO TFTs can be controlled by introducing Au NPs in the channel layer. In order to investigate the off-current of a-IGZO TFTs with Au NPs, electrical analysis for the transfer IDS VGS characteristics was performed, as a function of varying Au NPs size from approximately 2.2 to 3.6 nm. All of Au NPs were embedded 50 nm above the front channel of a-IGZO. Electrical properties of a-IGZO TFTs with Au NPs of various sizes are summarized in Table 2. With the size of Au NPs decreasing to 2.2 nm, the off-current of a-IGZO TFTs with Au NPs was decreased from 3.5 108 to 2.9 1012 A, as shown in Fig. 4. This result can be understood by assuming that Au NPs form the carrier conduction path causing the current leakage in the a-IGZO channel layer at Au NPs size greater than 2.2 nm. As a result, the offcurrent of a-IGZO TFTs with Au NPs was increased, as can be seen in Fig. 1. However, when the size of Au NPs was 2.2 nm, the off-current of a-IGZO TFTs with Au NPs was similar to those without Au NPs. Therefore, we thought that 2.2 nm Au NPs did not contribute to the formation of a carrier conduction path. Fig. 5(a) and (b) exhibit the TEM images of Au NPs in the a-IGZO channel layer, for Au NPs of approximately 3.6 and 2.2 nm. It was observed that Au NPs are evenly distributed in the a-IGZO channel layer. In addition, the distance between Au NPs decreases with increasing in size and density. In order to prove our suggestion, the band alignments between Au NPs under the gate bias are described in Fig. 5(c) and (d). The off-current behavior of a-IGZO TFTs with Au NPs on the back channel surface may be explained by considering that the electron transport between Au NPs cannot be caused by the presence of air as the insulator between them. According to Fig. 5(c), when the Au NPs size and density were about 3.6 nm and 3.1 1012 cm2, we expect that electrons are easily moved through the front channel of a-IGZO, as well as Au NPs, because the conduction band of a-IGZO between Au NPs increases by the depletion effect. However, the electron transport between 2.2 nm Au NPs appears to occur only rarely, due to long distance between Au NPs,
H. Yang et al. / Current Applied Physics 14 (2014) 1767e1770
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Table 1 Electrical properties of a-IGZO TFTs with about 3.6 nm Au NPs as a function of Au NPs position. Au NPs position (nm)
Without
70
60
50
40
30
20
mFE (cm2/Vs)
5.1 13.9 0.34 1.2 107
5.0 10.9 0.41 9.8 106
4.1 11.3 10.2 1.7 103
4.6 12.8 9.89 2.8 103
4.9 15.5 11.9 2.0 103
4.5 18.2 10.9 9.6 102
4.7 19.9 12.2 6.7 102
Vth (V) S. S (V/decade) Ion/off ratio
Fig. 2. Energy band diagrams for a-IGZO TFTs with Au NPs on the back channel surface under (a) a positive gate bias and (b) a negative gate bias.
Fig. 3. Energy band diagrams for a-IGZO TFTs with Au NPs embedded close to (a) the back channel of a-IGZO and (b) the front channel of a-IGZO, under a positive gate bias.
as can be seen in Fig. 5(d). These results indicated that the distance between Au NPs is a critical factor affecting the formation of a carrier conduction path in the a-IGZO channel layer, and leading to an increase in off-current of a-IGZO TFTs with Au NPs. 4. Conclusions In summary, we investigated the electrical behavior of a-IGZO TFTs with Au NPs, as a function of Au NPs position and size. When Au NPs are embedded in the a-IGZO channel layer, it was shown that the off-current increased, and the Vth values were determined by the position of Au NPs. These results can be explained by assuming that Au NPs function not only as electron injection sites Table 2 Electrical properties and Au NPs density of a-IGZO TFTs with Au NPs depending on the size of Au NPs. Au NPs size (nm)
mFE (cm2/Vs)
3.6
5.0 Vth (V) 12.9 S. S (V/decade) 5.31 Ion/off ratio 3.6 103 2 NPs density (cm ) 3.1 1012
2.8
2.6
2.4
2.2
4.8 12.8 4.97 6.9 103 2.4 1012
4.9 12.7 4.26 2.6 104 2.1 1012
4.8 13.0 2.71 2.0 105 1.9 1012
5.1 13.1 0.23 2.5 106 1.8 1012
Fig. 4. Transfer curves for a-IGZO TFTs with Au NPs embedded 50 nm above the a-IGZO front channel, as a function of Au NP size.
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Fig. 5. TEM images for Au NPs of (a) approximately 3.6 nm and (b) approximately 2.2 nm in size. The band alignments between the Au NPs of (c) approximately 3.6 nm and (d) approximately 2.2 nm in size under the gate bias.
but also as electron trap sites, and form the carrier conduction path which causes the current leakage in the a-IGZO channel layer. Furthermore, it was found that the carrier conduction path is particularly affected by the distance between Au NPs. This result provides the basis for optimizing Au NPs condition by tuning their size and position in the a-IGZO channel layer, leading to improved electrical stability, and Vth value control, while suppressing the offcurrent level. Acknowledgments This work was supported by a National Research Foundation of Korea (NRF) grant funded by the Korean Government (MEST) (No. 2011-0015436). References [1] K. Nomura, H. Ohta, A. Takagi, T. Kamiya, M. Hirano, H. Hosono, Nat. Lond. 432 (2004) 488e492.
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