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Electrical characterization of zirconium silicate films obtained from novel MOCVD precursors
Microelectronics Reliability 43 (2003) 1253–1257 www.elsevier.com/locate/microrel
Electrical characterization of zirconium silicate films obtained from novel MOCVD precursors Albena Paskaleva a, Martin Lemberger a,*, Stefan Z€ urcher b, Anton J. Bauer c, Lothar Frey a,c, Heiner Ryssel a,c a
Chair of Electron Devices, Friedrich-Alexander-University Erlangen-Nuremberg, Cauerstrasse 6, 91058 Erlangen, Germany b Laboratory for Surface Science and Technology, Swiss Federal Institute of Technology Zurich, Sonneggstrasse 5, 8092 Zurich, Switzerland c Fraunhofer Institute of Integrated Systems and Device Technology, Schottkystrasse 10, 91058 Erlangen, Germany Received 9 January 2003; received in revised form 20 February 2003
Abstract In the present work, the potential of zirconium silicate (ZrSix Oy ) films as an alternative gate dielectric to SiO2 for future technology generations is demonstrated. Novel single-source precursors for MOCVD of zirconium silicate were synthesized and ZrSix Oy layers were deposited. I–V and C–V measurement data are presented and detected charge trapping phenomena are discussed. Ó 2003 Elsevier Ltd. All rights reserved.
1. Introduction The aggressive thickness scaling of SiO2 -based gate dielectrics poses a number of limitations such as high leakage current, enhanced boron penetration, and reliability limitations [1]. Therefore, the need for high permittivity (high-k) gate dielectrics to replace SiO2 in future technology generations is one of the urgent problems facing todayÕs microelectronic. The high permittivity, however, is not the only requirement, the new gate dielectrics have to satisfy. Thermal and chemical stability in direct contact with silicon, low leakage current and good reliability characteristics (i.e. low level of ‘‘bulk’’ and interface charges, low level of trapping and high breakdown fields) are further properties to be considered when implementing alternative gate dielectrics. Zirconium silicate (ZrSix Oy ) is considered as a promising candidate. First results of thin films obtained by different deposition methods [1–3] indicated the po-
* Corresponding author. Tel.: +49-9131-85-28651; fax: +499131-85-28698. E-mail address: [email protected] (M. Lemberger).
tential of this new dielectric material. Furthermore, metal-organic chemical vapor deposition (MOCVD) is generally preferred because of better step coverage and upscalability. However, it is based on the availability of volatile precursors, which preferably should be singlesource to guarantee a more controllable processing. In this paper, zirconium silicate films obtained by MOCVD from novel single-source precursors are investigated. After a brief introduction of the precursors used for the MOCVD and the samples preparation, we present electrical measurement data and discuss detected charge trapping phenomena.
2. Precursor synthesis and sample preparation Commercial single-source precursors are currently not available. Therefore, a precursors A with a ratio of Zr to Si of 1:2 was synthesized (A ¼ Zr(acac)2 (OSiMe3 )2 , where acac ¼ acetylacetonato, OSiMe3 ¼ trimethylsilanolate). The synthesis, structure and characterization of the precursor were described in a recent publication [4]. Synthesis yield, purity, volatility, hydrolysis stability, and regions of kinetic deposition fulfill the requirements
0026-2714/$ - see front matter Ó 2003 Elsevier Ltd. All rights reserved. doi:10.1016/S0026-2714(03)00180-X
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for implementation into a MOCVD process. X-ray photoelectron spectroscopy analysis of the deposited films shows that silicon is incorporated into the layers with less than the expected stoichiometry. The composition of the films is found to be Zr1x Six O2 , where x is between 0.05 and 0.25, depending on precursor and deposition parameters [4]. Electrical characterization was done using metaloxide-semiconductor (MOS) capacitors manufactured on 19 X cm p-type silicon wafers (boron concentration about 1015 cm3 ). After surface conditioning in HF, the zirconium silicate films were deposited immediately. The deposition was performed in an argon/oxygen atmosphere at 550 °C and a total pressure of 2.5 mbar, which means a film composition of Zr0:85 Si0:15 O2 . A rapid thermal anneal (RTA) in oxygen atmosphere at 900 °C for 10 s was performed and gate electrodes consisting of 20 nm titanium and 1 lm aluminum with an area of 2 104 cm2 were evaporated through a shadow mask. No forming gas anneal was performed.
3. Results and discussion The flatband voltage, VFB , determined from C–V measurements (100 kHz, ramp rate of 0.05 V/s) varies between )0.55 and )0.60 V (Figs. 1 and 2) for unstressed samples. VFB for an ideal MOS capacitor with titanium electrode (work function 4.3 eV) and p-type silicon should be about )0.7 V. Therefore, the results reveal a negative charge, Qf , of about 5 to 6 1011 cm2 in the films, which is lower compared to reported values higher than 1012 cm2 [1]. The flatband hysteresis, DVFB , of a C–V sweep ranging from )3 to 1.5 V is found to be about 50 mV. Some instabilities in flatband voltage have also been observed. For example, we found that the VFB of the current C–V sweep is strongly influenced by the
Fig. 1. VFB vs Vend of the previous C–V measurement of a 18 nm sample. Above Vend ¼ 2 V a significant charge trapping takes place.
Fig. 2. C–V characteristics of a 18 nm (optically measured) sample. (a) Shift of consecutive ()3/+3) V C–V measurements. (b) Change in flatband voltage VFB after holding the sample in accumulation at different voltages for different times.
final voltage VEnd of the previous C–V measurement (Fig. 1, all measurements were performed on one capacitor starting at VEnd ¼ 0 V). VFB is nearly constant up to VEnd ¼ 2 V. But a further increase of VEnd leads to a strong decrease of VFB (first scan). This decrease is irreversible and the subsequent measurements (second scan) show a stable VFB of )0.15 V, which means a build-up of negative charge of about 2 1012 cm2 . Possible processes leading to this negative charge build-up are: (1) trapping of electrons in neutral traps; (2) release of holes from neutral sites. Having in mind the recent suggestions of the ZrSix Oy electronic structure [5], we conclude that the process leading to negative charge build-up is the electron trapping in Zr d-states, which requires an energy of about 1.2 eV [5]. Concerning flatband hysteresis, values of less than 10 mV as well as greater than 100 mV were measured on the same capacitor, depending on ramp rate, frequency, and maximum voltage of the C–V measurement sweep. To obtain more information on electron trapping, we tried to detrap the trapped electrons. Successive ()3/+3) V C–V scans were performed to fill the traps (Fig. 2b). It can be seen that the first scan charges nearly
A. Paskaleva et al. / Microelectronics Reliability 43 (2003) 1253–1257
all these traps, which implies that they are near the zirconium silicate/silicon interface and their capture cross section is large. After the ()3/+3) V C–V scans, the sample was kept in accumulation for different times and at different voltages and VFB was determined again (with fixed VEnd at 0.2 V, to prevent tunneling of electrons from silicon). It is obvious that by stressing the sample at )3 V for 100 s, it is not possible to detrap electrons (no shift of VFB is observed). Keeping the structure at )3.5 V (100 s) and at )4 V (700 s) leads to a partial shift of VFB back to its initial value, i.e. some of the trapped electrons are released. These results imply that the emission time of the traps is substantially larger than the capture time. In Fig. 3a, the I–V curves of the films measured in accumulation mode are shown. It can be seen that the first I–V curve (fresh) differs from the following ones. The same is valid also for the measurements with the opposite gate polarity (Fig. 4). The reason for this unusual behavior of the first I–V curve is most likely the same, which causes the instabilities in C–V curves. To clarify the origin of the processes taking place in the structures and leading to instabilities, samples with different metal gates as well as different post-deposition annealing and pre-deposition interface preparation are
1255
Fig. 4. I–V curves measured under illumination in inversion mode on a 18 nm sample.
under investigation. Despite these instabilities, the leakage current density, JGate , of 5 109 A/cm2 at )3 V is low. The I–V curves measured at various temperatures (room temperature up to 100 °C) are shown in Fig. 3b. Two different ranges are clearly visible, one for gate voltages higher than j4j V and a second for VGate between )2 and )4 V.
Fig. 3. (a) I–V characteristics of a 18 nm sample. (b) I–V curves measured at different temperatures. (c) Arrhenius plot of JGate for different VGate . (d) Linear dependence of lnðJGate JDC Þ on VGate .
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For gate voltages higher than j4j V, a strong temperature dependence is observed and the conduction mechanism was established to be of Poole–Frenkel type (the I–V curves plotted in Poole–Frenkel coordinates, i.e. lnðJGate =EÞ vs E1=2 , can be fitted very well with a straight line for all temperatures). The current measured at different voltages as a function of reciprocal temperature is given in Fig. 3c. We have found a trap energy, /b , from 0.9 to 1.0 eV under the conduction band edge of the zirconium silicate, depending on the gate voltage, e.g. for VGate ¼ 5 V, the trap energy was determined to be /b ¼ 0:94 eV. After measurement at 100 °C, the sample was cooled down to 30 °C and the I–V curve was measured again (Fig. 3a). A shift of 0.25 V to more negative bias is observed, implying a build-up of negative charge with a density of 1.1 1012 cm2 . This is in good agreement with the values obtained from C–V measurements. Therefore, both C–V and I–V measurements show electron trapping up to 2 1012 cm2 and further optimization of the properties of these films should be aimed at reducing this trapping by appropriate annealing steps or interface engineering. To examine the conduction mechanism in the voltage range between )2 and )4 V, we used a trap-assisted tunneling model [6,7]. According to this model, the current at low voltages is given by the equation JGate Nt exp½ðqVGate /1 þ /t Þ=kT ;
ð1Þ
where Nt is the trap density, /1 is the barrier height at the injecting interface, and /t is the trap energy level below the conduction band edge of the dielectric (see Fig. 5). Plotting the data lnðJGate Þ vs VGate should give a straight line as is observed in Fig. 3d (displacement current, JDC , was estimated to be 2 nA/cm2 and was subtracted from the curves). The fit of the data with the above equation gives a value of about 0.2 eV for the difference /1 /t . As this difference represents the energy position of the traps with respect to the Fermi level of metal, we conclude that the traps are situated energetically very close to the Fermi level of the titanium
Fig. 5. Band diagram of the Ti/ZrSix Oy /Si MIS structures and suggested conduction mechanisms through it.
gate electrode. This will cause enhanced leakage current in thin layers. The trap-assisted tunneling is a two-stage process in which the electrons tunnel first to trap sites and then from the trap site to the conduction band of silicon. An energy position of traps close to Fermi level of metal enhances the probability for the first process, whereas the probability for the second process increases with the reduction of thickness, in this way increasing the leakage through the dielectric layer. In order to find whether the traps involved in the trap-assisted tunneling (trap energy /t ) are those responsible for Poole–Frenkel conduction (trap energy /b ), one has to know /t , i.e. to find the barrier height, /1 , at the titanium/zirconium silicate interface. To calculate /1 we used the band offset of silicon to zirconium silicate conduction band of 1.5 eV [8] and the work functions of titanium and p-type silicon. With this values we obtain a /1 of about 1.8 eV and having in mind that /1 /t ¼ 0:2 eV, the trap energy position /t below the conduction band edge of the zirconium silicate is found to be 1.6 eV. For the traps involved in Poole–Frenkel conduction we have obtained /b values of about 0.9–1.0 eV. Therefore, it emerges that the traps responsible for Poole–Frenkel conduction and trap-assisted tunneling are different. In Fig. 4, I–V curves in inversion mode at different temperatures are shown. Because of the weakly doped substrate, the measurements were performed under illumination to avoid deep depletion and to obtain a higher density of inversion carriers. As can be seen, the shape of the curves as well as the temperature dependence are similar to that for the I–V curves measured in accumulation (Fig. 3b). The curves appear at lower voltages compared to those in accumulation. The flatband voltage of )0.6 V is mainly responsible for this asymmetry and by plotting the I–V curves with respect to VGate VFB , the asymmetry disappears to a great extend. The lower barrier height of 1.5 eV [8] at the zirconium silicate/silicon interface (compared to the obtained /1 ¼ 1:8 eV) gives also rise to the asymmetry. Further investigation of the conduction mechanism at positive biases shows that it is again Poole–Frenkel emission from traps and the trap level is estimated to be 0.9–1.0 eV below the conduction band edge of the zirconium silicate. These are the same values as in the case with negative biases, and therefore, these results are a straightforward evidence that no thin SiO2 layer is formed at the zirconium silicate/silicon interface during deposition and post-deposition annealing, i.e. the films obtained are thermally stable on silicon. Transmission electron microscopy, where after a RTA no noticeable interfacial layer between the zirconium silicate and the silicon substrate is seen [9], gives further evidence for the assumption of a single layer model. Based on results obtained by I–V measurements, the band diagram of the structure is constructed (Fig. 5) assuming a band offset of silicon to zirconium silicate conduction
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band of 1.5 eV [8]. The conduction mechanisms found for different voltage ranges are depicted in the figure, too. The dielectric constant of the films determined by ellipsometry (using a refractive index of 1.9 at a wavelength of 633 nm) and C–V measurements is found to be between 10.5 and 15 depending on precursor material and layer thickness [9].
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Acknowledgements The work was supported by the Deutsche Forschungsgemeinschaft (DFG), priority program 1119. A. Paskaleva would like to acknowledge the financial support of Alexander von Humboldt Foundation.
References 4. Conclusions A novel single-source precursor for the MOCVD of zirconium silicate films was synthesized and stable ZrSix Oy layers were deposited. The dielectric constant of the films was found to be 10.5 to 15. Electrical characterizations of the films show low leakage currents (5 109 A/cm2 at )3 V) and the conduction mechanisms are found to be trap-assisted tunneling in the lower voltage range and Poole–Frenkel conduction at higher gate biases. Two different trap sites located at 1.6 eV and 0.9 to 1.0 eV under the conduction band edge of the zirconium silicate are found to be responsible for trap-assisted tunneling and Poole–Frenkel conduction, respectively. From C–V measurements, a bulk negative charge in order of 5 to 6 1011 cm2 and a small hysteresis (about 50 mV) is found. Both C–V and I–V measurements show instabilities as well as significant negative charge trapping in order of 1.1 to 2 1012 cm2 . The I–V characteristics of the films reveal that no interfacial SiO2 -layer is formed during deposition and annealing of the films. Further optimization of the properties of these films should be aimed at reducing the trapping by appropriate annealing steps and interface engineering.
[1] Wilk GD, Wallace RM, Anthony JM. High-k dielectrics: Current status and materials properties considerations. J Appl Phys 2001;89(10):5243–75. [2] Gordon RG, Becker J, Hausmann D, Suh S. Vapor deposition of metal oxides and silicates: Possible gate insulators for future microelectronics. Chem Mater 2001; 13:2463–4. [3] Hendrix BC, Borovik AS, Xu C, Roeder JF, Baum TH, Bevan MJ, et al. Composition control of Hf1x Six O2 films deposited on Si by chemical-vapor deposition using amide precursors. Appl Phys Lett 2002;80(13):2362–4. [4] Z€ urcher S, Morstein M, Spencer ND, Lemberger M, Bauer AJ. New single-source precursors for the MOCVD of high-k dielectric zirconium silicates to replace SiO2 in semiconducting devices. Chem Vap Dep 2002;8(4):171–7. [5] Misra V, Lucovsky G, Parsons G. Issues in high-k gate stack interfaces. MRS Bull 2002;27(3):212–6. [6] Svensson C, Lundstr€ om I. Trap-assisted charge injection in MNOS structures. J Appl Phys 1973;44(10):4657–63. [7] Houssa M, Tuominen M, Naili M, AfanasÕev V, Stesmans A, Haukka S, Heyns MM. Trap-assisted tunneling in high permittivity gate dielectric stacks. J Appl Phys 2000; 87(12):8615–20. [8] Robertson J. Electronic structure and band offsets of highdielectric-constant gate oxides. MRS Bull 2002;27(3):217–21. [9] Lemberger M, Paskaleva A, Z€ urcher S, Bauer AJ, Frey L. Ryssel H. Zirconium silicate films obtained from novel MOCVD precursors. J Non-Cryst Sol, in press.
Electrical characterization of zirconium silicate films obtained from novel MOCVD precursors Albena Paskaleva a, Martin Lemberger a,*, Stefan Z€ urcher b, Anton J. Bauer c, Lothar Frey a,c, Heiner Ryssel a,c a
Chair of Electron Devices, Friedrich-Alexander-University Erlangen-Nuremberg, Cauerstrasse 6, 91058 Erlangen, Germany b Laboratory for Surface Science and Technology, Swiss Federal Institute of Technology Zurich, Sonneggstrasse 5, 8092 Zurich, Switzerland c Fraunhofer Institute of Integrated Systems and Device Technology, Schottkystrasse 10, 91058 Erlangen, Germany Received 9 January 2003; received in revised form 20 February 2003
Abstract In the present work, the potential of zirconium silicate (ZrSix Oy ) films as an alternative gate dielectric to SiO2 for future technology generations is demonstrated. Novel single-source precursors for MOCVD of zirconium silicate were synthesized and ZrSix Oy layers were deposited. I–V and C–V measurement data are presented and detected charge trapping phenomena are discussed. Ó 2003 Elsevier Ltd. All rights reserved.
1. Introduction The aggressive thickness scaling of SiO2 -based gate dielectrics poses a number of limitations such as high leakage current, enhanced boron penetration, and reliability limitations [1]. Therefore, the need for high permittivity (high-k) gate dielectrics to replace SiO2 in future technology generations is one of the urgent problems facing todayÕs microelectronic. The high permittivity, however, is not the only requirement, the new gate dielectrics have to satisfy. Thermal and chemical stability in direct contact with silicon, low leakage current and good reliability characteristics (i.e. low level of ‘‘bulk’’ and interface charges, low level of trapping and high breakdown fields) are further properties to be considered when implementing alternative gate dielectrics. Zirconium silicate (ZrSix Oy ) is considered as a promising candidate. First results of thin films obtained by different deposition methods [1–3] indicated the po-
* Corresponding author. Tel.: +49-9131-85-28651; fax: +499131-85-28698. E-mail address: [email protected] (M. Lemberger).
tential of this new dielectric material. Furthermore, metal-organic chemical vapor deposition (MOCVD) is generally preferred because of better step coverage and upscalability. However, it is based on the availability of volatile precursors, which preferably should be singlesource to guarantee a more controllable processing. In this paper, zirconium silicate films obtained by MOCVD from novel single-source precursors are investigated. After a brief introduction of the precursors used for the MOCVD and the samples preparation, we present electrical measurement data and discuss detected charge trapping phenomena.
2. Precursor synthesis and sample preparation Commercial single-source precursors are currently not available. Therefore, a precursors A with a ratio of Zr to Si of 1:2 was synthesized (A ¼ Zr(acac)2 (OSiMe3 )2 , where acac ¼ acetylacetonato, OSiMe3 ¼ trimethylsilanolate). The synthesis, structure and characterization of the precursor were described in a recent publication [4]. Synthesis yield, purity, volatility, hydrolysis stability, and regions of kinetic deposition fulfill the requirements
0026-2714/$ - see front matter Ó 2003 Elsevier Ltd. All rights reserved. doi:10.1016/S0026-2714(03)00180-X
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for implementation into a MOCVD process. X-ray photoelectron spectroscopy analysis of the deposited films shows that silicon is incorporated into the layers with less than the expected stoichiometry. The composition of the films is found to be Zr1x Six O2 , where x is between 0.05 and 0.25, depending on precursor and deposition parameters [4]. Electrical characterization was done using metaloxide-semiconductor (MOS) capacitors manufactured on 19 X cm p-type silicon wafers (boron concentration about 1015 cm3 ). After surface conditioning in HF, the zirconium silicate films were deposited immediately. The deposition was performed in an argon/oxygen atmosphere at 550 °C and a total pressure of 2.5 mbar, which means a film composition of Zr0:85 Si0:15 O2 . A rapid thermal anneal (RTA) in oxygen atmosphere at 900 °C for 10 s was performed and gate electrodes consisting of 20 nm titanium and 1 lm aluminum with an area of 2 104 cm2 were evaporated through a shadow mask. No forming gas anneal was performed.
3. Results and discussion The flatband voltage, VFB , determined from C–V measurements (100 kHz, ramp rate of 0.05 V/s) varies between )0.55 and )0.60 V (Figs. 1 and 2) for unstressed samples. VFB for an ideal MOS capacitor with titanium electrode (work function 4.3 eV) and p-type silicon should be about )0.7 V. Therefore, the results reveal a negative charge, Qf , of about 5 to 6 1011 cm2 in the films, which is lower compared to reported values higher than 1012 cm2 [1]. The flatband hysteresis, DVFB , of a C–V sweep ranging from )3 to 1.5 V is found to be about 50 mV. Some instabilities in flatband voltage have also been observed. For example, we found that the VFB of the current C–V sweep is strongly influenced by the
Fig. 1. VFB vs Vend of the previous C–V measurement of a 18 nm sample. Above Vend ¼ 2 V a significant charge trapping takes place.
Fig. 2. C–V characteristics of a 18 nm (optically measured) sample. (a) Shift of consecutive ()3/+3) V C–V measurements. (b) Change in flatband voltage VFB after holding the sample in accumulation at different voltages for different times.
final voltage VEnd of the previous C–V measurement (Fig. 1, all measurements were performed on one capacitor starting at VEnd ¼ 0 V). VFB is nearly constant up to VEnd ¼ 2 V. But a further increase of VEnd leads to a strong decrease of VFB (first scan). This decrease is irreversible and the subsequent measurements (second scan) show a stable VFB of )0.15 V, which means a build-up of negative charge of about 2 1012 cm2 . Possible processes leading to this negative charge build-up are: (1) trapping of electrons in neutral traps; (2) release of holes from neutral sites. Having in mind the recent suggestions of the ZrSix Oy electronic structure [5], we conclude that the process leading to negative charge build-up is the electron trapping in Zr d-states, which requires an energy of about 1.2 eV [5]. Concerning flatband hysteresis, values of less than 10 mV as well as greater than 100 mV were measured on the same capacitor, depending on ramp rate, frequency, and maximum voltage of the C–V measurement sweep. To obtain more information on electron trapping, we tried to detrap the trapped electrons. Successive ()3/+3) V C–V scans were performed to fill the traps (Fig. 2b). It can be seen that the first scan charges nearly
A. Paskaleva et al. / Microelectronics Reliability 43 (2003) 1253–1257
all these traps, which implies that they are near the zirconium silicate/silicon interface and their capture cross section is large. After the ()3/+3) V C–V scans, the sample was kept in accumulation for different times and at different voltages and VFB was determined again (with fixed VEnd at 0.2 V, to prevent tunneling of electrons from silicon). It is obvious that by stressing the sample at )3 V for 100 s, it is not possible to detrap electrons (no shift of VFB is observed). Keeping the structure at )3.5 V (100 s) and at )4 V (700 s) leads to a partial shift of VFB back to its initial value, i.e. some of the trapped electrons are released. These results imply that the emission time of the traps is substantially larger than the capture time. In Fig. 3a, the I–V curves of the films measured in accumulation mode are shown. It can be seen that the first I–V curve (fresh) differs from the following ones. The same is valid also for the measurements with the opposite gate polarity (Fig. 4). The reason for this unusual behavior of the first I–V curve is most likely the same, which causes the instabilities in C–V curves. To clarify the origin of the processes taking place in the structures and leading to instabilities, samples with different metal gates as well as different post-deposition annealing and pre-deposition interface preparation are
1255
Fig. 4. I–V curves measured under illumination in inversion mode on a 18 nm sample.
under investigation. Despite these instabilities, the leakage current density, JGate , of 5 109 A/cm2 at )3 V is low. The I–V curves measured at various temperatures (room temperature up to 100 °C) are shown in Fig. 3b. Two different ranges are clearly visible, one for gate voltages higher than j4j V and a second for VGate between )2 and )4 V.
Fig. 3. (a) I–V characteristics of a 18 nm sample. (b) I–V curves measured at different temperatures. (c) Arrhenius plot of JGate for different VGate . (d) Linear dependence of lnðJGate JDC Þ on VGate .
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For gate voltages higher than j4j V, a strong temperature dependence is observed and the conduction mechanism was established to be of Poole–Frenkel type (the I–V curves plotted in Poole–Frenkel coordinates, i.e. lnðJGate =EÞ vs E1=2 , can be fitted very well with a straight line for all temperatures). The current measured at different voltages as a function of reciprocal temperature is given in Fig. 3c. We have found a trap energy, /b , from 0.9 to 1.0 eV under the conduction band edge of the zirconium silicate, depending on the gate voltage, e.g. for VGate ¼ 5 V, the trap energy was determined to be /b ¼ 0:94 eV. After measurement at 100 °C, the sample was cooled down to 30 °C and the I–V curve was measured again (Fig. 3a). A shift of 0.25 V to more negative bias is observed, implying a build-up of negative charge with a density of 1.1 1012 cm2 . This is in good agreement with the values obtained from C–V measurements. Therefore, both C–V and I–V measurements show electron trapping up to 2 1012 cm2 and further optimization of the properties of these films should be aimed at reducing this trapping by appropriate annealing steps or interface engineering. To examine the conduction mechanism in the voltage range between )2 and )4 V, we used a trap-assisted tunneling model [6,7]. According to this model, the current at low voltages is given by the equation JGate Nt exp½ðqVGate /1 þ /t Þ=kT ;
ð1Þ
where Nt is the trap density, /1 is the barrier height at the injecting interface, and /t is the trap energy level below the conduction band edge of the dielectric (see Fig. 5). Plotting the data lnðJGate Þ vs VGate should give a straight line as is observed in Fig. 3d (displacement current, JDC , was estimated to be 2 nA/cm2 and was subtracted from the curves). The fit of the data with the above equation gives a value of about 0.2 eV for the difference /1 /t . As this difference represents the energy position of the traps with respect to the Fermi level of metal, we conclude that the traps are situated energetically very close to the Fermi level of the titanium
Fig. 5. Band diagram of the Ti/ZrSix Oy /Si MIS structures and suggested conduction mechanisms through it.
gate electrode. This will cause enhanced leakage current in thin layers. The trap-assisted tunneling is a two-stage process in which the electrons tunnel first to trap sites and then from the trap site to the conduction band of silicon. An energy position of traps close to Fermi level of metal enhances the probability for the first process, whereas the probability for the second process increases with the reduction of thickness, in this way increasing the leakage through the dielectric layer. In order to find whether the traps involved in the trap-assisted tunneling (trap energy /t ) are those responsible for Poole–Frenkel conduction (trap energy /b ), one has to know /t , i.e. to find the barrier height, /1 , at the titanium/zirconium silicate interface. To calculate /1 we used the band offset of silicon to zirconium silicate conduction band of 1.5 eV [8] and the work functions of titanium and p-type silicon. With this values we obtain a /1 of about 1.8 eV and having in mind that /1 /t ¼ 0:2 eV, the trap energy position /t below the conduction band edge of the zirconium silicate is found to be 1.6 eV. For the traps involved in Poole–Frenkel conduction we have obtained /b values of about 0.9–1.0 eV. Therefore, it emerges that the traps responsible for Poole–Frenkel conduction and trap-assisted tunneling are different. In Fig. 4, I–V curves in inversion mode at different temperatures are shown. Because of the weakly doped substrate, the measurements were performed under illumination to avoid deep depletion and to obtain a higher density of inversion carriers. As can be seen, the shape of the curves as well as the temperature dependence are similar to that for the I–V curves measured in accumulation (Fig. 3b). The curves appear at lower voltages compared to those in accumulation. The flatband voltage of )0.6 V is mainly responsible for this asymmetry and by plotting the I–V curves with respect to VGate VFB , the asymmetry disappears to a great extend. The lower barrier height of 1.5 eV [8] at the zirconium silicate/silicon interface (compared to the obtained /1 ¼ 1:8 eV) gives also rise to the asymmetry. Further investigation of the conduction mechanism at positive biases shows that it is again Poole–Frenkel emission from traps and the trap level is estimated to be 0.9–1.0 eV below the conduction band edge of the zirconium silicate. These are the same values as in the case with negative biases, and therefore, these results are a straightforward evidence that no thin SiO2 layer is formed at the zirconium silicate/silicon interface during deposition and post-deposition annealing, i.e. the films obtained are thermally stable on silicon. Transmission electron microscopy, where after a RTA no noticeable interfacial layer between the zirconium silicate and the silicon substrate is seen [9], gives further evidence for the assumption of a single layer model. Based on results obtained by I–V measurements, the band diagram of the structure is constructed (Fig. 5) assuming a band offset of silicon to zirconium silicate conduction
A. Paskaleva et al. / Microelectronics Reliability 43 (2003) 1253–1257
band of 1.5 eV [8]. The conduction mechanisms found for different voltage ranges are depicted in the figure, too. The dielectric constant of the films determined by ellipsometry (using a refractive index of 1.9 at a wavelength of 633 nm) and C–V measurements is found to be between 10.5 and 15 depending on precursor material and layer thickness [9].
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Acknowledgements The work was supported by the Deutsche Forschungsgemeinschaft (DFG), priority program 1119. A. Paskaleva would like to acknowledge the financial support of Alexander von Humboldt Foundation.
References 4. Conclusions A novel single-source precursor for the MOCVD of zirconium silicate films was synthesized and stable ZrSix Oy layers were deposited. The dielectric constant of the films was found to be 10.5 to 15. Electrical characterizations of the films show low leakage currents (5 109 A/cm2 at )3 V) and the conduction mechanisms are found to be trap-assisted tunneling in the lower voltage range and Poole–Frenkel conduction at higher gate biases. Two different trap sites located at 1.6 eV and 0.9 to 1.0 eV under the conduction band edge of the zirconium silicate are found to be responsible for trap-assisted tunneling and Poole–Frenkel conduction, respectively. From C–V measurements, a bulk negative charge in order of 5 to 6 1011 cm2 and a small hysteresis (about 50 mV) is found. Both C–V and I–V measurements show instabilities as well as significant negative charge trapping in order of 1.1 to 2 1012 cm2 . The I–V characteristics of the films reveal that no interfacial SiO2 -layer is formed during deposition and annealing of the films. Further optimization of the properties of these films should be aimed at reducing the trapping by appropriate annealing steps and interface engineering.
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