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crystalline silicon heterojunction: Impact of passivation layer thickness
Thin Solid Films 558 (2014) 315–319
Contents lists available at ScienceDirect
Thin Solid Films journal homepage: www.elsevier.com/locate/tsf
Electrical transport mechanisms in amorphous/crystalline silicon heterojunction: Impact of passivation layer thickness Miroslav Mikolášek a,⁎, Michal Nemec a, Marian Vojs a, Ján Jakabovič a, Vlastimil Řeháček a, Dong Zhang b, Miro Zeman b, Ladislav Harmatha a a b
Slovak University of Technology, Faculty of Electrical Engineering and Information Technology, Ilkovičova 3, 812 19 Bratislava, Slovakia Delft University of Technology, ECTM/DIMES, P.O. Box 5053, 2600 GB Delft, The Netherlands
a r t i c l e
i n f o
Article history: Received 11 February 2013 Received in revised form 11 February 2014 Accepted 20 February 2014 Available online 26 February 2014 Keywords: Heterojunction Amorphous silicon Passivation thickness Solar cell Current transport mechanism
a b s t r a c t We investigate the current transport mechanisms in the amorphous silicon/crystalline silicon heterojunction and the change of these processes when an intrinsic amorphous silicon passivation layer with a varying thickness is introduced at the interface. We present analyses of temperature dependent dark current–voltage curves, which allow determining the prevalent current transport path in heterojunction structures. It is shown that the intrinsic passivation layer plays an important role in the current transport in the heterojunction and the thickness of such an interlayer has to be considered when such structures are analyzed. © 2014 Elsevier B.V. All rights reserved.
1. Introduction The opportunity to achieve a high performance and still maintain low fabrication costs makes the heterojunction with intrinsic thin layer solar cells (HIT) attractive for many research groups [1–3]. The physical processes of charge transport through the amorphous silicon/ crystalline silicon (a-Si:H/c-Si) interface, as well as band alignment at the heterojunction have a crucial influence on the solar cell performance. A thin intrinsic layer of amorphous silicon is usually introduced between the doped amorphous and crystalline silicon layers to passivate the interface and hereby to achieve the high performance. Although the industrial fabrication of HIT solar cells is already well established by company Panasonic, fundamental questions concerning the passivation effect of the intrinsic layer and the current paths in the heterojunction still need to be studied in detail. The first work with an attempt to describe the processes at the a-Si: H/c-Si heterojunction dates back to 1975 [4]. Since then, various studies have shown the dominating recombination in the space charge region [5,6] and the neutral part of the semiconductor [7], or the prevalence of tunneling process [8]. The comprehensive study published by Schulze et al. [9] points at a direct link between the dominant current transport mechanism and the output performance of the solar cell. In this study the state-of-the-art solar cells with the interface passivated by an intrinsic amorphous silicon layer exhibited the prevalence of the tunneling ⁎ Corresponding author. E-mail address: [email protected] (M. Mikolášek).
http://dx.doi.org/10.1016/j.tsf.2014.02.068 0040-6090/© 2014 Elsevier B.V. All rights reserved.
transport mechanism in the low voltage region of forward biased current–voltage (I–V) characteristics. While the interface condition clearly affects the current transport, the open question under dispute is the impact of the passivation layer thickness on the current transport mechanism. One of the first investigations of this issue was done by Page et al. [10] for a-Si:H(p)/c-Si(n) heterojunction solar cell structure. For this doping sequence the field drift transport of holes was observed as a dominating current path regardless of the passivation layer thicknesses. However, there is a lack of similar studies for structures with a-Si:H(n)/c-Si(p) doping. The aim of this paper is to study the influence of the intrinsic passivation layer on the transport mechanism in structures with an a-Si:H(n)/c-Si(p) heterojunction. Attention is focused on the impact of the passivation layer thickness on the charge carrier transport. The investigation was provided using the analysis of dark current– voltage curves measured at different temperatures, which has been established as a standard method to determine the dominant physical phenomena of carrier transport. 2. Fabrication and experimental details Analysis of the current transport through the intrinsic passivation layer was conducted on the a-Si:H(n)/c-Si(p) heterojunction structures. Two series of a-Si:H(n)/c-Si(p) samples with 5 nm and 10 nm thick a-Si: H(i) passivation layers and one reference sample without the passivation layer were prepared in the Laboratory of Photovoltaic Materials and Devices, TU Delft in the Netherlands. In the text, the samples are referred as A5, A10 and A0, for structures with 5 nm and 10 nm thick
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M. Mikolášek et al. / Thin Solid Films 558 (2014) 315–319
intrinsic passivation layers and for the structure without passivation layer, respectively. The thickness of the phosphorous doped amorphous silicon layer is 50 nm for all samples. Polished p-type silicon wafers with b111N orientation are used as a substrate. The wafer thickness is 525 μm. The exact resistivity was measured by 4-point probe and has a value of 8 Ω cm, which corresponds to doping concentration 1.6 × 1015 cm− 3 [11]. After deposition of amorphous silicon was further processing and measuring of the samples carried out in the Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology in Bratislava. Top aluminum circle electrodes with a diameter of 500 μm were defined by a “shadow mask” and full area bottom electrodes are evaporated to form a heterojunction diode. To suppress the high lateral leakage current, the samples were patterned by MESA reaction ion etching of a-Si:H (n) and a-Si:H(i) layers. High etching selectivity of the silicon compared to metal (600:1) allowed aluminum gates to be used as a mask. The aim of the study is the comparison of current transport mechanisms in structures with different thicknesses of intrinsic passivation layer. Thus equal MESA processes were conducted for all samples to assure similar conditions regarding the recombination contribution from the exposed flanks across the junction. Current–voltage measurements were conducted in a setup of Keithley 237. Temperature dependent I–V measurements are made in the range 303 to 403 K with a step of 10 K. 3. Results and discussion Various physical phenomena are involved in the current transport through the heterojunction. Usually, one of them predominates and can be specified by monitoring the temperature dependence of current–voltage characteristics. In general, the I–V curve is described using the well-known formula J ¼ J 0 ½ expðAV Þ−1
ð1Þ
where J0 denotes the saturation current density and A represents the temperature dependent exponential factor defined as A = q/nkT, where n is the diode ideality factor. Every mechanism of current transport is characterized by its particular temperature expression of the exponential factor A. If the current has a tunneling nature, parameter A has a weak or no dependence upon the temperature. For the recombination type of current, parameter A changes with temperature. The basic information concerning the source of recombination is obtained by the value
of the diode ideality factor n. Recombination through the states at the interface or in the neutral part of the semiconductor is characterized by a diode ideality factor close to 1 [12]. In the case of recombination in the space charge region, the diode ideality factor is equal to 2 in an ideal case of one recombination level lying at the midgap and with an identical capture cross sections for electrons and holes. Due to a continuous distribution of defect states in amorphous silicon the recombination takes place through various trap levels and the diode ideality factor lies between 1 and 2 [13,5]. The source of recombination can be more clearly identified by analyzing the Arrhenius plot of the saturation current. The temperature dependence of the saturation current is given by −Eac J 0 ≈ exp ; kT
ð2Þ
where T is temperature and k is the Boltzmann constant. Activation energy Eac obtained from such an Arrhenius plot identifies the prevalent current transport process in the structure. Recombination in the neutral part of the semiconductor has Eac equal to the band gap of the semiconductor, in which this recombination takes place. While the recombination in the space charge region is dominated by the states near the midgap, the activation energy of the saturation current has a value close to one half of the semiconductor band gap. Recombination at the a-Si:H(n)/c-Si(p) interface is characterized by an activation energy equal to the effective barrier height [12] c‐Si
φb ¼ qV D þ Ea ;
ð3Þ
where VD is the diffusion voltage in the heterostructure and Eca ‐ Si denotes the energy difference between the bulk Fermi level EF and the valence band level EV of crystalline silicon. The schematic drawn of a-Si:H(n)/c-Si(p) heterojunction with depicted barrier for interface recombination (φb) is shown in Fig. 1. It is important to notice that the overall diffusion voltage in the sample has two components, diffusion voltage distributed in the amorphous silicon V a‐Si:H and in the crystalline D c‐Si silicon V D . For heterojunction with donor doping concentration in the emitter significantly higher compared to acceptor concentration in the crystalline silicon, almost the whole diffusion potential is distributed in the crystalline silicon substrate and with good approximation we c‐Si can write V D ≅V D .
Fig. 1. Band diagram of the a-Si:H(n)/c-Si(p) heterojunction. The parameter φb represents barrier for recombination through the defect states at the interface.
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317
In order to explain the dominant current mechanism an analysis of forward biased current–voltage characteristics of a-Si:H(n)/c-Si(p) samples is carried out. I–V characteristics measured in the temperature range from 303 to 403 K for samples A0, A5 and A10 are depicted in Fig. 2. In the semi-logarithmic scale, all characteristics exhibit one distinct linear region for V b 0.55 V. Similar observations for a-Si:H(n)/ c-Si(p) structures were published by Marsal et al. [5,6] and Jensen et al. [12]. By linear approximation, the exponential factor A and saturation current density J0 are determined and plotted as functions of temperature in Fig. 3 and Fig. 4, respectively. As is shown in the inset of Fig. 3, the diode ideality factor for all samples is below 1.5 in the whole temperature range.
Fig. 3. Exponential factor A as a function of temperature for samples A0, A5 and A10. Slight temperature dependence of factor A indicates the prevalence of tunneling processes for samples A0 and A5. The inset shows the diode ideality factor for all samples.
The slight temperature dependence of parameter A for structures A0 and A5 characterized by slope S close to zero indicates that the tunneling process is dominant. The saturation current linearly decreases upon the T−1, which rules out the presence of one-step and multi-step trap assisted tunneling in the structures. To describe such a temperature dependence, the multitunneling capture–emission process (MTCE) proposed by Matsuura et al. [14] can be applied. The model for the a-Si:H (n)/c-Si(p) structure is expressed by equation E −EV E −E F a−Si:H a−Si:H a−Si:H a−Si:H J 0 ¼ BM σ p vth N V exp − T vth NC exp − C þ σn kT kT
ð4Þ where BM is a constant independent of applied voltage and temperature, σap − Si : H and σan − Si : H are the capture cross sections for holes and electrons, vth is the thermal velocity, NaV − Si : H and NaC − Si : H are the effective density of states in the valence band and the conduction band of a-Si:H, respectively, and EF, ET, EV, and EC indicate the energies of the Fermi level, trapping level, the valence band, and the conduction band of a-Si:H, respectively. The activation energy for samples A0 and A5 is determined from the Arrhenius plot of the saturation current density (Fig. 4) and yields the values of 0.54 eV and 0.65 eV, respectively. Such high values do not represent the doping of n-type amorphous silicon, therefore we can assume the prevalence of the first term in Eq. (4). The activation energy thus describes the energy position of traps which participate in tunneling. For correlation of determined activation energies we have adopted standard density of states (DOS) model of a-Si:
Fig. 2. Current–voltage characteristics for samples (a) A0, (b) A5 and (c) A10 measured in temperature range 303–403 K.
Fig. 4. Saturation current density, J0 as a function of temperature for samples A0, A5 and A10. The slope of linear approximation gives the activation energy.
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Fig. 5. Density of states distribution in the forbidden gap of n-type amorphous silicon with depicted energy position of trap levels, ET, supporting the MTCE tunneling in samples A0 and A5. The shift of the trap level energy for sample A5 is caused by the presence of an intrinsic amorphous silicon layer at the interface having the peaks of the dangling bond distribution shifted towards the midgap.
H(n) with parameters proposed by Zeman et al. [15]. The schematic drawn of model is depicted in Fig. 5. In our assumption, the DOS are uniformly distributed through the whole layer. For n-type amorphous silicon the dangling bond states have position closer to the valence band with the distance between conduction band and peak of Gaussian distribution of the donor-like dangling bond states E C − E +/0 DB = 1.4 eV. The correlation energy between donor-like and acceptor-like dangling bonds states is Ecorr = 0.2 eV. The band gap of amorphous silicon is Eag ‐ Si : H(n) = 1.8 eV. As one can see in Fig. 5, the position of traps determined using our analysis with energy EA0 T − EV = 0.54 eV for samples A0 and energy EA5 T − EV = 0.65 eVfor sample A5 correlates with the peak of the dangling bond states distribution for n-type amorphous silicon. The slight shift of the trap energy for sample A5 can be associated with the presence of the intrinsic amorphous layer at the interface of this structure [15]. While the traps in the intrinsic passivation layer also participate in the MTCE tunneling process, the shift of the trap level energy observed for the sample A5 can be caused by the defect state distribution in the intrinsic amorphous silicon, which has the peak values of defect states closer to the midgap. The stronger temperature behavior of parameter A for sample with a 10 nm thick intrinsic passivation layer indicates an increased influence of recombination. To confirm the presence of recombination it is necessary to take a closer look at the activation energy determined from the temperature dependence of the saturation current and associate it to
Fig. 6. Saturation current density raised to a power of diode ideality factor n as a function of the temperature. The slope of the linear approximation gives the product n.Ea.
one of the possible recombination paths. In the first step, it is desirable to check the presence of recombination through the interface states. While the change in the whole energy during this process is characterized by Eq. (3), we first have to determine the diffusion voltage in the structure. Due to the abrupt change of doping, almost the whole electric potential is distributed over the crystalline silicon part of the junction. The most common method to determine the diffusion voltage is capacitance-voltage measurements. However, as was shown by Gudovskikh et al. [16], this approach is not applicable in the case of aSi:H(n)/c-Si(p) structures due to the presence of the strong inversion layer at the interface, which hinders the evolution of a depletion region in the crystalline part of the heterojunction. The diffusion voltage in our case takes into account the band alignment of the structure. Based on the coplanar conductance technique [17], the value of the conduction band offset for sample A10 was determined as ΔEC = 0.14 eV [18]. Using the equation for the band alignment at the heterojunction derived from Fig. 1 a‐Si:H
ΔEC ¼ Ea
c‐Si
þ Ea
c−Si
þ qV D −Eg
ð5Þ
we have determined the value of the diffusion voltage in the range qVD = 0.73–0.83 eV. In Eq. (5), the activation energy for crystalline silicon with doping concentration 1.6 × 1015 cm−3 is Eca − Si = 0.23 eV and the activation energy of amorphous silicon is set in the range Eaa ‐ Si : H = 0.2–0.3 eV. The height of the effective barrier for the recombination through the states at the interface is thus in the range φb = 0.96–1.06 eV. The significantly lower activation energy of the saturation current, Ea = 0.79 eV, allows ruling out interface recombination through the interface states. However, it is also not possible to associate the activation energy to a recombination process in the neutral region (Ea b Ecg − Si, Eag − Si : H) or space charge region (Ea b Ecg − Si/2, Eag − Si : H/2) of the amorphous or crystalline silicon. This problem could be caused either by the presence of a continuous defect states distribution in the amorphous silicon or by errors in the linear approximation during the analysis. As demonstrated in the work of Schulze et al. [9], the error due to linear approximation can be eliminated by considering the diode ideality factor in the analysis. Based on this approach, we have constructed an Arrhenius plot for sample A10, where the saturation current is raised to a power of n (Fig. 6). In this case, the product n.Ea is almost equal to the value of the crystalline silicon bandgap, therefore the recombination takes place either in the crystalline silicon part of the heterostructure or at the heterointerface. In this case the MTCE process is suppressed and as a dominant carrier transport mechanism was detected the
M. Mikolášek et al. / Thin Solid Films 558 (2014) 315–319
recombination. Despite the fact that this analysis confirms the dominant presence of the recombination, it is not possible to distinguish the exact source of it. Taking into account our analysis, we can make the following assumptions. The analysis of current transport mechanisms in a-Si:H(n)/ c-Si(p) heterostructures passivated by intrinsic amorphous silicon has shown a change with varied passivation thicknesses. Manifestation of the recombination over tunneling in the case of sample A10 can be associated with the presence of the 10 nm thick intrinsic interlayer. We can assume that tunneling in the depletion area of structures occurs with the assistance of traps. The intrinsic amorphous silicon has a density of defect states lower by three orders of magnitude [15], therefore, a significantly lower tunneling probability is assumed for this material. This effect is enhanced upon the increase of the layer thickness, which results in the lower tunneling transparency for the sample with a 10 nm thick a-Si:H(i) layer. The decrease of the tunneling contribution allows us to determine the recombination mechanism as a dominant current process in the case of the sample with a 10 nm thick passivation layer. 4. Conclusion We studied the carrier transport mechanisms in a-Si:H(n)/c-Si(p) heterostructures with different thicknesses of interface passivation layers. By analysis of the current–voltage characteristics at different temperatures the dominant manifestation of the recombination through interface states is ruled out for all samples, which suggests a negligible influence of interface defect states upon the current transport mechanism. The analysis has revealed MTCE tunneling to be the dominant current transport mechanism in structures without the passivation layer and structures with a 5 nm thick passivation layer. A thin intrinsic passivation layer does not change the current path, however, slightly shifts determined energy level of traps causing tunneling. An increase of the passivation layer thickness to 10 nm results in suppression of tunneling due to a lower tunneling transparency of the thicker intrinsic layers. Hence, other components participating in the overall current in the heterostructure, such as recombination, start to play dominant roles. The results prove the important influence of the heterojunction conditions on the current mechanism and emphasize that it is necessary to consider the passivation layer thickness for analysis of I–V curves of a-Si:H(n)/c-Si(p) structures.
319
Acknowledgments The presented work was supported by the Slovak Research and Development Agency (APVV-0509-10) and by the Scientific Grant Agency of the Ministry of Education of the Slovak Republic (VEGA 1/0377/13).
References [1] D. Zhang, A. Tavakoliyaraki, Y. Wu, R.A.C.M.M. van Swaaij, M. Zeman, In: Energy Procedia 8 (2011) 207. [2] L. Korte, E. Conrad, H. Angermann, R. Stangl, M. Schmidt, In: Solar Energy Materials and Solar Cells 93 (6–7) (2009) 905. [3] Q. Wang, In: Philosophical Magazine 89 (28–30) (2009) 2587. [4] W. Fuhs, G. Heder, K. Niemann, and J. Stuke. Properties of junctions between amorphous and crystalline silicon. In: Proceedings of the 6th International Conference on Amorphous and Liquid Semiconductors, Leningrad, USSR, Soviet Academy of Sciences, A.F. Ioffe, pp. 343–347, 1975. [5] L.F. Marsal, J. Pallare, X. Correig, J. Calderer, R. Alcubilla, In: Journal of applied physics 79 (11) (1996) 8493. [6] L. Marsal, J. Pallares, X. Correig, J. Calderer, R. Alcubilla, In: Semiconductor science and technology 11 (1996) 1209. [7] N. Jensen, R.M. Hausner, R.B. Bergmann, J.H. Werner, U. Rau, In: Progress in Photovoltaics: Research and Applications 10 (1) (2002) 1. [8] M. Taguchi, E. Maruyama, M. Tanaka, In: Jpn. J. Appl. Phys. 47 (2008) 814. [9] T. F. Schulze, L. Korte, E. Conrad, M. Schmidt, and B. Rech. Electrical transport mechanisms in a-Si:H/c-Si heterojunction solar cells. In: Journal of Applied Physics, vol. 107, no. 2, pp. 023711, 2010. [10] M.R. Page, et al., In: Thin Solid Films 519 (14) (2011) 4527. [11] R. Kinder, M. Mikolášek, D. Donoval, J. Kováč, M. Tlaczala. Measurement system with hall and a four point probes for characterization of semiconductors. In: Journal of Electrical Engineering. — ISSN 1335–3632. — Vol. 64, No. 2 (2013), s. 106. [12] N. Jensen, et al., In: Journal of Applied Physics 87 (5) (2000) 2639. [13] A. Mittiga, P. Fiorini, M. Falconieri, F. Evangelisti, In: Journal of Applied Physics 66 (6) (1989) 2667. [14] H. Matsuura, T. Okuno, H. Okushi, K. Tanaka, In: Journal of Applied Physics 55 (4) (1984) 1012. [15] R. Schropp, M. Zeman, Modeling, Materials, and Device Technology, Kluwer Academic Publishers, Amorphous and Microcrystalline Silicon Solar Cells, 1998, ISBN 0-7923-8317-6. [16] A. Gudovskikh, et al., In: Thin Solid Films 515 (19) (2007) 7481. [17] J. P. Kleider, A. S. Gudovskikh, and P. Roca i Cabarrocas. Determination of the conduction band offset between hydrogenated amorphous silicon and crystalline silicon from surface inversion layer conductance measurements. In: Applied Physics Letters, vol. 92, no. 16, pp. 162101, 2008. [18] M. Mikolášek. Measurement and simulation of silicon heterostructures for advanced solar applications, Dissertation thesis, 2011, Faculty of Electrical Engineering and Information Technology Slovak University of Technology in Bratislava.
Contents lists available at ScienceDirect
Thin Solid Films journal homepage: www.elsevier.com/locate/tsf
Electrical transport mechanisms in amorphous/crystalline silicon heterojunction: Impact of passivation layer thickness Miroslav Mikolášek a,⁎, Michal Nemec a, Marian Vojs a, Ján Jakabovič a, Vlastimil Řeháček a, Dong Zhang b, Miro Zeman b, Ladislav Harmatha a a b
Slovak University of Technology, Faculty of Electrical Engineering and Information Technology, Ilkovičova 3, 812 19 Bratislava, Slovakia Delft University of Technology, ECTM/DIMES, P.O. Box 5053, 2600 GB Delft, The Netherlands
a r t i c l e
i n f o
Article history: Received 11 February 2013 Received in revised form 11 February 2014 Accepted 20 February 2014 Available online 26 February 2014 Keywords: Heterojunction Amorphous silicon Passivation thickness Solar cell Current transport mechanism
a b s t r a c t We investigate the current transport mechanisms in the amorphous silicon/crystalline silicon heterojunction and the change of these processes when an intrinsic amorphous silicon passivation layer with a varying thickness is introduced at the interface. We present analyses of temperature dependent dark current–voltage curves, which allow determining the prevalent current transport path in heterojunction structures. It is shown that the intrinsic passivation layer plays an important role in the current transport in the heterojunction and the thickness of such an interlayer has to be considered when such structures are analyzed. © 2014 Elsevier B.V. All rights reserved.
1. Introduction The opportunity to achieve a high performance and still maintain low fabrication costs makes the heterojunction with intrinsic thin layer solar cells (HIT) attractive for many research groups [1–3]. The physical processes of charge transport through the amorphous silicon/ crystalline silicon (a-Si:H/c-Si) interface, as well as band alignment at the heterojunction have a crucial influence on the solar cell performance. A thin intrinsic layer of amorphous silicon is usually introduced between the doped amorphous and crystalline silicon layers to passivate the interface and hereby to achieve the high performance. Although the industrial fabrication of HIT solar cells is already well established by company Panasonic, fundamental questions concerning the passivation effect of the intrinsic layer and the current paths in the heterojunction still need to be studied in detail. The first work with an attempt to describe the processes at the a-Si: H/c-Si heterojunction dates back to 1975 [4]. Since then, various studies have shown the dominating recombination in the space charge region [5,6] and the neutral part of the semiconductor [7], or the prevalence of tunneling process [8]. The comprehensive study published by Schulze et al. [9] points at a direct link between the dominant current transport mechanism and the output performance of the solar cell. In this study the state-of-the-art solar cells with the interface passivated by an intrinsic amorphous silicon layer exhibited the prevalence of the tunneling ⁎ Corresponding author. E-mail address: [email protected] (M. Mikolášek).
http://dx.doi.org/10.1016/j.tsf.2014.02.068 0040-6090/© 2014 Elsevier B.V. All rights reserved.
transport mechanism in the low voltage region of forward biased current–voltage (I–V) characteristics. While the interface condition clearly affects the current transport, the open question under dispute is the impact of the passivation layer thickness on the current transport mechanism. One of the first investigations of this issue was done by Page et al. [10] for a-Si:H(p)/c-Si(n) heterojunction solar cell structure. For this doping sequence the field drift transport of holes was observed as a dominating current path regardless of the passivation layer thicknesses. However, there is a lack of similar studies for structures with a-Si:H(n)/c-Si(p) doping. The aim of this paper is to study the influence of the intrinsic passivation layer on the transport mechanism in structures with an a-Si:H(n)/c-Si(p) heterojunction. Attention is focused on the impact of the passivation layer thickness on the charge carrier transport. The investigation was provided using the analysis of dark current– voltage curves measured at different temperatures, which has been established as a standard method to determine the dominant physical phenomena of carrier transport. 2. Fabrication and experimental details Analysis of the current transport through the intrinsic passivation layer was conducted on the a-Si:H(n)/c-Si(p) heterojunction structures. Two series of a-Si:H(n)/c-Si(p) samples with 5 nm and 10 nm thick a-Si: H(i) passivation layers and one reference sample without the passivation layer were prepared in the Laboratory of Photovoltaic Materials and Devices, TU Delft in the Netherlands. In the text, the samples are referred as A5, A10 and A0, for structures with 5 nm and 10 nm thick
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intrinsic passivation layers and for the structure without passivation layer, respectively. The thickness of the phosphorous doped amorphous silicon layer is 50 nm for all samples. Polished p-type silicon wafers with b111N orientation are used as a substrate. The wafer thickness is 525 μm. The exact resistivity was measured by 4-point probe and has a value of 8 Ω cm, which corresponds to doping concentration 1.6 × 1015 cm− 3 [11]. After deposition of amorphous silicon was further processing and measuring of the samples carried out in the Institute of Electronics and Photonics, Faculty of Electrical Engineering and Information Technology, Slovak University of Technology in Bratislava. Top aluminum circle electrodes with a diameter of 500 μm were defined by a “shadow mask” and full area bottom electrodes are evaporated to form a heterojunction diode. To suppress the high lateral leakage current, the samples were patterned by MESA reaction ion etching of a-Si:H (n) and a-Si:H(i) layers. High etching selectivity of the silicon compared to metal (600:1) allowed aluminum gates to be used as a mask. The aim of the study is the comparison of current transport mechanisms in structures with different thicknesses of intrinsic passivation layer. Thus equal MESA processes were conducted for all samples to assure similar conditions regarding the recombination contribution from the exposed flanks across the junction. Current–voltage measurements were conducted in a setup of Keithley 237. Temperature dependent I–V measurements are made in the range 303 to 403 K with a step of 10 K. 3. Results and discussion Various physical phenomena are involved in the current transport through the heterojunction. Usually, one of them predominates and can be specified by monitoring the temperature dependence of current–voltage characteristics. In general, the I–V curve is described using the well-known formula J ¼ J 0 ½ expðAV Þ−1
ð1Þ
where J0 denotes the saturation current density and A represents the temperature dependent exponential factor defined as A = q/nkT, where n is the diode ideality factor. Every mechanism of current transport is characterized by its particular temperature expression of the exponential factor A. If the current has a tunneling nature, parameter A has a weak or no dependence upon the temperature. For the recombination type of current, parameter A changes with temperature. The basic information concerning the source of recombination is obtained by the value
of the diode ideality factor n. Recombination through the states at the interface or in the neutral part of the semiconductor is characterized by a diode ideality factor close to 1 [12]. In the case of recombination in the space charge region, the diode ideality factor is equal to 2 in an ideal case of one recombination level lying at the midgap and with an identical capture cross sections for electrons and holes. Due to a continuous distribution of defect states in amorphous silicon the recombination takes place through various trap levels and the diode ideality factor lies between 1 and 2 [13,5]. The source of recombination can be more clearly identified by analyzing the Arrhenius plot of the saturation current. The temperature dependence of the saturation current is given by −Eac J 0 ≈ exp ; kT
ð2Þ
where T is temperature and k is the Boltzmann constant. Activation energy Eac obtained from such an Arrhenius plot identifies the prevalent current transport process in the structure. Recombination in the neutral part of the semiconductor has Eac equal to the band gap of the semiconductor, in which this recombination takes place. While the recombination in the space charge region is dominated by the states near the midgap, the activation energy of the saturation current has a value close to one half of the semiconductor band gap. Recombination at the a-Si:H(n)/c-Si(p) interface is characterized by an activation energy equal to the effective barrier height [12] c‐Si
φb ¼ qV D þ Ea ;
ð3Þ
where VD is the diffusion voltage in the heterostructure and Eca ‐ Si denotes the energy difference between the bulk Fermi level EF and the valence band level EV of crystalline silicon. The schematic drawn of a-Si:H(n)/c-Si(p) heterojunction with depicted barrier for interface recombination (φb) is shown in Fig. 1. It is important to notice that the overall diffusion voltage in the sample has two components, diffusion voltage distributed in the amorphous silicon V a‐Si:H and in the crystalline D c‐Si silicon V D . For heterojunction with donor doping concentration in the emitter significantly higher compared to acceptor concentration in the crystalline silicon, almost the whole diffusion potential is distributed in the crystalline silicon substrate and with good approximation we c‐Si can write V D ≅V D .
Fig. 1. Band diagram of the a-Si:H(n)/c-Si(p) heterojunction. The parameter φb represents barrier for recombination through the defect states at the interface.
M. Mikolášek et al. / Thin Solid Films 558 (2014) 315–319
317
In order to explain the dominant current mechanism an analysis of forward biased current–voltage characteristics of a-Si:H(n)/c-Si(p) samples is carried out. I–V characteristics measured in the temperature range from 303 to 403 K for samples A0, A5 and A10 are depicted in Fig. 2. In the semi-logarithmic scale, all characteristics exhibit one distinct linear region for V b 0.55 V. Similar observations for a-Si:H(n)/ c-Si(p) structures were published by Marsal et al. [5,6] and Jensen et al. [12]. By linear approximation, the exponential factor A and saturation current density J0 are determined and plotted as functions of temperature in Fig. 3 and Fig. 4, respectively. As is shown in the inset of Fig. 3, the diode ideality factor for all samples is below 1.5 in the whole temperature range.
Fig. 3. Exponential factor A as a function of temperature for samples A0, A5 and A10. Slight temperature dependence of factor A indicates the prevalence of tunneling processes for samples A0 and A5. The inset shows the diode ideality factor for all samples.
The slight temperature dependence of parameter A for structures A0 and A5 characterized by slope S close to zero indicates that the tunneling process is dominant. The saturation current linearly decreases upon the T−1, which rules out the presence of one-step and multi-step trap assisted tunneling in the structures. To describe such a temperature dependence, the multitunneling capture–emission process (MTCE) proposed by Matsuura et al. [14] can be applied. The model for the a-Si:H (n)/c-Si(p) structure is expressed by equation E −EV E −E F a−Si:H a−Si:H a−Si:H a−Si:H J 0 ¼ BM σ p vth N V exp − T vth NC exp − C þ σn kT kT
ð4Þ where BM is a constant independent of applied voltage and temperature, σap − Si : H and σan − Si : H are the capture cross sections for holes and electrons, vth is the thermal velocity, NaV − Si : H and NaC − Si : H are the effective density of states in the valence band and the conduction band of a-Si:H, respectively, and EF, ET, EV, and EC indicate the energies of the Fermi level, trapping level, the valence band, and the conduction band of a-Si:H, respectively. The activation energy for samples A0 and A5 is determined from the Arrhenius plot of the saturation current density (Fig. 4) and yields the values of 0.54 eV and 0.65 eV, respectively. Such high values do not represent the doping of n-type amorphous silicon, therefore we can assume the prevalence of the first term in Eq. (4). The activation energy thus describes the energy position of traps which participate in tunneling. For correlation of determined activation energies we have adopted standard density of states (DOS) model of a-Si:
Fig. 2. Current–voltage characteristics for samples (a) A0, (b) A5 and (c) A10 measured in temperature range 303–403 K.
Fig. 4. Saturation current density, J0 as a function of temperature for samples A0, A5 and A10. The slope of linear approximation gives the activation energy.
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Fig. 5. Density of states distribution in the forbidden gap of n-type amorphous silicon with depicted energy position of trap levels, ET, supporting the MTCE tunneling in samples A0 and A5. The shift of the trap level energy for sample A5 is caused by the presence of an intrinsic amorphous silicon layer at the interface having the peaks of the dangling bond distribution shifted towards the midgap.
H(n) with parameters proposed by Zeman et al. [15]. The schematic drawn of model is depicted in Fig. 5. In our assumption, the DOS are uniformly distributed through the whole layer. For n-type amorphous silicon the dangling bond states have position closer to the valence band with the distance between conduction band and peak of Gaussian distribution of the donor-like dangling bond states E C − E +/0 DB = 1.4 eV. The correlation energy between donor-like and acceptor-like dangling bonds states is Ecorr = 0.2 eV. The band gap of amorphous silicon is Eag ‐ Si : H(n) = 1.8 eV. As one can see in Fig. 5, the position of traps determined using our analysis with energy EA0 T − EV = 0.54 eV for samples A0 and energy EA5 T − EV = 0.65 eVfor sample A5 correlates with the peak of the dangling bond states distribution for n-type amorphous silicon. The slight shift of the trap energy for sample A5 can be associated with the presence of the intrinsic amorphous layer at the interface of this structure [15]. While the traps in the intrinsic passivation layer also participate in the MTCE tunneling process, the shift of the trap level energy observed for the sample A5 can be caused by the defect state distribution in the intrinsic amorphous silicon, which has the peak values of defect states closer to the midgap. The stronger temperature behavior of parameter A for sample with a 10 nm thick intrinsic passivation layer indicates an increased influence of recombination. To confirm the presence of recombination it is necessary to take a closer look at the activation energy determined from the temperature dependence of the saturation current and associate it to
Fig. 6. Saturation current density raised to a power of diode ideality factor n as a function of the temperature. The slope of the linear approximation gives the product n.Ea.
one of the possible recombination paths. In the first step, it is desirable to check the presence of recombination through the interface states. While the change in the whole energy during this process is characterized by Eq. (3), we first have to determine the diffusion voltage in the structure. Due to the abrupt change of doping, almost the whole electric potential is distributed over the crystalline silicon part of the junction. The most common method to determine the diffusion voltage is capacitance-voltage measurements. However, as was shown by Gudovskikh et al. [16], this approach is not applicable in the case of aSi:H(n)/c-Si(p) structures due to the presence of the strong inversion layer at the interface, which hinders the evolution of a depletion region in the crystalline part of the heterojunction. The diffusion voltage in our case takes into account the band alignment of the structure. Based on the coplanar conductance technique [17], the value of the conduction band offset for sample A10 was determined as ΔEC = 0.14 eV [18]. Using the equation for the band alignment at the heterojunction derived from Fig. 1 a‐Si:H
ΔEC ¼ Ea
c‐Si
þ Ea
c−Si
þ qV D −Eg
ð5Þ
we have determined the value of the diffusion voltage in the range qVD = 0.73–0.83 eV. In Eq. (5), the activation energy for crystalline silicon with doping concentration 1.6 × 1015 cm−3 is Eca − Si = 0.23 eV and the activation energy of amorphous silicon is set in the range Eaa ‐ Si : H = 0.2–0.3 eV. The height of the effective barrier for the recombination through the states at the interface is thus in the range φb = 0.96–1.06 eV. The significantly lower activation energy of the saturation current, Ea = 0.79 eV, allows ruling out interface recombination through the interface states. However, it is also not possible to associate the activation energy to a recombination process in the neutral region (Ea b Ecg − Si, Eag − Si : H) or space charge region (Ea b Ecg − Si/2, Eag − Si : H/2) of the amorphous or crystalline silicon. This problem could be caused either by the presence of a continuous defect states distribution in the amorphous silicon or by errors in the linear approximation during the analysis. As demonstrated in the work of Schulze et al. [9], the error due to linear approximation can be eliminated by considering the diode ideality factor in the analysis. Based on this approach, we have constructed an Arrhenius plot for sample A10, where the saturation current is raised to a power of n (Fig. 6). In this case, the product n.Ea is almost equal to the value of the crystalline silicon bandgap, therefore the recombination takes place either in the crystalline silicon part of the heterostructure or at the heterointerface. In this case the MTCE process is suppressed and as a dominant carrier transport mechanism was detected the
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recombination. Despite the fact that this analysis confirms the dominant presence of the recombination, it is not possible to distinguish the exact source of it. Taking into account our analysis, we can make the following assumptions. The analysis of current transport mechanisms in a-Si:H(n)/ c-Si(p) heterostructures passivated by intrinsic amorphous silicon has shown a change with varied passivation thicknesses. Manifestation of the recombination over tunneling in the case of sample A10 can be associated with the presence of the 10 nm thick intrinsic interlayer. We can assume that tunneling in the depletion area of structures occurs with the assistance of traps. The intrinsic amorphous silicon has a density of defect states lower by three orders of magnitude [15], therefore, a significantly lower tunneling probability is assumed for this material. This effect is enhanced upon the increase of the layer thickness, which results in the lower tunneling transparency for the sample with a 10 nm thick a-Si:H(i) layer. The decrease of the tunneling contribution allows us to determine the recombination mechanism as a dominant current process in the case of the sample with a 10 nm thick passivation layer. 4. Conclusion We studied the carrier transport mechanisms in a-Si:H(n)/c-Si(p) heterostructures with different thicknesses of interface passivation layers. By analysis of the current–voltage characteristics at different temperatures the dominant manifestation of the recombination through interface states is ruled out for all samples, which suggests a negligible influence of interface defect states upon the current transport mechanism. The analysis has revealed MTCE tunneling to be the dominant current transport mechanism in structures without the passivation layer and structures with a 5 nm thick passivation layer. A thin intrinsic passivation layer does not change the current path, however, slightly shifts determined energy level of traps causing tunneling. An increase of the passivation layer thickness to 10 nm results in suppression of tunneling due to a lower tunneling transparency of the thicker intrinsic layers. Hence, other components participating in the overall current in the heterostructure, such as recombination, start to play dominant roles. The results prove the important influence of the heterojunction conditions on the current mechanism and emphasize that it is necessary to consider the passivation layer thickness for analysis of I–V curves of a-Si:H(n)/c-Si(p) structures.
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Acknowledgments The presented work was supported by the Slovak Research and Development Agency (APVV-0509-10) and by the Scientific Grant Agency of the Ministry of Education of the Slovak Republic (VEGA 1/0377/13).
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