Materials Science and Engineering B 176 (2011) 301–304
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Electronic properties of BaTiO3 /4H-SiC interface M. Sochacki a,∗ , P. Firek a , N. Kwietniewski a , J. Szmidt a , W. Rzodkiewicz b a b
Institute of Microelectronics and Optoelectronics, Warsaw University of Technology, Koszykowa 75, 00-662 Warsaw, Poland Institute of Electron Technology, Al. Lotnikow 32/46, 02-668 Warsaw, Poland
a r t i c l e
i n f o
Article history: Received 1 October 2009 Received in revised form 25 August 2010 Accepted 26 August 2010 Keywords: Silicon carbide Barium titanate Electrical measurements Electron states
a b s t r a c t The possibility of barium titanate (BaTiO3 ) application in silicon carbide (SiC) technology has been elaborated in terms of the dielectric film quality and properties of the BaTiO3 /4H-SiC interface. High resistivity, high-k thin films containing La2 O3 admixture were applied as gate insulator of metalinsulator-semiconductor (MIS) structure. The thin films were deposited by means of radio frequency plasma sputtering (RF PS) of sintered BaTiO3 + La2 O3 (2 wt.%) target on 8◦ off-axis 4H-SiC (0001) epitaxial layers doped with nitrogen. The results of current-voltage and capacitance-voltage measurements are presented for MIS capacitors. © 2010 Elsevier B.V. All rights reserved.
1. Introduction The ability of silicon carbide to form thermal silicon dioxide (SiO2 ) layers in high temperature oxidation process has been considered as a perfect method of experience transfer from silicon technology to silicon carbide industry. It appears that the full potential of silicon carbide MIS devices is still restrained by unsatisfying quality of interface in thermal SiO2 –SiC system which has been studied for more than 10 years. Neither the oxidation process modifications (e.g. dry [1] or wet [2] oxidation, N2 O [3] or NO [4] oxidation, NH3 pretreatment [5], reoxidation [6], annealing in different gases [7], chlorine [8] or sodium [9] addition) nor substrates quality improvement has solved a high interface state density and reliability problems yet. The carriers are trapped and scattered by the interface defects. As a consequence of these phenomena the channel mobility and the output current capability of inversion mode SiC MOSFETs is still far from the theoretical one [10]. Additionally, the reliability of silicon dioxide layers decreases rapidly at elevated temperature and premature breakdown often occurs around 250 ◦ C. An alternative high-k dielectric layers on SiC substrates have been extensively investigated for use in the field of silicon carbide MIS devices as a replacement of thermal SiO2 gate films [11–13]. In this work, BaTiO3 films were chosen for characterization and properties of BaTiO3 /4H-SiC interface have been studied. Heartened by the most promising properties observed during silicon MISFETs characterization with barium titanate thin film as a gate insulator [14], we decided to investigate the interface between
∗ Corresponding author. E-mail address: msochack@filuts.waw.pl (M. Sochacki). 0921-5107/$ – see front matter © 2010 Elsevier B.V. All rights reserved. doi:10.1016/j.mseb.2010.08.012
4H-SiC and BaTiO3 . The substantial improvement was expected due to higher dielectric constant comparing to the one for silicon dioxide. 2. Experimental details MIS capacitors were fabricated on Si-faced n-type epitaxial layers grown on highly doped 8◦ -off 4H-SiC commercial wafers supplied by SiCrystal. Nitrogen concentration in n-type epilayers was 1 × 1016 cm−3 . The wafers were cleaned using the conventional RCA method followed in 3-min dip in buffered HF. The samples were sequentially boiled in organic solvents (trichloroethylene, acetone, isopropanole) and then dipped in hot solution of NH4 OH:H2 O2 :H2 O (1:1:5) for 10 min and etched in hot HCl:H2 O2 :H2 O (1:1:5) for 10 min. Finally, the samples were dipped in buffered HF for 3 min and rinsed in deionized water. Then, the barium titanate films were deposited by means of radio frequency plasma sputtering (RF PS) of sintered BaTiO3 + La2 O3 (2 wt.%) target. The schematic diagram of the RF PS setup was presented in our previous work [14]. All films were obtained at argon flow rate of 10 sccm. The film thickness was determined by spectroscopic ellipsometry (HORIBA Jobin Yvon UVISEL) and verified on etched pattern by profilometry (VEECO DekTak 150). 200 nm-thick nickel film was sputtered and annealed at 960 ◦ C in argon to reduce the specific resistance of backside ohmic contact to highly doped wafer by creation of silicon silicides at the metal-semiconductor interface. Then 30 nm-thick nickel film was sputtered and patterned as the circle gate electrode of MIS capacitor with a diameter of 200 m. As-deposited MIS capacitors were electrically characterized at probe station integrated with Keithley SMU 236/237/238 and Hewlett-Packard 4061A semiconductor
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Table 1 Parameters of deposition process, layer thickness and extracted values of traps density and effective charge. Sample
Auto-biasing (V)
Process time (min)
Substrate-to-target distance (mm)
Layer thickness (nm)
Traps density Dit (eV−1 cm−2 )
Effective charge Qeff (cm−2 )
A B C D
210 V 280 V 220 V 220 V
30 20 27 45
20 20 30 30
45.5 55.5 30.0 51.8
8.5 × 1011 6.5 × 1011 1.5 × 1012 1.0 × 1012
1 × 1012 1–2 × 1011 1 × 1012 1 × 1012
device analyzer for current-voltage (I-V) and capacitance-voltage (C-V) measurements, respectively. 3. Results and discussion The thin films which were deposited in an extremely different conditions (Table 1) has been evaluated for material morphology improvement. The thickness values obtained by variable angle spectroscopic ellipsometry and profilometry measurements are fitted to each other. The average surface roughness (Ra ) extracted from atomic force microscopy (AFM) images is much below 1 nm in the area of 1 m × 1 m. The low roughness and high thickness homogeneity are the evidence of nanocrystalline morphology. The reliable thickness value was exploited for calculation of dielectric constant based on high frequency (1 MHz) HF C-V measurements and taking into account the maximum capacitance of MIS structure in accumulation state given by the following relationship [15]: Cacc = A
εi ti
(1)
where A is the gate contact area, i –electric permittivity of dielectric film while ti – film thickness. Fig. 1 shows typical HF C-V curve swept in both directions. The capacitance in the accumulation mode was calculated using two-point method and the following equation [16]: Cacc =
C + C 1 2 +
2
+
C + C 1 2 2
kT C2 − C1 q U2 − U1
2
kT C2 − C1 + q U2 − U1
effect is weakened and dielectric constant is much lower comparing to the bulk one [17]. The doping level was calculated by iterative method and the results were compared to graphical estimation from C−2 −U characteristics. The donor concentration can be denoted as [15]: ND = 4Cs2min
1 A
Cs min =
1 1
Cinv
−
(4)
1 Cacc
and ϕF – semiconductor Fermi level, εs – semiconductor dielectric constant, Cinv – capacitance in inversion mode. The Fermi level is a function of donor concentration given by [15]: ϕF =
kT ln q
N D
(5)
ni
where ni is intrinsic carrier concentration. The donor concentration was also graphically estimated using the slope of the following curve [18]: 2 ıC −2 = ıU qA2 εs ND
(6)
The extracted doping level of 1 × 1016 cm−3 confirmed the accuracy of film thickness and dielectric constant estimation. Then, the flat-band voltage was determined by the flat-band capacitance calculation using the relationship given by [15]:
(2)
where k is Boltzman constant, T–absolute temperature while q–elementary charge. The average dielectric constant of 9.37 is significantly lower than value for thick layers or bulk material. In the case of thin film, there appears the problem with uniform composition, the piezoelectric
(3)
where Csmin is given by:
CFB = A − C1 C2
ϕF qεs
where
CsFB Ci CsFB + Ci
CsFB =
(7)
q2 εs ND kT
(8)
and Ci =
εi . ti
(9)
The results of the CFB calculations were compared to the results obtained by graphical estimation once again. The flat-band voltage can be achieved by extrapolation of the following curve:
C 2 i
C
Fig. 1. High-frequency (1MHz) capacitance-voltage (HF C-V) curves in both sweep directions.
−1=
2Ci2 (U 2 A qεs NA
− UFB )
(10)
Both applied methods gave the convergent results. Low flatband voltage value of UFB = +0.55 V indicates low charge density in dielectric film. This feature was verified by deposition of thinner film at the same growth conditions and shorter growth time. The leakage current of the thinner film was significantly higher but the flat-band voltage stayed at the same level. The voltage hysteresis of 0.1 V was recorded at room temperature by switching between accumulation and inversion mode with bias voltage swept of 0.3 V/s, indicating little slow traps in the film. An ideal HF C-V curve was constructed in order to use the Terman method for interface state density (Dit ) calculation of shallow traps with relatively short time constant. Terman’s analysis [19] at
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The typical measured current-voltage (I-V) characteristic was recalculated and plotted as current density-electric field (J-E) one on semi-logarithmic scale (Fig. 2). The leakage currents are extremely low up to electric field of 2 MV/cm. The linear J-E dependence on a linear scale for low electric field and on a semilogarithmic scale for high electric field is an evident consequence of ion conductivity in the studied dielectric films. The average breakdown electric field of 5 MV/cm is achievable recurrently but soft breakdown mechanism dominates. The oxygen vacancies reported widely for barium titanate films and grain boundaries are highly probable causes of the ion conductivity [28]. 4. Conclusions
Fig. 2. Current density – electric field (J-E) characteristic measured in accumulation state.
room temperature has been widely applied as fast first-order estimation of interface state density [20]. The method can be sensitive on errors due to nonequilibrium effects in the wide bandgap semiconductor occurring during CV measurements [21–23]. The results of the calculations can be used only for a rough estimative of electrical properties. Deep-level states cannot be measured at room temperature at all because every reasonable dc bias sweep rate is still too high comparing to the deep states time constant. Accurate response can be obtained only over narrow portion of the bandgap what is enough for first-order estimation and comparative studies. MIS structure has been exposed to UV light emitting diodes array (255 nm) for at least 1 min before voltage sweep to minimize the depletion state influence on extracted parameters. The dc bias was held in the inversion mode to generate the minority carriers and achieve close equilibrium conditions. The shape of the HF C-V characteristics was smooth and the interface state ledge was not observed for the measured sample. The relatively short constant time of states can be concluded within the bandgap energy range which can be analyzed by Terman method at room temperature. The density of fast surface states with a time constant much longer than the period of the applied ac signal can be only calculated what is typical for every ac signal excitation method. A part of the near interface traps cannot response 1 MHz ac signal. The more precise methods such as low-frequency conductance techniques at elevated temperature would be more efficient way of traps density investigation within wide portion of energy bandgap for detailed studies [24–26]. The lowest value of 6.5 × 1011 eV−1 cm−2 was determined for sample B. The dispersion of the state density between 6.5 × 1011 eV−1 cm−2 and 1.5 × 1012 eV−1 cm−2 was noticed. The defects formation detailed mechanisms have to be clarified by surface analysis. Finally, the fixed effective charge density (Qeff ) was estimated from the following equation [27]: Qeff =
εi (ϕMS − UFB ) ti
(11)
where [15] ϕMS = ϕm −
Eg − − ϕF q 2q
(12)
and ϕm – gate contact work function, – semiconductor electron affinity, Eg – semiconductor bandgap. The calculated low flat-band voltage value reduces the effective charge density up to 1–2 × 1011 cm−2 . Current efforts are devoted to avoid the fixed charges in the growing film.
The electrical properties of the interface between BaTiO3 and 4H-SiC surface have been studied. It was shown that barium titanate films characterized by low value of fixed charge density and good thickness control have been deposited successfully with high reproducibility on 4H-SiC substrates by radio frequency plasma sputtering method. The hysteresis loop of HF C-V characteristics is not wider than 0.1 V. However, the dielectric-semiconductor interface quality is not satisfying even though numerous procedures of surface cleaning and preparation have been applied. A large average density of electrically active defects located at the interface with values of up to 1.5 × 1012 eV−1 cm−2 has been extracted. The lowest values of around 6–7 × 1011 eV−1 cm−2 was achieved. In opposite to dielectric charge the value of interface states density is not stable and changed from one process to another. It seems that a buffer layer is a necessary condition to avoid high density of interface states. The most important advantages of thin BaTiO3 films are low dielectric charge and dielectric constant of 10 or even higher. The ion conductivity is dominating the conduction mechanism. An important question is how the leakage current can be limited, breakdown electric field increased and interface properties improved. If this film imperfection is due to oxygen vacancies it could be of advantage to anneal the films in oxygen ambient [29]. This possibility will be taken into account in future experiments. Acknowledgements This work is financially supported by Polish Ministry of Science and Higher Education (GrantNo. 1/0-PBZ-MEiN-6/2/2006). References [1] A. Gavrikov, A. Knizhnik, A. Safonov, A. Scharbinin, A. Bagaturiants, B. Potapkin, A. Chatterjee, K. Matocha, Journal of Applied Physics 104 (2008) 093508. [2] Y. Hijikata, H. Yaguchi, S. Yoshida, Y. Takata, K. Kobayashi, H. Nohira, T. Hattori, Journal of Applied Physics 100 (2006) 053710. [3] P.T. Lai, J.P. Xu, C.L. Chan, IEEE Electron Device Letters 23 (2002) 410–412. [4] P. Jamet, S. Dimitrijev, P. Tanner, Journal of Applied Physics 90 (2001) 5058–5063. [5] J.P. Xu, P.T. Lai, C.L. Chan, Y.C. Cheng, Applied Physics Letters 76 (2000) 372–374. [6] V.V. Afanas’ev, A. Stesmans, F. Ciobanu, G. Pensl, K.Y. Cheong, S. Dimitrijev, Applied Physics Letters 82 (2003) 568–570. [7] K. Fukuda, W.J. Cho, K. Arai, S. Suzuki, J. Senzaki, T. Tanaka, Applied Physics Letters 77 (2000) 866–868. [8] B.L. Yang, L.M. Lin, H.B. Lo, P.T. Lai, Solid-State Electronics 49 (2005) 1223–1227. [9] A. Chatterjee, K. Matocha, Materials Science Forum 615–617 (2009) 493–496. [10] E. Takashi, E. Okuno, T. Sakakibara, S. Onda, Materials Science Forum 600–603 (2008) 691–694. [11] C.A. Correa, G.G. Marmitt, N.M. Bom, A.T. da Rosa, F.C. Stadile, C. Radtke, G.V. Soares, J.R. Baumvol, C. Krug, A.L. Gobbi, Applied Physics Letters 95 (2009) 051916. [12] M.W. Wolborski, M. Rooth, M. Bakowski, A. Hallen, Journal of Applied Physics 101 (2007) 124105. [13] T. Hosoi, M. Harada, Y. Kagei, Y. Watanabe, T. Shimura, S. Mitani, Y. Nakano, T. Nakamura, H. Watanabe, Materials Science Forum 615–617 (2009) 541–544. [14] P. Firek, A. Werbowy, J. Szmidt, Materials Science and Engineering B (2009), doi:10.1016/j.mseb.2009.02.018. [15] S.M. Sze, K. Ng, Physics of Semiconductor Devices, Wiley Interscience, 2007. [16] B. Majkusiak, A. Jakubowski, Solid-State Electronics 35 (1992) 223–224.
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