- Email: [email protected]
Electrostatic discharge failure analysis of capacitive RF MEMS switches
Microelectronics Reliability 47 (2007) 1818–1822 www.elsevier.com/locate/microrel
Electrostatic discharge failure analysis of capacitive RF MEMS switches J. Ruan
a,b,*
, N. Nolhier a
a,b
, M. Bafleur a, L. Bary a, F. Coccetti a, T. Lisec c, R. Plana
a,b
LAAS-CNRS, University of Toulouse, 7 Avenue du Colonel Roche, Cedex 4, 31077 Toulouse, France b University Paul Sabatier, 118 Route de Narbonne, Cedex 9, 31062 Toulouse, France c ISIT-FHG, Fraunhoferstraße 1, Itzehoe, Germany Received 7 July 2007 Available online 4 September 2007
Abstract This paper reports on the investigation of failure mechanisms of aluminum nitride (AlN)-based capacitive RF MEMS switches. Electrostatic discharge (ESD) experiments have been carried out by means of a transmission line pulsing (TLP) technique and a first experiment under human body model (HBM) stresses has been done. It has been observed that TLP stresses gives rise to electric arcs and the degradations have been analyzed and are reported in this paper. Microwave measurements have shown that TLP stresses impact the quality of the capacitive contact. HBM robustness in upstate configuration and its different failure modes have been also reported. Ó 2007 Elsevier Ltd. All rights reserved.
1. Introduction RF MEMS have demonstrated very attractive characteristics in terms of low insertion and return losses, low power consumption, high isolation and a wide operative frequency range. Furthermore they offer a great potential for integration and miniaturization into innovative RF architectures featuring advanced functionalities [1]. Nevertheless, the fact that MEMS combine electrical and mechanical behaviour introduces new classes of reliability issues. Nowadays, there is a lack of data concerning the reliability behaviour of these devices and a lot of efforts are spent worldwide, to understand and to solve the issues [1–4] in order to pave the way of their industrialization. It is understood that RF MEMS devices will be largely used into mainstream architecture and this has motivated the investigation of their sensitivity with respect to ESD stresses. To date there is only one paper dealing with this issue [2] and we believe that more efforts are needed in order to better understand the physic of failure related to ESD stres-
* Corresponding author. Address: LAAS-CNRS, University of Toulouse, 7 Avenue du Colonel Roche, Cedex 4, 31077 Toulouse, France. Tel.: +33 (0) 5 61 33 68 28; fax: +33 (0) 5 61 33 69 69. E-mail address: [email protected] (J. Ruan).
0026-2714/$ - see front matter Ó 2007 Elsevier Ltd. All rights reserved. doi:10.1016/j.microrel.2007.07.070
ses. This paper is devoted to failure analysis of AlN based capacitive RF MEMS under ESD stresses. The investigations are first conducted through a 100 ns transmission line pulsing (TLP) technique followed by a human body model (HBM) test (Wafer Level HBM Tester [3]). The device functionalities are monitored through microscope visualization and current–voltage (I–V) curves. Scattering parameter (S21) measurements versus actuation voltage have been performed, before and after the TLP stress procedure, using an in-house test set [4] used for dielectric charging and electromechanical behaviour investigations. 2. Device description Fig. 1 presents the topology of the AlN-based microwave capacitive micro-switches we used for the experiments. They have been designed in LAAS [5] and fabricated by ISIT-FHG within a multi project wafer run. The membrane is 0.9 lm thick and consists of a stack of Au/Ni/Au layers. The coplanar waveguide (CPW) line below the membrane is made of Ta/Pt/Au/Pt multi-layer. Under the bridge the signal line is covered by 300 nm of AlN dielectric layer which dielectric constant is 9.8. The total dielectric thickness of the actuation electrodes is 600 nm composed by 300 nm AlN and 300 nm Si3N4,
J. Ruan et al. / Microelectronics Reliability 47 (2007) 1818–1822
Fig. 1. Topology of the AlN-based capacitive RF-MEMS switches: (a) top view of the device under test and (b) cross-section view.
1819
Fig. 2. Measured performances of the device in both: (a) upstate and (b) downstate configurations.
3.1. TLP stresses whose interconnections consist of 3 lm thick electroplated Au. Without electrostatic force, the mechanical beam over the dielectric layer of the signal line features 2.4 lm heights. Fig. 2 presents the measured performances of the capacitive MEMS bridge in its two states, showing at 15 GHz an isolation greater than 20 dB but high insertion loss of 1 dB. From the point of view of performances at low GHz frequencies, the use of high constant k dielectric material seems to be more attractive for RF MEMS. However the drawback of high k materials is the high field strength in the case of thin dielectric layer [6]. The calculated capacitance ratio of these switches is about 83, whereas the measured one is about 75. The difference is probably due to the roughness affective of the actual capacitance value. This high ratio can be explained by the wide active area of the device.
The configuration considered in the following corresponds probably to the most common case where the device will suffer from a catastrophic failure due to ESD within a microwave system (i.e., the TLP pulses were applied between the signal line and the ground with the membrane in the up position (see the top righthand corner in Fig. 3.)). TLP stresses with voltage magnitude ranging from 260 to 420 V were sequentially generated (in this case, a stress is defined as a 3 consecutive TLP pulses). The curve presented in Fig. 3 can be split into three parts. The first part is illustrated by the linear curve and it corresponds to the magnitude level that the switches can withstand. The second part presents the points linked to the hot spot degradations occurring firstly in the CPW ports and then on the membrane region. Eventually, the third part shows the
3. ESD stress experiments ESD tests have been done through a TLP technique [7] which is commonly used to characterize active ESD protection structures for integrated circuits. The TLP operates on the constant 50 X impedance at a wafer level scale. The test set is able to produce square pulses featuring 100 ns duration with 300 ps rise time. Furthermore, to deepen the analysis and to acquire new benchmarks in reliability issues, human body model (HBM) measurements have been carried out.
Fig. 3. TLP I–V characteristic of an AlN-based switch.
1820
J. Ruan et al. / Microelectronics Reliability 47 (2007) 1818–1822
entire destruction of the membrane. The second and third fractions will be detailed in the following sections. During the stresses, a digital CCD camera (Hamamatsu C4880) is used to monitor the device behaviour. Fig. 4 show the light emission acquisition performed when we increase the ESD stresses magnitude from 390 to 420 V. Visible hot spots are related to an electric arc occurring between the different metallic regions. As aforementioned, the first observation we can raise deals with the fact that electric arc originate firstly in the CPW ports, despite a 10 lm distance between the central signal line and the ground to be compared to the 2.4 lm distance between the dielectric layer and the upper mechanical beam. Increasing the magnitude of the TLP stress results to additional hot spots located at the output of the CPW ports and at the membrane region (Fig. 4b). The spot at the membrane region can be explained by a return current through the thin layer of metallization near the actuation electrode. In order to understand the electric arc effect between the electrodes of the coplanar line, we performed 3D static simulations to calculate the electric field in the device. Fig. 5 presents the electric field distribution in the CPW slot featuring a peak value of 1.9 MV cm 1 occurring near the metallization. Such high electric field level triggers a spark that yields metallization melting. These two correlated phenomenon are both detected by the CCD sensor. If we calculate the static electric field between the central line and the upper membrane, we find a lower value of
Fig. 5. Electric field distribution using static 3D simulation with a DC voltage of 420 V at the CPW access.
1.75 MV cm 1 it explain the fact that the hot spot and then the corresponding failure mechanism occurs firstly in the CPW region. Fig. 6 reports a typical degradation mechanism that has been observed after the CPW region damages. It has been found that these holes originate from electric arc occurring under the membrane, due to very high current through electric arc breakdown channel resulting in melting of metal and dielectric. Microwave measurements have been carried out at 10 GHz versus actuation voltage before and after ESD shots. It must be mentioned that the measurements rate used is very fast in order to get rid from dielectric charging. Fig. 7 illustrates the results that have been obtained. The first comment we can made deals with the fact that the on state behaviour is not affected by the ESD stress. The second comment is about the fact that despite some holes occurring in the membrane, there is no modification of the electromechanical behaviour of the device as the pull-in and pull-out voltage remain similar as well as the overall hysteresis cycle. The third comment that could be invoked deals with the off state behaviour which shows a clear degradation of the device isolation that is relevant
Fig. 6. Degradation of a AlN-based switch submitted to TLP stresses.
Fig. 4. Hot spots generated at (a) 390 V and (b) 420 V.
Fig. 7. S21 parameter versus actuation voltage before and after 10 TLP pulses under 280 V in upstate configuration.
J. Ruan et al. / Microelectronics Reliability 47 (2007) 1818–1822
1821
ance of the switches in comparison to the generator ones. So in our case, the tester becomes a voltage generator and no current is flowing through the set-up until a fixed threshold value is reached. Fig. 9 shows the voltage and current waveforms when we exceed 350 V. Current transfer in the device can be observed during about 500 ns which should correspond to the spark lifetime. We can also observe that the threshold voltage is in the same range than TLP experiment, hence we may assume that HBM robustness of these devices is under 400 V, whereas the failure mode is translated into stiction. These tests have to be further extended to better understand the difference between TLP and HBM damages. Fig. 8. Topology of the switch after destruction.
4. Conclusion with some dielectric degradation due to the electric-arc processes. Finally, it can be noted that ESD stresses do not translate into dielectric charging, since there is no evidence for a drift of the threshold voltages between the two curves, which is relevant with a dielectric charging effect. Fig. 8 illustrates the topology of the switch after the ESD sequence that shows some unrecoverable failure in the CPW access and moveable membrane (see the point corresponds to the membrane destruction in Fig. 3). 3.2. HBM stresses The first experiments have been done using these devices under human body model tests. These tests are widely used as industrial standards for evaluation of ESD robustness in integrated circuits. This fact justifies our efforts in applying them to RF MEMS devices. Although these tests are typically carried out on packaged devices, we have been using a new wafer level equipment from Hanwa [3] able to monitor voltage and current waveforms during the stress procedure, which makes this feature interesting to investigate the MEMS failures mechanism. The HBM generator is mostly considered as a current generator with a calibrated waveform. The current peak is increased until breakdown occurs. Their application to our RF MEMS is quite different due to higher static imped-
This paper presents the reliability behaviour of AlNbased capacitive RF MEMS through ESD stresses using TLP method and HBM discharges. Concerning TLP tests, we have shown that these stresses turn out to electric arc damaging firstly on metallization and then on the membrane in up-state configuration. The device keeps on functioning until the membrane is totally destroyed. We have shown that ESD stresses impact the microwave behaviour of the device through a worsening of the isolation. This is likely due to a degradation of the capacitive contact. However in these conditions no major effect on the actuation voltages has been observed. HBM robustness in upstate configuration was also reported. The first measurements exhibit the same range of breakdown voltage than TLP but its failure mode is different as it turns out into stiction. In this case, it will be interesting to study the affinity of the test set with respect to typical damages behaviour occurring in RF-MEMS. These experiments show the need to develop some protection strategy for system architectures that will use RF MEMS. Acknowledgements The authors acknowledge the European Network of Excellence AMICOM and the authors of Hanwa Company for their support on HBM measurements. References
Fig. 9. The voltage and current waveforms when breakdown occurs.
[1] Zunino JL III et al. Micro-electromechanical systems (MEMS) reliability assessment program for department of defense activities. In: Proceedings of 2005 NSTI nanotechnology conference and trade show (Nanotech), Anaheim, CA, vol. 3, May 8–12 2005. p. 463–66. [2] Tazzoli A, Peretti V, Gaddi R, Gnudi A, Zanoni E, Meneghesso G. Reliability issues in RF-MEMS switches submitted to cycling and ESD test. In: 44th annual international reliability physics symposium, San Jose; 2006. p. 410–15. [3] Hanwa Electronic Ltd.:. [4] Melle´ S et al. Reliability modeling of capacitive RF MEMS. IEEE Trans Microw Theory 2005;53(11):3482–8. [5] Ducarouge B, Dubuc D, Melle´ S, Grenier K, Mazenq L, Bary L. Efficient topology and design methodology for RF MEMS switches.
1822
J. Ruan et al. / Microelectronics Reliability 47 (2007) 1818–1822
In: SPIE’s international symposium on microtechnologies for the new millennium 2005, Seville (Spain), vols. 5836–5840, 9–11 May 2005. p. 535–39. [6] Lisec T, Huth C, Wagner B. Dielectric material impact on capacitive RF MEMS reliability. In: 34th European microwave conference, Amsterdam; 2004.
[7] Maloney TJ, Khurana N. Transmission line pulsing techniques for circuit modeling of ESD phenomena. In: Proceedings of EOS/ESD Symposium; 1985. p. 49–54.
Electrostatic discharge failure analysis of capacitive RF MEMS switches J. Ruan
a,b,*
, N. Nolhier a
a,b
, M. Bafleur a, L. Bary a, F. Coccetti a, T. Lisec c, R. Plana
a,b
LAAS-CNRS, University of Toulouse, 7 Avenue du Colonel Roche, Cedex 4, 31077 Toulouse, France b University Paul Sabatier, 118 Route de Narbonne, Cedex 9, 31062 Toulouse, France c ISIT-FHG, Fraunhoferstraße 1, Itzehoe, Germany Received 7 July 2007 Available online 4 September 2007
Abstract This paper reports on the investigation of failure mechanisms of aluminum nitride (AlN)-based capacitive RF MEMS switches. Electrostatic discharge (ESD) experiments have been carried out by means of a transmission line pulsing (TLP) technique and a first experiment under human body model (HBM) stresses has been done. It has been observed that TLP stresses gives rise to electric arcs and the degradations have been analyzed and are reported in this paper. Microwave measurements have shown that TLP stresses impact the quality of the capacitive contact. HBM robustness in upstate configuration and its different failure modes have been also reported. Ó 2007 Elsevier Ltd. All rights reserved.
1. Introduction RF MEMS have demonstrated very attractive characteristics in terms of low insertion and return losses, low power consumption, high isolation and a wide operative frequency range. Furthermore they offer a great potential for integration and miniaturization into innovative RF architectures featuring advanced functionalities [1]. Nevertheless, the fact that MEMS combine electrical and mechanical behaviour introduces new classes of reliability issues. Nowadays, there is a lack of data concerning the reliability behaviour of these devices and a lot of efforts are spent worldwide, to understand and to solve the issues [1–4] in order to pave the way of their industrialization. It is understood that RF MEMS devices will be largely used into mainstream architecture and this has motivated the investigation of their sensitivity with respect to ESD stresses. To date there is only one paper dealing with this issue [2] and we believe that more efforts are needed in order to better understand the physic of failure related to ESD stres-
* Corresponding author. Address: LAAS-CNRS, University of Toulouse, 7 Avenue du Colonel Roche, Cedex 4, 31077 Toulouse, France. Tel.: +33 (0) 5 61 33 68 28; fax: +33 (0) 5 61 33 69 69. E-mail address: [email protected] (J. Ruan).
0026-2714/$ - see front matter Ó 2007 Elsevier Ltd. All rights reserved. doi:10.1016/j.microrel.2007.07.070
ses. This paper is devoted to failure analysis of AlN based capacitive RF MEMS under ESD stresses. The investigations are first conducted through a 100 ns transmission line pulsing (TLP) technique followed by a human body model (HBM) test (Wafer Level HBM Tester [3]). The device functionalities are monitored through microscope visualization and current–voltage (I–V) curves. Scattering parameter (S21) measurements versus actuation voltage have been performed, before and after the TLP stress procedure, using an in-house test set [4] used for dielectric charging and electromechanical behaviour investigations. 2. Device description Fig. 1 presents the topology of the AlN-based microwave capacitive micro-switches we used for the experiments. They have been designed in LAAS [5] and fabricated by ISIT-FHG within a multi project wafer run. The membrane is 0.9 lm thick and consists of a stack of Au/Ni/Au layers. The coplanar waveguide (CPW) line below the membrane is made of Ta/Pt/Au/Pt multi-layer. Under the bridge the signal line is covered by 300 nm of AlN dielectric layer which dielectric constant is 9.8. The total dielectric thickness of the actuation electrodes is 600 nm composed by 300 nm AlN and 300 nm Si3N4,
J. Ruan et al. / Microelectronics Reliability 47 (2007) 1818–1822
Fig. 1. Topology of the AlN-based capacitive RF-MEMS switches: (a) top view of the device under test and (b) cross-section view.
1819
Fig. 2. Measured performances of the device in both: (a) upstate and (b) downstate configurations.
3.1. TLP stresses whose interconnections consist of 3 lm thick electroplated Au. Without electrostatic force, the mechanical beam over the dielectric layer of the signal line features 2.4 lm heights. Fig. 2 presents the measured performances of the capacitive MEMS bridge in its two states, showing at 15 GHz an isolation greater than 20 dB but high insertion loss of 1 dB. From the point of view of performances at low GHz frequencies, the use of high constant k dielectric material seems to be more attractive for RF MEMS. However the drawback of high k materials is the high field strength in the case of thin dielectric layer [6]. The calculated capacitance ratio of these switches is about 83, whereas the measured one is about 75. The difference is probably due to the roughness affective of the actual capacitance value. This high ratio can be explained by the wide active area of the device.
The configuration considered in the following corresponds probably to the most common case where the device will suffer from a catastrophic failure due to ESD within a microwave system (i.e., the TLP pulses were applied between the signal line and the ground with the membrane in the up position (see the top righthand corner in Fig. 3.)). TLP stresses with voltage magnitude ranging from 260 to 420 V were sequentially generated (in this case, a stress is defined as a 3 consecutive TLP pulses). The curve presented in Fig. 3 can be split into three parts. The first part is illustrated by the linear curve and it corresponds to the magnitude level that the switches can withstand. The second part presents the points linked to the hot spot degradations occurring firstly in the CPW ports and then on the membrane region. Eventually, the third part shows the
3. ESD stress experiments ESD tests have been done through a TLP technique [7] which is commonly used to characterize active ESD protection structures for integrated circuits. The TLP operates on the constant 50 X impedance at a wafer level scale. The test set is able to produce square pulses featuring 100 ns duration with 300 ps rise time. Furthermore, to deepen the analysis and to acquire new benchmarks in reliability issues, human body model (HBM) measurements have been carried out.
Fig. 3. TLP I–V characteristic of an AlN-based switch.
1820
J. Ruan et al. / Microelectronics Reliability 47 (2007) 1818–1822
entire destruction of the membrane. The second and third fractions will be detailed in the following sections. During the stresses, a digital CCD camera (Hamamatsu C4880) is used to monitor the device behaviour. Fig. 4 show the light emission acquisition performed when we increase the ESD stresses magnitude from 390 to 420 V. Visible hot spots are related to an electric arc occurring between the different metallic regions. As aforementioned, the first observation we can raise deals with the fact that electric arc originate firstly in the CPW ports, despite a 10 lm distance between the central signal line and the ground to be compared to the 2.4 lm distance between the dielectric layer and the upper mechanical beam. Increasing the magnitude of the TLP stress results to additional hot spots located at the output of the CPW ports and at the membrane region (Fig. 4b). The spot at the membrane region can be explained by a return current through the thin layer of metallization near the actuation electrode. In order to understand the electric arc effect between the electrodes of the coplanar line, we performed 3D static simulations to calculate the electric field in the device. Fig. 5 presents the electric field distribution in the CPW slot featuring a peak value of 1.9 MV cm 1 occurring near the metallization. Such high electric field level triggers a spark that yields metallization melting. These two correlated phenomenon are both detected by the CCD sensor. If we calculate the static electric field between the central line and the upper membrane, we find a lower value of
Fig. 5. Electric field distribution using static 3D simulation with a DC voltage of 420 V at the CPW access.
1.75 MV cm 1 it explain the fact that the hot spot and then the corresponding failure mechanism occurs firstly in the CPW region. Fig. 6 reports a typical degradation mechanism that has been observed after the CPW region damages. It has been found that these holes originate from electric arc occurring under the membrane, due to very high current through electric arc breakdown channel resulting in melting of metal and dielectric. Microwave measurements have been carried out at 10 GHz versus actuation voltage before and after ESD shots. It must be mentioned that the measurements rate used is very fast in order to get rid from dielectric charging. Fig. 7 illustrates the results that have been obtained. The first comment we can made deals with the fact that the on state behaviour is not affected by the ESD stress. The second comment is about the fact that despite some holes occurring in the membrane, there is no modification of the electromechanical behaviour of the device as the pull-in and pull-out voltage remain similar as well as the overall hysteresis cycle. The third comment that could be invoked deals with the off state behaviour which shows a clear degradation of the device isolation that is relevant
Fig. 6. Degradation of a AlN-based switch submitted to TLP stresses.
Fig. 4. Hot spots generated at (a) 390 V and (b) 420 V.
Fig. 7. S21 parameter versus actuation voltage before and after 10 TLP pulses under 280 V in upstate configuration.
J. Ruan et al. / Microelectronics Reliability 47 (2007) 1818–1822
1821
ance of the switches in comparison to the generator ones. So in our case, the tester becomes a voltage generator and no current is flowing through the set-up until a fixed threshold value is reached. Fig. 9 shows the voltage and current waveforms when we exceed 350 V. Current transfer in the device can be observed during about 500 ns which should correspond to the spark lifetime. We can also observe that the threshold voltage is in the same range than TLP experiment, hence we may assume that HBM robustness of these devices is under 400 V, whereas the failure mode is translated into stiction. These tests have to be further extended to better understand the difference between TLP and HBM damages. Fig. 8. Topology of the switch after destruction.
4. Conclusion with some dielectric degradation due to the electric-arc processes. Finally, it can be noted that ESD stresses do not translate into dielectric charging, since there is no evidence for a drift of the threshold voltages between the two curves, which is relevant with a dielectric charging effect. Fig. 8 illustrates the topology of the switch after the ESD sequence that shows some unrecoverable failure in the CPW access and moveable membrane (see the point corresponds to the membrane destruction in Fig. 3). 3.2. HBM stresses The first experiments have been done using these devices under human body model tests. These tests are widely used as industrial standards for evaluation of ESD robustness in integrated circuits. This fact justifies our efforts in applying them to RF MEMS devices. Although these tests are typically carried out on packaged devices, we have been using a new wafer level equipment from Hanwa [3] able to monitor voltage and current waveforms during the stress procedure, which makes this feature interesting to investigate the MEMS failures mechanism. The HBM generator is mostly considered as a current generator with a calibrated waveform. The current peak is increased until breakdown occurs. Their application to our RF MEMS is quite different due to higher static imped-
This paper presents the reliability behaviour of AlNbased capacitive RF MEMS through ESD stresses using TLP method and HBM discharges. Concerning TLP tests, we have shown that these stresses turn out to electric arc damaging firstly on metallization and then on the membrane in up-state configuration. The device keeps on functioning until the membrane is totally destroyed. We have shown that ESD stresses impact the microwave behaviour of the device through a worsening of the isolation. This is likely due to a degradation of the capacitive contact. However in these conditions no major effect on the actuation voltages has been observed. HBM robustness in upstate configuration was also reported. The first measurements exhibit the same range of breakdown voltage than TLP but its failure mode is different as it turns out into stiction. In this case, it will be interesting to study the affinity of the test set with respect to typical damages behaviour occurring in RF-MEMS. These experiments show the need to develop some protection strategy for system architectures that will use RF MEMS. Acknowledgements The authors acknowledge the European Network of Excellence AMICOM and the authors of Hanwa Company for their support on HBM measurements. References
Fig. 9. The voltage and current waveforms when breakdown occurs.
[1] Zunino JL III et al. Micro-electromechanical systems (MEMS) reliability assessment program for department of defense activities. In: Proceedings of 2005 NSTI nanotechnology conference and trade show (Nanotech), Anaheim, CA, vol. 3, May 8–12 2005. p. 463–66. [2] Tazzoli A, Peretti V, Gaddi R, Gnudi A, Zanoni E, Meneghesso G. Reliability issues in RF-MEMS switches submitted to cycling and ESD test. In: 44th annual international reliability physics symposium, San Jose; 2006. p. 410–15. [3] Hanwa Electronic Ltd.:
1822
J. Ruan et al. / Microelectronics Reliability 47 (2007) 1818–1822
In: SPIE’s international symposium on microtechnologies for the new millennium 2005, Seville (Spain), vols. 5836–5840, 9–11 May 2005. p. 535–39. [6] Lisec T, Huth C, Wagner B. Dielectric material impact on capacitive RF MEMS reliability. In: 34th European microwave conference, Amsterdam; 2004.
[7] Maloney TJ, Khurana N. Transmission line pulsing techniques for circuit modeling of ESD phenomena. In: Proceedings of EOS/ESD Symposium; 1985. p. 49–54.