Encapsulation of polymeric membrane-based ion-selective field effect transistors

Sensors

and Actuators,

4 (1983)

413

413 - 421

ENCAPSULATION OF POLYMERIC MEMBRANE-BASED ION-SELECTIVE FIELD EFFECT TRANSISTORS*

N J HO and J KRATOCHVIL Crltlkon,

Inc , 391 Chrpeta

G F BLACKBURN Department

Way, Salt Lake City,

Utah 84108

(US A )

and J JANATA

of Bgoengrneermg,

Unrversity

of Utah, Salt Lake Czty, Utah 84112

(US

A )

Abstract The use of polymeric membrane-based ISFETs 1n solution requires a method of encapsulating the package while leavmg the gates of the chip open for a subsequent membrane deposltlon The choice of encapsulants and the method are governed by the general device package, by the geometry and layout of the chip and by the intended use In view of this, there seems to be no universal recipe for encapsulation Two examples of the ISFET encapsulation approach described m this paper are an adaptation of the tape automated bonding process and a dry film photoreslst wafer encapsulation Both of these processes, when fully developed, permit some degree of automation 1n the ISFET assembly

1. Introduction

Successful operation of an lonselectlve field effect transistor (ISFET) ln solution 1s condltlonal upon good electrical integrity of the gate area and on the dielectric properties of encapsulants which protect the rest of the transistor Since Bergveld’s report [l] on a s111con dioxide bare gate FET, s111con nitride has become the matenal of choice as the uppermost layer of the gate insulator Properly deposited S13N4 resists hydration and, unlike thermally grown S102, mamtams 1ts insulating propertles even after prolonged and continuous exposure to electrolytes This property of s111connitride, coupled with 1ts relatively good pH sens1t1vlty, has led to the development and characterization of several designs of solid state pH-sensitive FETs [2 - 41 Good insulating properties of s111con nitride are also essential for those ISFET *Based on a Paper presented at SolIdState May 31 -June 3, 1983 0250-6874/83/$3

00

Transducers

83, Delft, The Netherlands,

0 Elsevler Sequola/Prmted

In The Netherlands

414

structures which denve their selectlvlty from discrete ion-selective membranes deposlted over the gate area [5] At present the ISFET fabrlcatlon IS a well defined, economical, large volume process up to the msulated gate FET production stage From there membrane deposition and the device packaging on, the encapsulation, usually involve a series of tedious and time consuming manual assembly steps accompamed by a high rate of failure It has been recognized early on that this unrehable and labor intensive second stage of ISFET fabrlcatlon IS the bxggest technological problem that needs to be solved before ISFETs can become widely avrulable for use Several groups have addressed this problem followmg two broad developmental efforts In the first approach, the emphasis 1s put on devlsmg encapsulation and membrane-deposltlon methods wholly compatible with the standard semiconductor techmques and equipment A typical example 1s the work of Matsuo and his colleagues, who have fabricated probe-type ISFETs for blomedlcal apphcatlons [6, 71 A modified integrated circuit process developed by these workers mvolves chemical shaping of the chip and a subsequent three-dlmenwonal passlvatlon of the whole ISFET structure with a layer of Sl,N,+ This pH-sensltrve FET 1s then secured m a catheter tubing by a slhcone rubber resin which 1s also used to encapsulate the bondmg pads and the wire leads Matsuo and his group have also developed a process of formmg alummoslllcate and boroslhcate glass membranes zn sztu over the gate msulator m attempts to impart potassrum or sodium ion selectivity to their ISFETs Others have tried to sputter a conventional polymeric potasslum ion-selective membrane on the ISFET [ 81 and m another example [ 91, a potassium lonophore was mcorporated mto a photoresist film which could be processed by the photohthographlc techniques However, these two fabncatlon methods yielded devices w&h degraded electrochemical properties The second approach to ISFET fabncatlon, which we have adopted, starts from the premise that the chemical and rheologlcal propertles of many well-characterized ion-selective membranes and encapsulants preclude then straightforward use m the semiconductor manufacturmg The maJor effort 1s therefore focused on deslgnmg methods that would accomodate the processmg pecuharitles of these materials All the membranes that we have been using are based on highly plastlclzed polyvmylchlonde matrix [ 101 Membrane electroactlve components are dissolved together with PVC plastlsol m a volatile organic solvent and the desired elastomeric membrane coatmg IS obtamed by the solution casting followed by a slow solvent evaporation at ambient temperature The incorporation of PVC membranes wlthm the ISFET structure requires a process that would allow the encapsulation of the chip while leaving the gates open for the subsequent membrane castmg The thickness of the encapsulant, which determines the thickness of the membrane, should not be less than 50 pm Finally, adhesion of the membrane to the surface of the device 1s of crltlcal importance since it 1s a lifetime hmltmg factor for the ISFET

415

A method of PVC membrane adhesion not mvolvmg changes m its composition has been recently developed [ll] A membrane anchoring structure, called suspended mesh, 1s fabncated from polylmlde above the gate of the ISFET by commonly used integrated circuit technologies The suspended mesh ISFET has been used m our encapsulation efforts based on an adaptation of a tape carrier process The second encapsulation approach, outlined here, which utlhzes a dry photoreslst film permits, m pnnclple, the formation of an encapsulant that 1s compatible with any membrane

2. Expenmental The CHEMFET chip used m our work, shown schematically in Fig 1, has been developed and fabncated at the Umverslty of Utah The chip contams two chemically-sensitive transistors (Ql, Q2) and two conventional MOSFETs (Q3, Q4) Each of the transistors has gate dlmenslons of 20 micrometers by 400 micrometers The gate insulator consists of an 80 nm film of GO, covered by an 80 nm film of S13N4 The over-all dlmenslons of this chip are 1 28 X 2 16 mm

Q3

-44

Fig 1 A schematic diagram of a dual ISFET chip, over-all dlmenslon

1 28 X 2 16 mm

416

The quality of the encapsulation was tested Immediately after the encapsulation step and at various intervals throughout the life of the device This test consisted of biasing the device &3 V against a reference electrode and measuring the over-all leakage current In this voltage range, a faulty device would exhibit a sharp increase of the leakage current, indicating a Faradaylc process taking place at the weak point in the encapsulation [12] The chemical and electrical characterlstlcs of the tape- and Rlston processencapsulated ISFETs were found to be ldentlcal to those devices encapsulated by hand with epoxy 2 1 Tape process The fabrication sequence of the tape-encapsulated ISFET 1s shown m Fig 2 The encapsulating tape 1s made of polylmlde sold under the Kapton@ (DuPont) trade name Kapton@ has excellent properties of electrlcaI and chemical resistance over a wide temperature range As shown, the CHEMFET chip 1s bonded on to an insulating substrate, either by thermosettmg adhesives or epoxies At the same time, a three-layer Kapton@ (TAB) tape 1s also bonded to the substrate Three-layer (TAB) tape normally consists of an

TAPE wtth Capper leads

Fig

2 Tape tamer

ISFET

encapsulation

417

etched 1 oz copper pattern which 1s laminated to a 2 to 5 ml1 thick Kapton@ tape This tape has a defined beam lead pattern which IS aligned over the chip bondmg pads, such that each bondmg pad 1s contacted by a beam lead At the opposite end of the tape, the leads are flared out mto a conflguratlon that will accept a commonly available connector or socket (not shown) If the beam leads or chip pads have been ‘bumped’, mterconnect bonding may be done at this time, either ultrasonically or by thermocompresslon Pull strength of these bonds should be on the order of hundreds of grams An overlying top tape 1s then placed over the assembly This tape, which 1s also made of Kapton @), has pre-cut slits which define the gate windows It 1s coated on one side with a thm (0 5 - 1 mll) layer of adhesive The suitable coatings are either B-staged epoxies or pressure sensitive thermosettmg slhcones or acryhcs The adhesive holds this msulatmg Kapton@ tape on to the bottom assembly as well as servmg as an encapsulant Itself, flllmg voids around the structure and sealing the area underneath the pre-cut gate windows The assembly 1s then cured The cunng schedule 1s determined by the adhesive used for the top tape and can range from 200 ‘C, 50 PSI, pressure applied for one second (B-staged epoxy) to 200 “C, no pressure, 4 hours for slhcone thermosettmg adhesives The use of B-staged epoxy (z e , pre-dried but not cured) 1s necessary m order to prevent the floodmg of the gate areas during the final cure The alignment of the top tape with the CHEMFET gates as well as solvent casting of PVC membranes into the wells 1s done under a microscope If the chip or beam leads have not been bumped, an extra wmdow has to be cut into the top tape over the bonding pad area which allows the conventional bonding to be performed 2 2 Dry fzlm photoreszst process An attractive approach to ISFET volume production mvolves a technique of encapsulating the chip while still at the wafer level, and opening up the gate areas by photolithography A vanatlon on this approach 1s to form a mask on the gate areas by deposltmg a film at the wafer level and etching it away around the gate areas so as to leave protective ‘chimneys’ over the gates The chimneys are etched away after deposltlon of the encapsulant and the resultmg wells facilitate solvent casting of membranes Our mltlal experiments with spm coating and etching through thick layers (50 pm) of Pyralm @ (DuPont), a hqurd polylmlde, proved to be unsuccessful, Pyralm@ as well as other conventional liquid photoreslsts that we have tried are normally used for msulatlon and pattern defmltlon coatings not exceeding thicknesses of several thousands of angstroms Although we have succeeded m forming thick layers of polylmlde over the wafers, the etching process and the line defmltlon were very poor The dry film photoreslsts which were mvestlgated subsequently are avdable from DuPont Co , as Vacrel@ and Rlston@ These matenals are photopolymenc films generally 25 to 50 I.crn thick Then 25 - 50 micrometers resolution

418

hmlts, although mferlor to hquld photoreasts, are more than adequate for our requirements The fabrlcatlon sequence, shown schematically m Fig 3, starts with lammatlon of 50 pm thick Rlston @ 218R (aqueous processable photopolymer resist) on to a normally prepared CHEMFET wafer The exposure of the Rlston@ film under a photomask 1s performed using a conventional ahgner Typical exposure time IS 20 seconds (5000 W UV lamp m the 350 450 nm region)

mston S’31J4 Lammate at

UV

RlstonW218R

100

exposure

20

Sllrcon

c

for

set

_m_ Develop

I

for

I

I

I

2 mm

Encapsulate

\

Remove with

Deposit

Fhston

I I

I I

stnpper

membrane

Fig 3 Dry fdm photoreslst

wafer encapsulation

I

I

419

(a)

(b) Fig 4 Rlston@

(a) Photomlcrograph of Rwton @ ‘chimney’ ‘chimney’ covermg the gate area (detail)

pattern

(b)

Photomlcrograph

of

Development of the exposed film 1s carried out at room temperature usmg Rlston@ D-2000 (DuPont) developer for 2 minutes The resultmg wafer, which has 50 E.crn Rlston@ chimneys (see Figs 4(a) and (b)) overlying the gates and bondmg pad areas, 1s encapsulated at this stage A hqmd encapsulant 1s spun cast or allowed to flood the wafer and cured The cured encapsulant 1s then lapped or Aled down to the thickness of the Rlston@ layer, and thus the tops of the Rlston@ chimneys are exposed again Fmally, the Rlston@ 1s removed with Rlston@ S-100X strlpper (see Fig 5) The wafer 1s then diced mto mdlvldual chips ready for final packaging and membrane deposltlon

420

Fig

5

Photomlcrograph

of gate

wmdow,

surrounding

encapsulant

1s epoxy

(detail)

3. Dlscusslon When fully developed, the two encapsulation procedures described earher promise some degree of automatlon m the assembly and packaging of the chips The choice of encapsulants and the method is governed by the general device package, by the geometry and layout of the chip and by the mtended use In view of this, there seems to be no umversal recipe for encapsulation The tape-carmer process as a means of mass mterconnectlon of all the leads on a chip 1s becommg an mcreasmgly important assembly method m the semiconductor industry All of the hrgh speed packaging steps used m this process (z e , chip or tape bumping, reel tape feeding, gang bonding, etc ) are directly apphcable to ISFET fabrication Slmllarly, the manufacturmg of the top encapsulatmg tape which contams pre-cut gate wmdows 1s a relatively straightforward engmeermg task Several methods that are avarlable for the defmrtlon of gate areas m the tape mvolve mechamcal or laser punching and chemical etching The fmal step of membrane depowtlon could be automated as well, smce the posltlon of the pre-cut holes m the top tape would be accurately known with respect to sprocket holes which are cut along its edge The tooling costs for this process are, however, considerable and once m place the process cannot be easily modified This lack of flexlblhty 1s perhaps the most semous drawback of the tape-carrier process Furthermore, the eventual development of an ISFET simultaneously sensltlve to several species of ions requires that different types of membranes be applied to small closely-spaced areas of the device In this respect, the fabncatlon of the top tape contammg more than two pre-cut gate wmdows would be a formidable technological task Although stxll m the early stages of development, the dry photoreslst process would seem to obviate all of these drawbacks It offers the desirable

421

flexlblhty and since all of the critical encapsulation 1s carried out at the wafer level, many die are treated at once Of part~ular importance for the production of polymenc membranebased ISFETs IS the fact that Rlston@ film 1s not used as a final encapsulant, but only serves as a vehicle for the area defmltlon and temporary protectlon of the gates This feature broadens the selectlon or formulation of such encapsulants which would @ve a good adhesive bond with cured PVC membranes

References 1 P Bergveld, Development, operation and apphcatlon of the ion sensltlve field effect transistor as a tool for electrophyslology, IEEE Trans Bzomed Eng , BME-19 (1972)

342 - 351 2 T Matsuo 3 4

5

6 7 8

9 10

11

12

and K D Wise, An Integrated field effect electrode for blpotentlal recordmg, IEEE Trans Bzomed Eng , BME-21 (1974) 485 - 487 S D Moss, J B Smith, P A Comte, C C Johnson and L Astle, A mlcroelectromc 1 (1977) 11 - 20 pH sensor, J Bzoeng, P W Cheung, W H Ko, D J Fung and S H Wong, Theory, fabrlcatlon testmg and chemical response of Ion-selective field effect transistor devices, m P Cheung, D G Flemmmg, W H Ko and M R Neumann (eds ), Workshop on Theory, Deszgn and Bzomedrcal Applzcatzon of Solzd State Chemzcal Sensors, CRC Press, Cleveland, Ohlo, 1978, pp 92 115 S D Moss, J Janata and C C Johnson, Potassium Ion-selective field effect transistor, Anal Chem , 47 (1975) 2238 - 2243 H Abe, M Esashl and T Matsuo, ISFETs using morgamc gate thin films, IEEE Trans Electron Devices, ED-26 (1979) 1939 - 1944 T Matsuo and M Esashl, Methods of ISFET fabrication, Sensors and Actuators, 2 (1981) 77 - 96 J A Toplch, C Fung, A Wong and M J Mlrtlch, Fabrlcatlon of a potassmm sensmg FET usmg Ion beam sputtering, Extended Abstracts, 153rd Electrochemzcal Soczety Meetzng, 78 (1978) Abstract No 85 C C Wen, I Lauks and J N Zemel, Vahnomycm-doped photoreslst layers for potassium Ion-sensmg, Thzn Solzd Alms, 70 (1980) 333

Neutral Ionophores for IonSelectzve Electrodes, Speczfzcatzons and References for Ready to Use Cocktazls for Mzcroelectrodes, Ionophores, Addztzves and Auxzlzary Substances for Macro- and Mznzelectrodes, Fluka AG, CH-9470 Buchs, Switzerland, August 198 2 G Blackburn and J J Electrochem Sot J Janata and R J (ed ), Ion Selectzve York, 1980, Ch 3

Janata, The suspended mesh ion selective field effect transistor, , 129 (1982) 2580 - 2584 Huber, Chemically sensltlve field effect transistors, m H Frelser Electrodes zn Analytzcal Chemzstry, Vol 2, Plenum Press, New