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Enhancement of electrical and dielectrically performance of graphene-based promise electronic devices
Synthetic Metals 261 (2020) 116303
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Enhancement of electrical and dielectrically performance of graphene-based promise electronic devices
T
A. Asherya, A.A.M. Faragb,c,*, M.A. Moussad, G.M. Turkyd a
Solid State Electronics Laboratory, Solid State Physics Department, Physics Division, National Research Centre, Dokki, Giza, 12622, Egypt Physics Department, Faculty of Science and Arts, Jouf University, Saudi Arabia c Thin Films Laboratory, Physics Department, Faculty of Education, Ain Shams University, Roxy, Cairo, 11757, Egypt d Microwave Physics and Dielectrics Department, National Research Centre, Dokki, Giza, 12622, Egypt b
A R T I C LE I N FO
A B S T R A C T
Keywords: Graphene oxide Dielectric properties Negative capacitance Temperature sensor
The presented article findings indicate an efficient method for obtaining graphene oxide and its enhancement for electronic devices. The structural checking for confirming the molecular, crystalline and morphology characterization was carefully included. The measurement of the dielectric characteristics was considered in a wide range of voltage bias, temperature, and frequency for obtaining valuable evidence about the electrical storage and dissipation properties of the device for prospective applications. The measured dielectric parameters showed a dispersion attitude under the influence of all the studied factors. The results confirmed a reduction in both capacitance and conductance with increasing the applied frequency. Remarkably, a negative capacitance influence was also detected in the studied frequency range in wholly investigated devices. The deviations in the dielectric behavior could be attributed to the rearrange of charges at the GO/Si interface and to the influence of series resistance. Additionally, the current-density voltage characteristics were investigated under influence of temperature to provide the option for the diode as a temperature sensor. Accordingly, the GO-based heterojunction provided the projections to produce low cost with a wide scale of device applications.
1. Introduction
electronic devices [10,11]. The capacitance measurements have been considered in the present study, and a remarkable negative capacitance is detected under the influence of frequency, bias voltage and temperatures. Negative capacitance is a non-traditional phenomenon (transient) proposed by Salahuddin and Datta [12] for ferroelectric-based materials to exchange the gate oxide of the device by a negative capacitance. This negative capacitance material might benefit from dropping the supply voltage (low-power operation) and hereafter energy dissipation in the traditional transistors [13]. This phenomenon can be observed in several insulators and semiconducting-based like p-n junctions, metal/semiconductor, metal/insulator/semiconductor as well as a photodetector and light-emitting diodes [14–16]. The observation of negative capacitance for graphene-based devices was published by various authors [17–19]. Moreover, Yalcin and Yakuphanoglu [17] have studied the voltage and frequency dependence of negative capacitance performance in Graphene-TiO2 based devices. Moreover, Fan et al. [18] have studied the electrical and dielectric properties of graphene/PPScomposites and investigated the negative permittivity in the region of the radio frequency. In addition, Chiolerio et al. [19] have studied the
There is evidence that graphene plays a crucial role in various scopes in industry, like energy storage batteries, catalysis, nanocomposite materials, biomedical enforcement, catalysis in chemical reactions as well as extremely uses and employment is portrayed in the literature [1–3]. These applications owing to the superior characteristics of GO, like the easiest property for dispersing in various solvents such as water, organic solvents, and many different matrixes which are very important for improving the electrical and mechanical characteristics of ceramics and polymer matrices. The other main property is the capability for chemical modification of the GO for the preferred prospective applications [4–6]. The property of dispersibility of GO in various solvents gives an opportunity for the deposition of this structure on the various substrate in the shape of thin films by utilizing easy methods like drop-casting, spin coating, Langmuir-Blodgett deposition, and vacuum filtration and other possible fabrication techniques [7–9]. Particularly, GO thin films have great attention because of their prospective use in an expansive scope of utilizations which incorporate flexible as well as various
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Corresponding author. E-mail address: [email protected] (A.A.M. Farag).
https://doi.org/10.1016/j.synthmet.2020.116303 Received 13 November 2019; Received in revised form 11 January 2020; Accepted 14 January 2020 0379-6779/ © 2020 Elsevier B.V. All rights reserved.
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Fig. 1. (a) SEM image for the surface morphology of the GO sample, and (b) surface profile of the GO sample.
confirmed by FTIR, Raman spectrum as well as an X-ray diffraction pattern. After finishing the preparation process, the front and back ohmic contacts were prepared using pure Au and Al, respectively, by means of evaporator system type E306 A, Edwards Co., England.
impedance characteristics of the inkjet-printed graphene-based nanocomposites(reduced Graphene oxide, RGO/ poly polystyrene sulfonate, PSS/polyaniline, PANI). They investigated the operation of the prepared devices with negative and positive capacitance depending on the application frequency. The high-frequency negative capacitance and the other impedance hyperbolicity were recorded. Moreover, they discussed the negative capacitance based on the theory of the standard space charge accumulation. To date, only a limited number of graphene oxides have been identified for study the dielectric characteristics, especially the negative capacitance, as well as the electrical properties in a device structure, prepared by a simple and high efficient technique as compared with the well-known technique. Due to practical constraints, this paper cannot provide a comprehensive review of GO, but the main objective concerns the practice results of the main dielectric and electrical characteristics of GO-based devices. The overall structure of the study takes the form of three parts, including the preparation of highly efficient GO thin films by a simple technique. The second part containing the investigation of molecular, morphological and crystalline structure characterization as a first part. The third part includes the electrical characteristics, considering the properties of the negative capacitance. The final part comprises the electrical characteristics and its significant parameters for the obtainability of electronic device applications.
2.2. Characterizing appliances The crystalline structure identification was performed utilizing the X-ray diffraction tool, type Philips X’Pert Pro MRD, using a source of radiation of Cu Kα. The morphological micrographs of the films were acquired by using a Zeiss Ultra 60 FESEM. The dielectric achievement properties were obtained by E4991B impedance analyzer (Key Sight Co., USA), for the applied frequency range up to 7 MHz, temperature range of 323–363 K and a bias voltage of −2 to +2 V. The current-voltage properties of the device were achieved by using Keithley 2635 A electrometer. 3. Results and discussion 3.1. Structural characteristics of GO film The field-emission microscopy image of GO film with a magnification of 120.000x is shown in Fig. 1(a). The morphology indicates a high agglomeration of nanoparticles in various orientations. Moreover, some points of distortion were observed which can be caused by the occurrence of unwarranted solidification regions throughout the substrates. In addition, the image shows a ribbon-like structure oriented in various directions, each of them consists of several nanoparticles of GO. The presence of GO nanoparticles can control the physical characteristics of the prepared films and influences the dielectric and electrical properties of prepared films [21]. The distribution of some altitudes of the GO surface roughness profile is revealed in Fig. 1(b). The profile gives information about the distinctive roughness of the surface, especially in some regions. This roughness can affect the quality of both optical and electrical properties as well as the mechanical properties of the prepared films [22]. The crystalline structure-property of the prepared GO thin film is observed in Fig. 2. As detected from the figure that the GO films show a characteristic abroad peak (001) in agreement with those published for GO [23]. The broad peak indicates the nanostructure characteristics with crystal size determined using the well-known Sherer's formula and found to about 7 nm. The results of the FTIR of GO thin films is observed in Fig. 3. Several oxygen formations in the structure comprise the vibration styles at 915 cm−1 can be assigned to COeH vibration, while the peak at 1420 cm−1 can be interpreted to sp 2 -hydride CC. The vibration at 1800 cm]−1
2. Experimental procedure 2.1. Preparation of graphene oxide films All the organic chemicals used in this article were purchased from Sigma–Aldrich Co (≥95 % purity). without any additional refinement. To prepare the GO/p-Si junction structure, firstly, the silicon substrates were carefully washed and etched using the well-known HF-based solution (Etching solution having HF (48 %): C2H5OH (98 %) = 1:4 by volume ratio) followed by a flow of nitrogen gas for the drying process. Secondly, a thin film of poly (vinyl chloride) PVA was deposited by a spin coating technique on the pre-cleaned Si substrate as a source of GO. In which, a 0.5 M of PVA was dissolved in 10 ml of dissolved in tetrahydrofuran(THF) as a suitable solvent [20]. A homogeneous PVA solution was obtained by continuous stirring using a magnetic stirrer at 343 K. The spin coating condition was started by the low rate of 500 rpm for 60 s and gradually increased to 1000 rpm for 60 s and repeated various times for controlling the thickness of the deposited PVA layer. After finishing the deposition process, the drying of the film was made in an oven of 373 K to remove all the organic solvent contaminations. Finally, the samples of PVA/Si structure were maintained at temperature 200C° for 30 min in an electric oven and then increased to 500 C° to ensuring the complete conversion of PVA to graphene oxide as 2
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distinguishing of crystalline GO and confirming the occurrence of sp2 sites with stretching modes [27–30]. The presence of 2D peak is characterized as a second-order peak which can be owing to the existence of zone-boundary phonons in GO, detected only in the condition of resonance [27–29]. 3.2. Schematic energy band diagram of GO-based device The proposed structure diagram of the prepared GO-based device is illustrated in Fig. 5 with the upper electrode (Au) and the bottom one (Al) which confirming a nearly ohmic contact for GO and p-Si, respectively. This was done from the results of the metal-semiconductor I–V behavior of each material with the contact and obtaining a linear fit with satisfactory ohmic resistance in each case. Moreover, the structure of Au/GO/Si/Al is signified in the energy diagram, revealed in Fig. 6. Consequently, the barrier can construct only at the interface of GO/Si and then the resulted current is nonlinear due to the formation of the depletion region.
Fig. 2. (a) X-ray diffraction patterns GO film.
3.3. Dielectric characteristics of GO-based device The dielectric characteristics are very important for the elucidation of numerous phenomena in solid-state physics and other optical, biomedical and device applications due to the assessment of its expected behavior [18,31]. The measurements of both capacitance and conductance as a function of bias, frequency, and temperature are shown in Figs. 7 and Fig. 8, respectively. The measurements were done under the bias range of −2 to +2 V. The temperature dependence was achieved in the range of 223−363 K as well as the frequency dependence in the various frequency range up to 6 MHz for the GO-based devices. The curves also indicate that both C and G are powerfully influenced by the bias voltage, temperature, and frequency. The main observable phenomenon is the negative capacitance observation for all the measured capacitance under all the applied conditions. The observation of the negative capacitance was published elsewhere for various structures including organic and inorganic based-devices [32–33]. Various authors tried to explain the mechanism based on the injection of the contact at the metal/semiconductor and the nature of the interface states and/or the influence of series resistance [34–35]. But the others supposed that the negative capacitance created from the insertion of charge carriers that includes a hopping process to localized interface traps/states and then the trap charges have enough energy to transient at the metal and semiconductor interface [36–37]. The values of negative capacitance increase with increasing the applied bias in both accumulation and depletion region but decreases in the inversion region at low temperature from 223 to 273 K as shown in Fig. 7(a) and (b). Otherwise,
Fig. 3. FTIR spectrum of GO film.
can be assigned to a ketonic group (CO). While the weak peaks at 2450 cm]−1 and 2750 cm−1 can be assigned to C–H and finally the peak at 3150 cm−1 can be due to −OH stretching vibrations. The obtained results are in agreement with those published by various authors [24–26]. The Raman spectrum of GO thin films is illustrated in Fig.4. The observed peaks at ∼ 1570 cm−1 (G-Peak). The Raman spectrum of the prepared GO, shown in Fig. 4(a) and (b), produces a peak at ̴ 1388.6 cm−1 (called D peak), a sharp band at ̴ 1613 cm−1 (called G peak), and another peak at 2719 cm−1 (called 2D peak). A peak centred at 1388.6 cm−1 (D peak) can be assigned to the presence of short-range periodicity owing to the occurrence of the disorder in the structure as well as confirming the existence of sp2 sites in the rings with breathing mode [27–29]. The G peak can be allocated to the first-order Raman mode
Fig. 4. (a) and (b) Raman spectrum of GO film with fitting. 3
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Fig. 5. Schematic diagram of the Au/GO/p-Si/Al heterojunction device.
Fig. 6. Energy band diagram of the Au/GO/p-Si/Al heterojunction device.
imaginary (ε2) dielectric constants are revealed in Figs. 9 and 10, respectively at various bias. A remarkable dependence is observed for both ε1 and ε2. The behavior of both ε1 and ε2 is nearly reliable in the temperature range of 223−363 K. The increasing of the ε1 and ε2 with the temperature can be attributed to the thermal motivation of the dipoles and increasing of the orientational polarization as the temperature increase [39]. The decrease of ε1 and ε2 with frequency at various temperature and bias voltage can be due to the influence of whole types of polarizability at a lower frequency, but when the frequency increase, the type of orientational polarization can not sufficiently contribute and reduced, and consequently the dielectric contents decrease [40].
the negative capacitance at higher temperature region (i.e. 303−343 K), a little change is observed in all regions, but the higher influence of temperature is return with remarkable change at 363 K. For the temperature dependence of conductance measurements (Fig. 8(a) and (b)), the increase of conductance with increasing temperature is also detected, especially at higher temperature region (i.e. 303−363 K). Moreover, both capacitance and conductance decrease with increasing the applied frequency and tends to saturation at enough high applied bias. This behavior can be explained by the capability of the charge carrier to follow the signal of ac at lower applied frequency but at the high applied frequency, the charges cannot obey the ac signal [38]. The frequency and temperature dependences of both real (ε1) and
Fig. 7. (a) Plot of capacitance, C vs. ln f at different temperatures and (b) Plot of capacitance, C vs. ln f at different bias voltages at different frequencies of Au/GO/pSi/Al heterojunction device. 4
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Fig. 8. (a) Plot of capacitance, C vs ln f at different temperatures and (b) Plot of capacitance, C vs. ln f at different bias voltages at different frequencies of Au/GO/pSi/Al heterojunction device.
Fig. 9. (a) Plot of real dielectric constant, ε1 vs. ln f at different temperatures and (b) Plot of real dielectric constant, ε1 vs. T at different bias voltages of Au/GO/p-Si/ Al heterojunction device.
shown in Fig. 12(a) and (b). High dependence of Rs is detected at a lower applied frequency and decreased with increasing frequency. This behavior can be discussed by considering that the trap charges have sufficient energy to get-away from the traps situated between metal and semiconductor interface of the bandgap of Si [41]. Accordingly, the behavior of Rs is significant for non-traditional diode characteristics. At high sufficiently applied bias, the value of series resistance showed a near saturation due to the inability of the interface states to follow the ac signal.
The series resistance is a very important parameter for device development and can be obtained from the capacitance and conductance measurements as observed from Figs. 11 and 12. These figures show a considerable dependence of series resistance on the bias voltage temperature and frequency. Fig.11(a) and (b) show the remarkable dependence of the Rs on both the bias and temperature. At a lower voltage, the series resistance is decreased as the voltage increases. At a certain negative voltage, the series resistance is increased with the increasing voltage. Under the influence of negative bias, the value of Rs increases with increasing bias and shows a characteristic peak, shifted with increasing temperature after which the Rs decrease with increasing positive voltage bias. Moreover, the value of Rs is measured as a function of frequency at various temperatures and bias, respectively as
3.4. Current density-voltage characteristics of GO-based device The current density-voltage characteristics at various temperature 5
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Fig. 10. (a) Plot of conductance, G vs ln f at different temperatures and (b) Plot of conductance, G vs. ln f at different bias voltages at different frequencies of Au/GO/ p-Si/Al heterojunction device.
Fig. 11. (a) Plot of real dielectric constant, ε1 vs. ln f at different temperatures and (b) Plot of real dielectric constant, ε1 vs. T at different bias voltages of Au/GO/pSi/Al heterojunction device.
in the range of 303−413 K are revealed in Fig. 13(a). The figure illustrates a diode-like characteristic with certain forward and reverse due to the formation of barrier and then the rectification ratio could be obtained and plotted as a function of voltage as shown in Fig. 13(b). The current-voltage characteristics can be explained under influence of thermionic emission in the presence of non-ideal factors like series resistance, Rs and shunt resistance Rsh with considering the following Eq. [42]
J = J0 [exp (
q V − JRs )(V − JRs ) − 1] + nkT Rsh
(1)
Where J0 is the reverse saturation current, n is the ideality factor and k is the Boltzmann's constant. The values of Rs and Rsh can be obtained by various methods. One of the easiest methods, depending on the determination of the junction resistance under forward and reverse bias as shown in Fig. 14(a). 6
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Fig. 12. (a) Plot of series resistance, Rs vs. ln f at different temperatures and (b) Plot of series resistance, Rs vs. ln f at a different bias voltage of Au/GO/p-Si/Al heterojunction device.
Fig. 13. (a) Plot of J-V characteristics and (b) Plot of rectification ration, RR vs. T of Au/GO/p-Si/Al heterojunction device.
mechanism, the double logarithmic plot of the forward J-V characteristics for each temperature was considered as shown in Fig. 15. The results of this figure can be explained in view of the relation of J = KVm [44], where K is a constant and m is an exponential used for expressing the mechanism type. Fig. 15 shows two distinct regions with different slopes depending on the value of applied voltage. The value of mwas distinguished from J-V slopes and found to be around unity in the first region, confirming the ohmic behavior at lower voltage bias. At a higher voltage region, the value of m gives an indication for the
Accordingly, the series resistance can be obtained from the saturation limitation value of the junction resistance under forwarding bias as shown in Fig. 14(a). The shunt resistance can also be obtained by the same method under reverse bias. The temperature dependences of both Rs and Rsh are shown in Fig.14(b). As seen from the figure, the decrease for both Rs and Rsh with increasing the temperature can be due to the initiation of the free charge carrier due to the braking of the bonder under influence of temperature [43]. To obtain information about the predominant conduction 7
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Fig. 14. (a) Plot of imaginary dielectric constant, ε2 vs. lnf at different temperatures and (b) Plot of imaginary dielectric constant, ε2 vs. ln f at a different bias voltage of Au/GO/p-Si/Al heterojunction device.
Fig. 16. (a) Plot of series resistance, Rs vs. ln f at different temperatures and (b) Plot of series resistance, Rs vs. ln f at a different bias voltage of Au/GO/p-Si/Al heterojunction device.
Fig. 15. (a) Plot of series resistance, Rs vs. V at different temperatures and (b) Plot of series resistance, Rs vs. T at a different bias voltage of Au/GO/p-Si/Al heterojunction device.
higher than unity which can be attributed to the combination of the recombination process of the charge carriers and/or the influence of series resistance [45]. In addition to the higher value of n, another characteristic for this parameter is the temperature dependence of n. Fig. 17 shows that the value of n decreases with increasing temperature, confirming the improvement of the device features. This behavior can be understood for the presence of inhomogeneous for the barrier accompanied with Gaussian distribution [46] added to the possibility of the recombination process. Comparable consequences have been stated by various authors in the literature [47,48]. On the side, the device barrier height has also temperature dependence as shown in Fig. 17. the figure revealed that the decrease of Φb as the temperature increase.
presence of the space charge limited conduction mechanism that controls the current. The values of m1 and m2 were plotted as a function of temperature and shown in Fig. 16. The results support the influence of temperature on the GO-based device parameters. According to the thermally activated heterojunction mechanism,the reverse current density can be expressed by the following Eq. [45]:
J0 = A* T 2 exp(
−qΦb ) kT
(2)
Where Φb is the barrier height of the device. The saturation currents density was extracted for each temperature from the linear part of the semilogarithmic plot of J-V characteristics (not shown here) at V = 0. Moreover, the ideality factor was estimated from the inverse slope of the semilogarithmic plot J-V characteristics. The obtained value of n is 8
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barrier height and including the standard deviation, σs. Accordingly, the apparent barrier height, Φap and apparent ideality factor, nap could be considered and expressed as follows [49–51]:
Φap = Φb exp( (
−qσ02 ) kT
(3)
qρ 1 − 1) = ρ0 − 2kT nap 1
(n
ap
(4)
The graphical representation of the temperature dependence of both − 1) and Φb is shown in Fig. 18(b) and (c), respectively. The non-
linearity of these two curves confirms the presence of thermionic emission accompanied by Gaussian distribution that caused the lateral distribution of barrier. Consequently, the combination of both Eqs. (2) and (3), the Richardson Eq. can be expressed as follows [51]: Fig. 17. (a) Plot of J-V characteristics and (b) Plot of rectification ration, RR vs. T of Au/GO/p-Si/Al heterojunction device.
ln (
q 2σ 2 qΦb J0 ) − ⎜⎛ 2 0 2 ⎟⎞ = ln (A*) − 2 kT T2 k T ⎝ ⎠
(5) q2σ02
J As a modification of Fig. 18 (a), the plot of ln ( 02 ) − ⎛ 2 2 ⎞ vs. T ⎝ 2k T ⎠ 1000/ T is represented in Fig. 18(d). The obtained straight-line fit gives another evidence for the presence of inhomogeneous barrier height with Gaussian distribution. The obtained results agree with those published for various devices [50,51].
The temperature behavior of both n and Φb indicates the presence of another distribution of barrier height called lateral due to the inhomogeneities of barrier height, called a patch. Several authors have discussed the presented behavior by using the same reasons and explanations [49–51]. To confirm the presence of lateral inhomogeneous of barrier height, the plot of J0/T2 vs. 1000/T, according to Eq. (2) is represented in Fig. 18(a). Accordingly, for the homogeneous barrier height, this representation should give a linear fit, but the results did not match with confirming Eq. (2). The presented bowing of the experimental results is suggested from the temperature dependence of both n and Φb due to the barrier inhomogeneities, and some fluctuation in the interface. This disposal can be clarified by considering a barrier height with a Gaussian distribution, through some suggested parameters like Φb0 for the mean
4. Conclusions This presented article was undertaken to design a simple and highly efficient GO-based device for various applications. The relevance of molecular, crystal and morphology characterization are clearly supported by the FTIR, X-ray diffraction and scanning electron microscopy. The analysis of the dielectric properties assumed here has extended our knowledge of the presence of negative capacitance that gives a new
Fig. 18. (a) Plot of junction resistance,Rj vs.V and (b) Plot of Rs and Rsh vs. T of Au/GO/p-Si/Al heterojunction device. 9
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trend of study for the possibility of inductive performance of some devices like GO-based devices and explained on the basis of leakage of charges at the interface state and/or to the influence of series resistance. Moreover, the GO-based device specifies a non-ideal manifestation for the J-V characteristics due to the existence of inhomogeneous barrier height as a result of inhomogeneous characteristics of the GO/p-Si interface. A greater focus on Go-based devices could produce interesting findings that account more for the extensive-term permanency of the prepared devices and widespread use in various microelectronic implementations.
[21]
[22]
[23]
[24]
[25]
Acknowledgment [26]
This work was reinforced by the facilities of Solid-State Electronics Laboratory, Solid State Physics Department and Microwave Physics and Dielectrics Department (National Research Center, NRC), Physics Department, Jouf University and, Ain Shams University.
[27]
[28]
Appendix A. Supplementary data [29]
Supplementary material related to this article can be found, in the online version, at doi:https://doi.org/10.1016/j.synthmet.2020. 116303.
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Chung, Chemical functionalization of graphene sheets by solvothermal reduction of a graphene oxide suspension in N-methyl-2-pyrrolidone, J. Mater. Chem. 21 (2011) 3371–3377. C. Nethravathi, M. Raajmahal, Chemically modified graphene sheets produced by the solvothermal reduction of colloidal dispersions of graphite oxide, Carbon 46 (2008) 1994–1998. M. Sahoo, R.P. Antony, T. Mathews, S. Dash, A.K. Tyagi, Solid state physics: proceedings of the 57th DAE solid state physics symposium 2012, AIP Conf. Proc. 1512 (2013) 1262–1263. M.A. Pimenta, G. Dresselhaus, M.S. Dresselhaus, L.G. Cançado, A. Jorio, R. Saito, Studying disorder in graphite-based systems by Raman spectroscopy, Phys. Chem. Chem. Phys. 9 (2007) 1276–1291. A.C. Ferrari, J.C. Meyer, V. Scardaci, C. Casiraghi, M. Lazzeri, F. Mauri, S. Piscanec, D. Jiang, K.S. Novoselov, S. Roth, A.K. Geim, Raman Spectrum of graphene and graphene layers, Phys. Rev. Lett. 97 (2006) 187401. Choi, S.W. Hwang, C. Sone, Size-dependence of Raman scattering from graphene quantum dots: interplay between shape and thickness, Appl. Phys. Lett. 102 (2013) 053108. S. Sagadevan, A.S. Sundaram, Dielectric Properties of lead sulphide thin films for solar cell applications, Chalcogenide Letters 11 (2014) 159–165. Ç. Bilkan, A. Gümüş, Ş. Altındal, The source of negative capacitance and anomalous peak in the forward bias capacitance-voltage in Cr/pSi Schottky barrier diodes (SBDs), Mat. Sci. Semicon. Proc 39 (2015) 484–491. H.G. Çetinkaya, S. Alialy, Ş. Altındal, A. Kaya, İ. Uslu, Investigation of negative dielectric constant in Au/1% graphene (GP) doped- Ca1.9Pr0.1Co4Ox/n-Si structures at forwarding biases using impedance spectroscopy analysis, J. Mater. Sci. Mater. Electron. 26 (2015) 3186–3195. Ş. Altındal, H. Uslu, The origin of anomalous peak and negative capacitance in the forward bias C-V characteristics of Au/PVA/n-Si structures, J. Appl. Phys. 109 (2011) 074503. E. Arslan, Y. Şafak, Ş. Altındal, Ö. Kelekçi, E. Özbay, Temperature dependent negative capacitance behavior in (Ni/Au)/AlGaN/AlN/GaN heterostructures, J. NonCryst. Solids 306 (2010) 1006–1011. C.C. Wang, G.Z. Liu, M. He, H.B. Lu, Low-frequency negative capacitance in La0.8Sr0.2MnO3/Nb-doped SrTiO3 heterojunction, Appl. Phys. Lett. 92 (2008) 052905. C.Y. Zhu, L.F. Feng, C.D. Wang, H.X. Cong, G.Y. Zhang, Z.J. Yang, Z.Z. Chen, Negative capacitance in light-emitting devices, Solid-State Electron. 53 (2009) 324–328. I.S. Yahia, A.A.M. Farag, F. Yakuphanoglu, W.A. Farooq, Temperature dependence of electronic parameters of organic Schottky diode based on fluorescein sodium salt, Synthetic Met 161 (2011) 881–887. M. Nasir, M. Zulfequar, Dc conductivity and dielectric behavior of glassy Se100–x Znx alloy, Open J. Inorg. Non-met. Mat. 2 (2012) 11–17. M.M. Shehata, T.G. Abdel-Malik, K. Abdelhady, AC impedance spectroscopy on Al/ p-Si/ZnTPyP/Au heterojunction for hybrid solar cell applications, J. Alloys. Compd. 736 (2018) 225–235. D. Korucu, A. Turut, Ş. Altındal, The origin of negative capacitance in Au/n-GaAs Schottky barrier diodes (SBDs) prepared by photolithography technique in the wide frequency range, Curr. Appl. Phys. 13 (2013) 1101–1108. S.M. Sze, Physics of Semiconductor Devices, second ed., John Wiley & Sons, New York, 1981. Ö. Demircioglu, Ş. Karataş, N. Yıldırım, Ö.F. Bakkaloglu, Effects of temperature on series resistance determination of electrodeposited Cr/n-Si/Au–Sb Schottky structures, Microelectron. Eng. 88 (2011) 2997–3002. B. Gunduz, I.S. Yahia, F. Yakuphanoglu, Electrical and photoconductivity properties of p-Si/P3HT/Al and p-Si/P3HT: MEH-PPV/Al organic devices: a comparison study, Microelectron. Eng. 98 (2012) 41–57. M. Campos, L.O.S. Bulhoes, C.A. Lindino, Gas-sensitive characteristics of metal/ semiconductor polymer Schottky device, Sens. Actuators A Phys. 87 (2000) 67–71. B. Gunduz, I.S. Yahia, F. Yakuphanoglu, Electrical and photoconductivity properties of p-Si/P3HT/Aland p-Si/P3HT: MEH-PPV/Al organic devices: a Comparison study, Microelectron. Eng. 98 (2012) 41–57. M.K. Hudait, S.P. Venkateswarlu, S.B. Krupanidhi, Electrical transport characteristics of Au/n-GaAs Schottky diodes on n-Ge at low temperatures, Iee J. Solidstate Electron Devices 45 (2001) 133–141. Ş. Karataş, Ş. Altındal, A. Türüt, A. Özmen, Temperature dependence of characteristic parameters of the-terminated Sn/p-Si (1 0 0) Schottky contacts, Appl. Surf. Sci. 217 (2003) 250–260. H. Çetin, E. Ayyildiz, On barrier height inhomogeneities of Au and Cu/n-InP Schottky contacts, Physica B Condens. Matter 405 (2010) 559–563. D. Korucu, H. Efeoglu, A. Turut, S. Altindal, Mater. Sci. Semicond. Process. 15 (2012) 480–485. G. Güler, Ş. Karataş, Ö. Güllü, Ö.F. Bakkaloğlu, The analysis of the lateral distribution of barrier height in identically prepared Co/n-Si Schottky diodes, J. Alloys Compd. 486 (2009) 343–347.
Contents lists available at ScienceDirect
Synthetic Metals journal homepage: www.elsevier.com/locate/synmet
Enhancement of electrical and dielectrically performance of graphene-based promise electronic devices
T
A. Asherya, A.A.M. Faragb,c,*, M.A. Moussad, G.M. Turkyd a
Solid State Electronics Laboratory, Solid State Physics Department, Physics Division, National Research Centre, Dokki, Giza, 12622, Egypt Physics Department, Faculty of Science and Arts, Jouf University, Saudi Arabia c Thin Films Laboratory, Physics Department, Faculty of Education, Ain Shams University, Roxy, Cairo, 11757, Egypt d Microwave Physics and Dielectrics Department, National Research Centre, Dokki, Giza, 12622, Egypt b
A R T I C LE I N FO
A B S T R A C T
Keywords: Graphene oxide Dielectric properties Negative capacitance Temperature sensor
The presented article findings indicate an efficient method for obtaining graphene oxide and its enhancement for electronic devices. The structural checking for confirming the molecular, crystalline and morphology characterization was carefully included. The measurement of the dielectric characteristics was considered in a wide range of voltage bias, temperature, and frequency for obtaining valuable evidence about the electrical storage and dissipation properties of the device for prospective applications. The measured dielectric parameters showed a dispersion attitude under the influence of all the studied factors. The results confirmed a reduction in both capacitance and conductance with increasing the applied frequency. Remarkably, a negative capacitance influence was also detected in the studied frequency range in wholly investigated devices. The deviations in the dielectric behavior could be attributed to the rearrange of charges at the GO/Si interface and to the influence of series resistance. Additionally, the current-density voltage characteristics were investigated under influence of temperature to provide the option for the diode as a temperature sensor. Accordingly, the GO-based heterojunction provided the projections to produce low cost with a wide scale of device applications.
1. Introduction
electronic devices [10,11]. The capacitance measurements have been considered in the present study, and a remarkable negative capacitance is detected under the influence of frequency, bias voltage and temperatures. Negative capacitance is a non-traditional phenomenon (transient) proposed by Salahuddin and Datta [12] for ferroelectric-based materials to exchange the gate oxide of the device by a negative capacitance. This negative capacitance material might benefit from dropping the supply voltage (low-power operation) and hereafter energy dissipation in the traditional transistors [13]. This phenomenon can be observed in several insulators and semiconducting-based like p-n junctions, metal/semiconductor, metal/insulator/semiconductor as well as a photodetector and light-emitting diodes [14–16]. The observation of negative capacitance for graphene-based devices was published by various authors [17–19]. Moreover, Yalcin and Yakuphanoglu [17] have studied the voltage and frequency dependence of negative capacitance performance in Graphene-TiO2 based devices. Moreover, Fan et al. [18] have studied the electrical and dielectric properties of graphene/PPScomposites and investigated the negative permittivity in the region of the radio frequency. In addition, Chiolerio et al. [19] have studied the
There is evidence that graphene plays a crucial role in various scopes in industry, like energy storage batteries, catalysis, nanocomposite materials, biomedical enforcement, catalysis in chemical reactions as well as extremely uses and employment is portrayed in the literature [1–3]. These applications owing to the superior characteristics of GO, like the easiest property for dispersing in various solvents such as water, organic solvents, and many different matrixes which are very important for improving the electrical and mechanical characteristics of ceramics and polymer matrices. The other main property is the capability for chemical modification of the GO for the preferred prospective applications [4–6]. The property of dispersibility of GO in various solvents gives an opportunity for the deposition of this structure on the various substrate in the shape of thin films by utilizing easy methods like drop-casting, spin coating, Langmuir-Blodgett deposition, and vacuum filtration and other possible fabrication techniques [7–9]. Particularly, GO thin films have great attention because of their prospective use in an expansive scope of utilizations which incorporate flexible as well as various
⁎
Corresponding author. E-mail address: [email protected] (A.A.M. Farag).
https://doi.org/10.1016/j.synthmet.2020.116303 Received 13 November 2019; Received in revised form 11 January 2020; Accepted 14 January 2020 0379-6779/ © 2020 Elsevier B.V. All rights reserved.
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Fig. 1. (a) SEM image for the surface morphology of the GO sample, and (b) surface profile of the GO sample.
confirmed by FTIR, Raman spectrum as well as an X-ray diffraction pattern. After finishing the preparation process, the front and back ohmic contacts were prepared using pure Au and Al, respectively, by means of evaporator system type E306 A, Edwards Co., England.
impedance characteristics of the inkjet-printed graphene-based nanocomposites(reduced Graphene oxide, RGO/ poly polystyrene sulfonate, PSS/polyaniline, PANI). They investigated the operation of the prepared devices with negative and positive capacitance depending on the application frequency. The high-frequency negative capacitance and the other impedance hyperbolicity were recorded. Moreover, they discussed the negative capacitance based on the theory of the standard space charge accumulation. To date, only a limited number of graphene oxides have been identified for study the dielectric characteristics, especially the negative capacitance, as well as the electrical properties in a device structure, prepared by a simple and high efficient technique as compared with the well-known technique. Due to practical constraints, this paper cannot provide a comprehensive review of GO, but the main objective concerns the practice results of the main dielectric and electrical characteristics of GO-based devices. The overall structure of the study takes the form of three parts, including the preparation of highly efficient GO thin films by a simple technique. The second part containing the investigation of molecular, morphological and crystalline structure characterization as a first part. The third part includes the electrical characteristics, considering the properties of the negative capacitance. The final part comprises the electrical characteristics and its significant parameters for the obtainability of electronic device applications.
2.2. Characterizing appliances The crystalline structure identification was performed utilizing the X-ray diffraction tool, type Philips X’Pert Pro MRD, using a source of radiation of Cu Kα. The morphological micrographs of the films were acquired by using a Zeiss Ultra 60 FESEM. The dielectric achievement properties were obtained by E4991B impedance analyzer (Key Sight Co., USA), for the applied frequency range up to 7 MHz, temperature range of 323–363 K and a bias voltage of −2 to +2 V. The current-voltage properties of the device were achieved by using Keithley 2635 A electrometer. 3. Results and discussion 3.1. Structural characteristics of GO film The field-emission microscopy image of GO film with a magnification of 120.000x is shown in Fig. 1(a). The morphology indicates a high agglomeration of nanoparticles in various orientations. Moreover, some points of distortion were observed which can be caused by the occurrence of unwarranted solidification regions throughout the substrates. In addition, the image shows a ribbon-like structure oriented in various directions, each of them consists of several nanoparticles of GO. The presence of GO nanoparticles can control the physical characteristics of the prepared films and influences the dielectric and electrical properties of prepared films [21]. The distribution of some altitudes of the GO surface roughness profile is revealed in Fig. 1(b). The profile gives information about the distinctive roughness of the surface, especially in some regions. This roughness can affect the quality of both optical and electrical properties as well as the mechanical properties of the prepared films [22]. The crystalline structure-property of the prepared GO thin film is observed in Fig. 2. As detected from the figure that the GO films show a characteristic abroad peak (001) in agreement with those published for GO [23]. The broad peak indicates the nanostructure characteristics with crystal size determined using the well-known Sherer's formula and found to about 7 nm. The results of the FTIR of GO thin films is observed in Fig. 3. Several oxygen formations in the structure comprise the vibration styles at 915 cm−1 can be assigned to COeH vibration, while the peak at 1420 cm−1 can be interpreted to sp 2 -hydride CC. The vibration at 1800 cm]−1
2. Experimental procedure 2.1. Preparation of graphene oxide films All the organic chemicals used in this article were purchased from Sigma–Aldrich Co (≥95 % purity). without any additional refinement. To prepare the GO/p-Si junction structure, firstly, the silicon substrates were carefully washed and etched using the well-known HF-based solution (Etching solution having HF (48 %): C2H5OH (98 %) = 1:4 by volume ratio) followed by a flow of nitrogen gas for the drying process. Secondly, a thin film of poly (vinyl chloride) PVA was deposited by a spin coating technique on the pre-cleaned Si substrate as a source of GO. In which, a 0.5 M of PVA was dissolved in 10 ml of dissolved in tetrahydrofuran(THF) as a suitable solvent [20]. A homogeneous PVA solution was obtained by continuous stirring using a magnetic stirrer at 343 K. The spin coating condition was started by the low rate of 500 rpm for 60 s and gradually increased to 1000 rpm for 60 s and repeated various times for controlling the thickness of the deposited PVA layer. After finishing the deposition process, the drying of the film was made in an oven of 373 K to remove all the organic solvent contaminations. Finally, the samples of PVA/Si structure were maintained at temperature 200C° for 30 min in an electric oven and then increased to 500 C° to ensuring the complete conversion of PVA to graphene oxide as 2
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distinguishing of crystalline GO and confirming the occurrence of sp2 sites with stretching modes [27–30]. The presence of 2D peak is characterized as a second-order peak which can be owing to the existence of zone-boundary phonons in GO, detected only in the condition of resonance [27–29]. 3.2. Schematic energy band diagram of GO-based device The proposed structure diagram of the prepared GO-based device is illustrated in Fig. 5 with the upper electrode (Au) and the bottom one (Al) which confirming a nearly ohmic contact for GO and p-Si, respectively. This was done from the results of the metal-semiconductor I–V behavior of each material with the contact and obtaining a linear fit with satisfactory ohmic resistance in each case. Moreover, the structure of Au/GO/Si/Al is signified in the energy diagram, revealed in Fig. 6. Consequently, the barrier can construct only at the interface of GO/Si and then the resulted current is nonlinear due to the formation of the depletion region.
Fig. 2. (a) X-ray diffraction patterns GO film.
3.3. Dielectric characteristics of GO-based device The dielectric characteristics are very important for the elucidation of numerous phenomena in solid-state physics and other optical, biomedical and device applications due to the assessment of its expected behavior [18,31]. The measurements of both capacitance and conductance as a function of bias, frequency, and temperature are shown in Figs. 7 and Fig. 8, respectively. The measurements were done under the bias range of −2 to +2 V. The temperature dependence was achieved in the range of 223−363 K as well as the frequency dependence in the various frequency range up to 6 MHz for the GO-based devices. The curves also indicate that both C and G are powerfully influenced by the bias voltage, temperature, and frequency. The main observable phenomenon is the negative capacitance observation for all the measured capacitance under all the applied conditions. The observation of the negative capacitance was published elsewhere for various structures including organic and inorganic based-devices [32–33]. Various authors tried to explain the mechanism based on the injection of the contact at the metal/semiconductor and the nature of the interface states and/or the influence of series resistance [34–35]. But the others supposed that the negative capacitance created from the insertion of charge carriers that includes a hopping process to localized interface traps/states and then the trap charges have enough energy to transient at the metal and semiconductor interface [36–37]. The values of negative capacitance increase with increasing the applied bias in both accumulation and depletion region but decreases in the inversion region at low temperature from 223 to 273 K as shown in Fig. 7(a) and (b). Otherwise,
Fig. 3. FTIR spectrum of GO film.
can be assigned to a ketonic group (CO). While the weak peaks at 2450 cm]−1 and 2750 cm−1 can be assigned to C–H and finally the peak at 3150 cm−1 can be due to −OH stretching vibrations. The obtained results are in agreement with those published by various authors [24–26]. The Raman spectrum of GO thin films is illustrated in Fig.4. The observed peaks at ∼ 1570 cm−1 (G-Peak). The Raman spectrum of the prepared GO, shown in Fig. 4(a) and (b), produces a peak at ̴ 1388.6 cm−1 (called D peak), a sharp band at ̴ 1613 cm−1 (called G peak), and another peak at 2719 cm−1 (called 2D peak). A peak centred at 1388.6 cm−1 (D peak) can be assigned to the presence of short-range periodicity owing to the occurrence of the disorder in the structure as well as confirming the existence of sp2 sites in the rings with breathing mode [27–29]. The G peak can be allocated to the first-order Raman mode
Fig. 4. (a) and (b) Raman spectrum of GO film with fitting. 3
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Fig. 5. Schematic diagram of the Au/GO/p-Si/Al heterojunction device.
Fig. 6. Energy band diagram of the Au/GO/p-Si/Al heterojunction device.
imaginary (ε2) dielectric constants are revealed in Figs. 9 and 10, respectively at various bias. A remarkable dependence is observed for both ε1 and ε2. The behavior of both ε1 and ε2 is nearly reliable in the temperature range of 223−363 K. The increasing of the ε1 and ε2 with the temperature can be attributed to the thermal motivation of the dipoles and increasing of the orientational polarization as the temperature increase [39]. The decrease of ε1 and ε2 with frequency at various temperature and bias voltage can be due to the influence of whole types of polarizability at a lower frequency, but when the frequency increase, the type of orientational polarization can not sufficiently contribute and reduced, and consequently the dielectric contents decrease [40].
the negative capacitance at higher temperature region (i.e. 303−343 K), a little change is observed in all regions, but the higher influence of temperature is return with remarkable change at 363 K. For the temperature dependence of conductance measurements (Fig. 8(a) and (b)), the increase of conductance with increasing temperature is also detected, especially at higher temperature region (i.e. 303−363 K). Moreover, both capacitance and conductance decrease with increasing the applied frequency and tends to saturation at enough high applied bias. This behavior can be explained by the capability of the charge carrier to follow the signal of ac at lower applied frequency but at the high applied frequency, the charges cannot obey the ac signal [38]. The frequency and temperature dependences of both real (ε1) and
Fig. 7. (a) Plot of capacitance, C vs. ln f at different temperatures and (b) Plot of capacitance, C vs. ln f at different bias voltages at different frequencies of Au/GO/pSi/Al heterojunction device. 4
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Fig. 8. (a) Plot of capacitance, C vs ln f at different temperatures and (b) Plot of capacitance, C vs. ln f at different bias voltages at different frequencies of Au/GO/pSi/Al heterojunction device.
Fig. 9. (a) Plot of real dielectric constant, ε1 vs. ln f at different temperatures and (b) Plot of real dielectric constant, ε1 vs. T at different bias voltages of Au/GO/p-Si/ Al heterojunction device.
shown in Fig. 12(a) and (b). High dependence of Rs is detected at a lower applied frequency and decreased with increasing frequency. This behavior can be discussed by considering that the trap charges have sufficient energy to get-away from the traps situated between metal and semiconductor interface of the bandgap of Si [41]. Accordingly, the behavior of Rs is significant for non-traditional diode characteristics. At high sufficiently applied bias, the value of series resistance showed a near saturation due to the inability of the interface states to follow the ac signal.
The series resistance is a very important parameter for device development and can be obtained from the capacitance and conductance measurements as observed from Figs. 11 and 12. These figures show a considerable dependence of series resistance on the bias voltage temperature and frequency. Fig.11(a) and (b) show the remarkable dependence of the Rs on both the bias and temperature. At a lower voltage, the series resistance is decreased as the voltage increases. At a certain negative voltage, the series resistance is increased with the increasing voltage. Under the influence of negative bias, the value of Rs increases with increasing bias and shows a characteristic peak, shifted with increasing temperature after which the Rs decrease with increasing positive voltage bias. Moreover, the value of Rs is measured as a function of frequency at various temperatures and bias, respectively as
3.4. Current density-voltage characteristics of GO-based device The current density-voltage characteristics at various temperature 5
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Fig. 10. (a) Plot of conductance, G vs ln f at different temperatures and (b) Plot of conductance, G vs. ln f at different bias voltages at different frequencies of Au/GO/ p-Si/Al heterojunction device.
Fig. 11. (a) Plot of real dielectric constant, ε1 vs. ln f at different temperatures and (b) Plot of real dielectric constant, ε1 vs. T at different bias voltages of Au/GO/pSi/Al heterojunction device.
in the range of 303−413 K are revealed in Fig. 13(a). The figure illustrates a diode-like characteristic with certain forward and reverse due to the formation of barrier and then the rectification ratio could be obtained and plotted as a function of voltage as shown in Fig. 13(b). The current-voltage characteristics can be explained under influence of thermionic emission in the presence of non-ideal factors like series resistance, Rs and shunt resistance Rsh with considering the following Eq. [42]
J = J0 [exp (
q V − JRs )(V − JRs ) − 1] + nkT Rsh
(1)
Where J0 is the reverse saturation current, n is the ideality factor and k is the Boltzmann's constant. The values of Rs and Rsh can be obtained by various methods. One of the easiest methods, depending on the determination of the junction resistance under forward and reverse bias as shown in Fig. 14(a). 6
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Fig. 12. (a) Plot of series resistance, Rs vs. ln f at different temperatures and (b) Plot of series resistance, Rs vs. ln f at a different bias voltage of Au/GO/p-Si/Al heterojunction device.
Fig. 13. (a) Plot of J-V characteristics and (b) Plot of rectification ration, RR vs. T of Au/GO/p-Si/Al heterojunction device.
mechanism, the double logarithmic plot of the forward J-V characteristics for each temperature was considered as shown in Fig. 15. The results of this figure can be explained in view of the relation of J = KVm [44], where K is a constant and m is an exponential used for expressing the mechanism type. Fig. 15 shows two distinct regions with different slopes depending on the value of applied voltage. The value of mwas distinguished from J-V slopes and found to be around unity in the first region, confirming the ohmic behavior at lower voltage bias. At a higher voltage region, the value of m gives an indication for the
Accordingly, the series resistance can be obtained from the saturation limitation value of the junction resistance under forwarding bias as shown in Fig. 14(a). The shunt resistance can also be obtained by the same method under reverse bias. The temperature dependences of both Rs and Rsh are shown in Fig.14(b). As seen from the figure, the decrease for both Rs and Rsh with increasing the temperature can be due to the initiation of the free charge carrier due to the braking of the bonder under influence of temperature [43]. To obtain information about the predominant conduction 7
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Fig. 14. (a) Plot of imaginary dielectric constant, ε2 vs. lnf at different temperatures and (b) Plot of imaginary dielectric constant, ε2 vs. ln f at a different bias voltage of Au/GO/p-Si/Al heterojunction device.
Fig. 16. (a) Plot of series resistance, Rs vs. ln f at different temperatures and (b) Plot of series resistance, Rs vs. ln f at a different bias voltage of Au/GO/p-Si/Al heterojunction device.
Fig. 15. (a) Plot of series resistance, Rs vs. V at different temperatures and (b) Plot of series resistance, Rs vs. T at a different bias voltage of Au/GO/p-Si/Al heterojunction device.
higher than unity which can be attributed to the combination of the recombination process of the charge carriers and/or the influence of series resistance [45]. In addition to the higher value of n, another characteristic for this parameter is the temperature dependence of n. Fig. 17 shows that the value of n decreases with increasing temperature, confirming the improvement of the device features. This behavior can be understood for the presence of inhomogeneous for the barrier accompanied with Gaussian distribution [46] added to the possibility of the recombination process. Comparable consequences have been stated by various authors in the literature [47,48]. On the side, the device barrier height has also temperature dependence as shown in Fig. 17. the figure revealed that the decrease of Φb as the temperature increase.
presence of the space charge limited conduction mechanism that controls the current. The values of m1 and m2 were plotted as a function of temperature and shown in Fig. 16. The results support the influence of temperature on the GO-based device parameters. According to the thermally activated heterojunction mechanism,the reverse current density can be expressed by the following Eq. [45]:
J0 = A* T 2 exp(
−qΦb ) kT
(2)
Where Φb is the barrier height of the device. The saturation currents density was extracted for each temperature from the linear part of the semilogarithmic plot of J-V characteristics (not shown here) at V = 0. Moreover, the ideality factor was estimated from the inverse slope of the semilogarithmic plot J-V characteristics. The obtained value of n is 8
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barrier height and including the standard deviation, σs. Accordingly, the apparent barrier height, Φap and apparent ideality factor, nap could be considered and expressed as follows [49–51]:
Φap = Φb exp( (
−qσ02 ) kT
(3)
qρ 1 − 1) = ρ0 − 2kT nap 1
(n
ap
(4)
The graphical representation of the temperature dependence of both − 1) and Φb is shown in Fig. 18(b) and (c), respectively. The non-
linearity of these two curves confirms the presence of thermionic emission accompanied by Gaussian distribution that caused the lateral distribution of barrier. Consequently, the combination of both Eqs. (2) and (3), the Richardson Eq. can be expressed as follows [51]: Fig. 17. (a) Plot of J-V characteristics and (b) Plot of rectification ration, RR vs. T of Au/GO/p-Si/Al heterojunction device.
ln (
q 2σ 2 qΦb J0 ) − ⎜⎛ 2 0 2 ⎟⎞ = ln (A*) − 2 kT T2 k T ⎝ ⎠
(5) q2σ02
J As a modification of Fig. 18 (a), the plot of ln ( 02 ) − ⎛ 2 2 ⎞ vs. T ⎝ 2k T ⎠ 1000/ T is represented in Fig. 18(d). The obtained straight-line fit gives another evidence for the presence of inhomogeneous barrier height with Gaussian distribution. The obtained results agree with those published for various devices [50,51].
The temperature behavior of both n and Φb indicates the presence of another distribution of barrier height called lateral due to the inhomogeneities of barrier height, called a patch. Several authors have discussed the presented behavior by using the same reasons and explanations [49–51]. To confirm the presence of lateral inhomogeneous of barrier height, the plot of J0/T2 vs. 1000/T, according to Eq. (2) is represented in Fig. 18(a). Accordingly, for the homogeneous barrier height, this representation should give a linear fit, but the results did not match with confirming Eq. (2). The presented bowing of the experimental results is suggested from the temperature dependence of both n and Φb due to the barrier inhomogeneities, and some fluctuation in the interface. This disposal can be clarified by considering a barrier height with a Gaussian distribution, through some suggested parameters like Φb0 for the mean
4. Conclusions This presented article was undertaken to design a simple and highly efficient GO-based device for various applications. The relevance of molecular, crystal and morphology characterization are clearly supported by the FTIR, X-ray diffraction and scanning electron microscopy. The analysis of the dielectric properties assumed here has extended our knowledge of the presence of negative capacitance that gives a new
Fig. 18. (a) Plot of junction resistance,Rj vs.V and (b) Plot of Rs and Rsh vs. T of Au/GO/p-Si/Al heterojunction device. 9
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trend of study for the possibility of inductive performance of some devices like GO-based devices and explained on the basis of leakage of charges at the interface state and/or to the influence of series resistance. Moreover, the GO-based device specifies a non-ideal manifestation for the J-V characteristics due to the existence of inhomogeneous barrier height as a result of inhomogeneous characteristics of the GO/p-Si interface. A greater focus on Go-based devices could produce interesting findings that account more for the extensive-term permanency of the prepared devices and widespread use in various microelectronic implementations.
[21]
[22]
[23]
[24]
[25]
Acknowledgment [26]
This work was reinforced by the facilities of Solid-State Electronics Laboratory, Solid State Physics Department and Microwave Physics and Dielectrics Department (National Research Center, NRC), Physics Department, Jouf University and, Ain Shams University.
[27]
[28]
Appendix A. Supplementary data [29]
Supplementary material related to this article can be found, in the online version, at doi:https://doi.org/10.1016/j.synthmet.2020. 116303.
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