EPROM Testing—Part I: Theoretical considerations

techniques to characterize and design these nonplanar " Mieroelectronics J. 14 (1), 43 (1983) device features is a major goal of the research on IC A n attempt has been made to correlate the interface process modelling and simulation. Simulation is well state characteristics of the GaN/GaAs MIS structure accepted as a means of optimizing individual lithography, with the composition at the interface as obtained from etching, and deposition processes. It is also well suited for Auger spectroscopy. The considerably reduced interface studying the complex tradeoffs between conflicting state density of nitrogen annealed samples is due to the physical mechanisms in the context of complete multistep reduction of the oxygen content and the corresponding process sequences. The success of modelling and simula- increase of the nitrogen content at the GaAs/GaN intertion has created a demand for more extensive models face. The interface state density for this MIS structure and new applications. IC process modelling and simula- shows a two peaked distribution and is characterized by tion will not only contribute heavily to technology design a much lower interface state density in the upper half of but also offers a potential window through the layout the band gap in comparison with native oxides and'other rule bottleneck for complete design insight and deposited insulators. optimization. Automatic hardware synthesis SAJJAN G. SHIVA Proe. I E E E 71 (1), 76 (1983) The complexity of the circuit that can fit on an integrated circuit (IC) chip has reached the level of a million transistors with the advant of Very-Large-Scale Integration (VSLI). Several automatic synthesissystems have evolved that "aid" the human designer in managing this complexity. This paper surveys such efforts. The synthesis is viewed as the process of transforming a high-level design specification into a lower level design specification that includes more structural details, leading to the physical design of the IC. The characteristics of ten automatic synthesis systems are summarized. Managing VLSI complexity: an outlook C A R L O H. SEQUIN Proe. IEEE 71 (1), 149 (1983) The nature of complexity in the context of VLSI circuits is examined, and similarities with the complexity problem in large software systems are discussed. Lessons learned in software engineering are reviewed, and the applicability to VLSI systems design is investigaed. Additional difficulties arising in integrated circuits such as those resulting from their two-dimensionality and from the required interconnectioas are discussed. The positive aspects of VLSI complexity as a way to increase performance and reduce chip size are reviewed. With this discussion as a basis, the evolution of VLSI system design environments is outlined for the nearterm, medium-term, and long-term future. The changing role of the designer is discussed. Recommendations are made for enhancements to our engineering curriculums which would provide the next generation of designers with skills relevant to managing VLSI complexity. Specifying multilayer circuit boards to meet the demands of VLSI N E A L HALES Electronics, 157 (10 February 1983) By understanding the impact of increased chip densities and speeds on multilayer designs, engineers can produce cost-effective boards. Passivatlon of gallium arsenside by reactively sputtered gallium nitride thin films A. B. B H A T T A C H A R Y Y A and E. LAKSHMI

Diffusion characteristics of antimony and phosphorus spin*on sources P. M. P R A S A D and V. P. SUNDARSINGH Microelectron. J. 14 (1), 49 (1983) Antimony and phosphorous spin-on sources were developed and the different structures were characterized. The effect of different ambients on the diffusion of both the elements into silicon was investigaed. It was observed that in N2 ambient, Sb20~ was reduced and SiO2 formed at the interface reduced the diffusion of Sb into silicon. In 0 2 ambient, at 1200~ the oxidation rate of the Si surface competes with the diffusion process resulting in lower surface concentration. Increase in prebaking temperature was found to increase the sheet resistance of antimony diffused samples. From thermo-dynamie calculations it is shown that there is a greater probability for the reduction of SbzO3 at lower temperatures than at higher temperatures.

4. Testing EPROM Testing- Part h Theoretical considerations S. ALLINEY, F. FANTINI and C. MORANDI Microelectron. Relia. 22 (5), 965 (1982) Testing may be more expensive for EPROMs than for other memories, because program and erasure cycles are much longer than read cycles, and therefore the test procedure must not include more than one program and one erasure step. In this paper E P R O M opertion is modelled by a sequential machine whose state and output equations are derived according to boolean matrix algebra. The choice and the effectiveness of the the patterns used to fill the memory are discussed, with reference to appropilate fault models. Two kinds of faults are considered: "stuck-at" bits in the memory matrix and "symmetric decoder faults", i.e. faults which cause the same behaviour during R E A D and PROGRAM operations. The nature of the faults which may escape the proposed sequence of test patterns is determined by analytical considerations, and qualitative results of detection effectiveness are obtained by Monte Carlo simulations. EPROM Testing- Part l h Application to 16k N-channel devices S. ALLINEY, D. BERTOTTI, F. FANTINI and C. MORANDI. 61