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Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection
MR-12082; No of Pages 4 Microelectronics Reliability xxx (2016) xxx–xxx
Contents lists available at ScienceDirect
Microelectronics Reliability journal homepage: www.elsevier.com/locate/mr
Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection Wonwook Oh a, Junhee Kim a, Byungjun Kang a, Soohyun Bae b, Kyung Dong Lee b, Hae-Seok Lee b, Donghwan Kim b,⁎, Sung-Il Chan a,⁎ a b
Electronic Convergence Material & Device Research Center, Korea Electronics Technology Institute, Seongnam 13509, Republic of Korea Department of Materials Science and Engineering, Korea University, Seoul 02841, Republic of Korea
a r t i c l e
i n f o
Article history: Received 30 June 2016 Accepted 8 July 2016 Available online xxxx Keywords: Potential induced degradation Na fault injection PV modules p-Type crystalline solar cells
a b s t r a c t Photovoltaic (PV) modules are exposed to high-voltage stress between grounded module frames and solar cells, a configuration called potential-induced degradation (PID). Since PID mainly depends on the solar cells used for module packaging, several steps for PID tests can be omitted. We carried out PID tests on the cell level with Na fault injection in accordance with IEC 62804 and examined the extent of PID with saturation current density (J02) extracted from I–V measurements in the dark. Na-fault injection is a reasonable means for performing PID tests on the cell level without module packaging. © 2016 Elsevier Ltd. All rights reserved.
1. Introduction
2. Experimental
Potential-induced degradation (PID) in p-type-based crystalline Si photovoltaic (PV) modules has emerged as a reliability issue since Solon first reported it in 2010 [1]. The Na ions present in encapsulation glass move from the glass toward the surface of the cell due to the potential difference between the frame and the solar cells; this leads to shunting of the p-n junction at its stacking faults [2,3]. In order to suppress PID, the PV modules are manufactured with encapsulants, such as polyolefin or ethylene vinyl acetate (EVA), materials with high volume resistivity, or silicon nitride (SiNx), which result in a high refractive index [4–6]. As a result, many PV module manufacturers promote their products as PID-free, as they have passed the test sequences in accordance with the standards of the International Electrotechnical Commission (IEC). However, the IEC's standard testing cannot distinguish whether the solar cells or encapsulants used for module packaging are PID-resistive, but only whether they pass or fail the tests. In other words, we can avoid PID by using PID-resistive solar cells for module manufacturing. In this paper, we propose an easy and fast testing method without module packaging that evaluates the PID effect on the cell level via Na ion fault injection. We evaluated PID vulnerability on the cell- and module level for eight different commercialized solar cells and compared the values of the saturation current density (J02) extracted from the equation of the double diode model.
We carried out PID tests with eight different commercialized solar cells (five mono-crystalline solar cells: #3, #4, #5, #7, #8 and three multi-crystalline solar cells: #1, #2, #6) that were cut into 5 × 5 cm2 pieces. NaF was simultaneously evaporated for 20 min at 200 °C. The deposition thickness was about 24 nm. After laminating EVA on each of the pieces at 60 °C and Cu foil as electrodes on the front and back sides of each, we performed PID tests for 12 h under an applied bias of 1000 V. For comparison, the pieces with no NaF deposition were made into mini-modules and subjected to PID tests for 96 h under an applied bias of 1000 V at 60 °C, 85% relative humidity (RH). Commercialized EVA and glass were used for the module packaging. I–V measurements in the dark and under illumination were performed before and after the PID tests. Table 1 shows the information of 8 samples about type of solar cells, the thickness of the anti-reflection coatings (ARC) and refractive indices.
⁎ Corresponding authors. E-mail addresses: [email protected] (D. Kim), [email protected] (S.-I. Chan).
3. Results and discussion Fig. 1 illustrates the PID test structures on the cell and module levels, respectively. We deposited Na on the surface of the solar cell to investigate the cell-level PID effects of Na-fault injection, as shown in Fig. 1(a). Fig. 2(b) is the counterpart on the module level. Fig. 2 shows the normalized power drop under illumination and the saturated current density (J02) in the dark obtained by the above-mentioned two PID test structures. We carried out PID tests for 2, 4, 6, and 12 h on the cell level and 24, 48, 72, and 96 h on module level and
http://dx.doi.org/10.1016/j.microrel.2016.07.059 0026-2714/© 2016 Elsevier Ltd. All rights reserved.
Please cite this article as: W. Oh, et al., Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection, Microelectronics Reliability (2016), http://dx.doi.org/10.1016/j.microrel.2016.07.059
2
W. Oh et al. / Microelectronics Reliability xxx (2016) xxx–xxx
Table 1 Information of 8 commercialized solar cells. Samples number
Type of solar cells
Refractive index of ARC
Thickness of ARC
#1 #2 #3 #4 #5 #6 #7 #8
Multi Multi Mono Mono Mono Multi Mono Mono
76.0 78.1 74.4 70.9 71.8 77.6 83.0 81.5
2.04 2.13 2.08 2.09 2.08 2.05 2.05 2.09
performed I–V measurements under illumination (Fig. 2(a) and (b)) and in the dark (Fig. 2(c) and (d)) after the PID tests. The eight samples measured at both the cell and module levels can be classified into three groups; hence, we classified samples #1, #6, and #7 as Group 1; samples #2 and #8 as Group 2; and samples #3, #4, and #5 as Group 3. While Groups 1 and 2 showed electrical power drops from PID, Group 3 showed PID-resistive characteristics; the results measured at the module level also exhibited the same trend as on the cell level, as shown in Fig. 2(a) and (b). I–V measurements in the dark offer invaluable analytics for examining the properties of the p-n junctions. Taking into account the mechanisms of PID such that the space-charge region near the p-n junctions are most influenced by Na ions present at stacking faults, the extent of PID can be examined with J02 extracted from the equation of the double diode model [7], qðV−JRs Þ qðV−JRs Þ V−JRs þ J 02 exp þ ; J ¼ J 01 exp kT 2kT Rshunt where Rs and Rshunt represent series and shunt resistances, respectively. Because the saturation current density is the leakage of carriers across the p-n junction with an applied bias, the higher the saturation current density, the lower the quality of the diode. According to Fig. 2(c), while Na-fault injection caused the increase of J02 values of the solar cells in Groups 1 and 2, those of the solar cells in Group 3 remained nearly constant. As shown above in the normalized power drops (Fig. 2(a) and (b)), we could find that the trend of J02 on module level follows that
Fig. 2. Normalized power drops measured at (a) the cell and (b) module levels under illumination and the saturated current densities extracted from the double diode model on (c) the cell and (d) module levels in the dark.
Fig. 1. PID test structures on (a) the cell and (b) module levels.
of J02 on the cell level. In accordance with IEC 62804, if the extent of the power drop is more than 5% of the initial power, the sample is considered to have failed the test. Therefore, we considered that the tested sample underwent PID if the extracted value of J02 after the PID test was approximately 500 times the initial value.
Please cite this article as: W. Oh, et al., Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection, Microelectronics Reliability (2016), http://dx.doi.org/10.1016/j.microrel.2016.07.059
W. Oh et al. / Microelectronics Reliability xxx (2016) xxx–xxx
3
Table 2 Result of #3 after Na fault injection PID test (PID resistive solar cell). Time (h)
Pmax (W)
Isc (A)
Voc (V)
FF (%)
0 2 4 6 12
0.447 0.449 0.446 0.449 0.446
0.941 0.942 0.943 0.934 0.939
0.631 0.632 0.631 0.632 0.630
75.3 75.4 75.0 76.1 75.4
Table 3 Result of #7 after Na fault injection PID test (PID poor solar cell). Time (h)
Pmax (W)
Isc (A)
Voc (V)
FF (%)
0 2 4 6 12
0.451 0.248 0.190 0.155 0.054
0.953 0.938 0.932 0.924 0.814
0.629 0.593 0.544 0.478 0.232
75.2 44.6 37.5 35.1 28.6
Fig. 4. Refractive index and thickness of anti-reflection coatings.
The relation between the power drop and J02 can be described with the following equation: Tables 2 and 3 show the L-IV parameters after PID test in case of PID resistive and poor solar cells. Sample #3 was not degraded after Na fault injection PID test. Whereas #7 shows 90% degraded result by PID. Fig. 3 exhibits the plotting curves of J02 versus the normalized power drop measured at the cell and module levels of Fig. 2. In these curves, there are two separated sections in PID: the former, in which the loss in the fill factor (FF) occurs due to the initial drop of shunting and the latter, in which the power drop occurs with an open circuit voltage (Voc) drop.
Rd ¼ 1− exp−A J 02 :
Here Rd represents the degradation rate and A is the degradation coefficient. A is 494 and 562 in the cases of the cell and module levels, respectively. At the time that the power drop of 5% occurred, the calculated values of J02 were 1.0 × 10−4 and 0.9 × 10−4 A/cm2 for measurements on the cell and module levels, respectively. The calculated values were nearly identical, which allowed us to check the Na fault injection method to determine whether the tested sample was PID resistive or not. We measured the refractive index (RI) and the thickness of anti-reflection coatings (ARC) deposited on each of the solar cells with ellipsometry and investigated the relation between PID and the ARC (RI and thickness). As a result, the measured extent of PID was greater in multicrystalline solar cells than in monocrystalline solar cells. When the ARC's RI and thickness were high and low, respectively, the degradation was reduced (Fig. 4). 4. Conclusion We evaluated the PID vulnerability of solar cells on the cell level. This is the first reported evaluation of the kind. We conducted PID tests for eight different commercialized solar cells for 12 h. Na-fault injection was adopted as the means for evaluating the extent of PID on the cell level. We extracted J02 from I–V data gathered in the dark, which was measured at both the cell and module levels; the trends for both were identical. In conclusion, Na-fault injection is a reasonable means of performing PID tests on the cell level without module packaging. Acknowledgements This work was supported by the New & Renewable Energy (No. 20133010011770) of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korea government Ministry of Trade, Industry and Energy. This work was supported by the Human Resources Program in Energy Technology of the Korea Institute of Energy Technology Evaluation and Planning (KETEP), granted financial resource from the Ministry of Trade, Industry & Energy, Republic of Korea (No. 20154030200760). 01 References
Fig. 3. Relations between the normalized power drop and the saturation current density measured at (a) the cell and (b) module levels of Fig. 2.
[1] S. Pingel, O. Frank, M. Winkler, S. Oaryan, T. Geipel, H. Hoehne, J. Berghold, 35th IEEE Photovoltaic Specialists Conference, 2010.
Please cite this article as: W. Oh, et al., Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection, Microelectronics Reliability (2016), http://dx.doi.org/10.1016/j.microrel.2016.07.059
4
W. Oh et al. / Microelectronics Reliability xxx (2016) xxx–xxx
[2] V. Naumann, D. Lausch, A. Hähnel, J. Bauer, O. Breitenstein, A. Graff, M. Werner, S. Swatek, S. Großer, J. Bagdahn, C. Hagendorf, Sol. Energy Mater. Sol. Cells 120 (2014) 383–389. [3] V. Naumann, D. Lausch, A. Graff, M. Werner, S. Swatek, J. Bauer, A. Hähnel, O. Breitenstein, S. Großer, J. Bagdahn, C. Hagendorf, Phys. Status Solidi (RRL) 7 (5) (2013) 315–318. [4] H. Zenkoh, Photovoltaic Module Reliability Workshop, 2013.
[5] J. Kapur, A. Bennett, J. Norwood, B. Hamzavytehrany, I. Kueppenbender, 28th European Photovoltaic Solar Energy Conference, 2013. [6] Q-Cells SE. Solar cell, solar cell manufacturing method and testing method. US Patent No. US2011/0308602 A1 (2011). [7] S. Bowden, A. Rohatgi, 17th European Photovoltaic Solar Energy Conference, 2001.
Please cite this article as: W. Oh, et al., Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection, Microelectronics Reliability (2016), http://dx.doi.org/10.1016/j.microrel.2016.07.059
Contents lists available at ScienceDirect
Microelectronics Reliability journal homepage: www.elsevier.com/locate/mr
Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection Wonwook Oh a, Junhee Kim a, Byungjun Kang a, Soohyun Bae b, Kyung Dong Lee b, Hae-Seok Lee b, Donghwan Kim b,⁎, Sung-Il Chan a,⁎ a b
Electronic Convergence Material & Device Research Center, Korea Electronics Technology Institute, Seongnam 13509, Republic of Korea Department of Materials Science and Engineering, Korea University, Seoul 02841, Republic of Korea
a r t i c l e
i n f o
Article history: Received 30 June 2016 Accepted 8 July 2016 Available online xxxx Keywords: Potential induced degradation Na fault injection PV modules p-Type crystalline solar cells
a b s t r a c t Photovoltaic (PV) modules are exposed to high-voltage stress between grounded module frames and solar cells, a configuration called potential-induced degradation (PID). Since PID mainly depends on the solar cells used for module packaging, several steps for PID tests can be omitted. We carried out PID tests on the cell level with Na fault injection in accordance with IEC 62804 and examined the extent of PID with saturation current density (J02) extracted from I–V measurements in the dark. Na-fault injection is a reasonable means for performing PID tests on the cell level without module packaging. © 2016 Elsevier Ltd. All rights reserved.
1. Introduction
2. Experimental
Potential-induced degradation (PID) in p-type-based crystalline Si photovoltaic (PV) modules has emerged as a reliability issue since Solon first reported it in 2010 [1]. The Na ions present in encapsulation glass move from the glass toward the surface of the cell due to the potential difference between the frame and the solar cells; this leads to shunting of the p-n junction at its stacking faults [2,3]. In order to suppress PID, the PV modules are manufactured with encapsulants, such as polyolefin or ethylene vinyl acetate (EVA), materials with high volume resistivity, or silicon nitride (SiNx), which result in a high refractive index [4–6]. As a result, many PV module manufacturers promote their products as PID-free, as they have passed the test sequences in accordance with the standards of the International Electrotechnical Commission (IEC). However, the IEC's standard testing cannot distinguish whether the solar cells or encapsulants used for module packaging are PID-resistive, but only whether they pass or fail the tests. In other words, we can avoid PID by using PID-resistive solar cells for module manufacturing. In this paper, we propose an easy and fast testing method without module packaging that evaluates the PID effect on the cell level via Na ion fault injection. We evaluated PID vulnerability on the cell- and module level for eight different commercialized solar cells and compared the values of the saturation current density (J02) extracted from the equation of the double diode model.
We carried out PID tests with eight different commercialized solar cells (five mono-crystalline solar cells: #3, #4, #5, #7, #8 and three multi-crystalline solar cells: #1, #2, #6) that were cut into 5 × 5 cm2 pieces. NaF was simultaneously evaporated for 20 min at 200 °C. The deposition thickness was about 24 nm. After laminating EVA on each of the pieces at 60 °C and Cu foil as electrodes on the front and back sides of each, we performed PID tests for 12 h under an applied bias of 1000 V. For comparison, the pieces with no NaF deposition were made into mini-modules and subjected to PID tests for 96 h under an applied bias of 1000 V at 60 °C, 85% relative humidity (RH). Commercialized EVA and glass were used for the module packaging. I–V measurements in the dark and under illumination were performed before and after the PID tests. Table 1 shows the information of 8 samples about type of solar cells, the thickness of the anti-reflection coatings (ARC) and refractive indices.
⁎ Corresponding authors. E-mail addresses: [email protected] (D. Kim), [email protected] (S.-I. Chan).
3. Results and discussion Fig. 1 illustrates the PID test structures on the cell and module levels, respectively. We deposited Na on the surface of the solar cell to investigate the cell-level PID effects of Na-fault injection, as shown in Fig. 1(a). Fig. 2(b) is the counterpart on the module level. Fig. 2 shows the normalized power drop under illumination and the saturated current density (J02) in the dark obtained by the above-mentioned two PID test structures. We carried out PID tests for 2, 4, 6, and 12 h on the cell level and 24, 48, 72, and 96 h on module level and
http://dx.doi.org/10.1016/j.microrel.2016.07.059 0026-2714/© 2016 Elsevier Ltd. All rights reserved.
Please cite this article as: W. Oh, et al., Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection, Microelectronics Reliability (2016), http://dx.doi.org/10.1016/j.microrel.2016.07.059
2
W. Oh et al. / Microelectronics Reliability xxx (2016) xxx–xxx
Table 1 Information of 8 commercialized solar cells. Samples number
Type of solar cells
Refractive index of ARC
Thickness of ARC
#1 #2 #3 #4 #5 #6 #7 #8
Multi Multi Mono Mono Mono Multi Mono Mono
76.0 78.1 74.4 70.9 71.8 77.6 83.0 81.5
2.04 2.13 2.08 2.09 2.08 2.05 2.05 2.09
performed I–V measurements under illumination (Fig. 2(a) and (b)) and in the dark (Fig. 2(c) and (d)) after the PID tests. The eight samples measured at both the cell and module levels can be classified into three groups; hence, we classified samples #1, #6, and #7 as Group 1; samples #2 and #8 as Group 2; and samples #3, #4, and #5 as Group 3. While Groups 1 and 2 showed electrical power drops from PID, Group 3 showed PID-resistive characteristics; the results measured at the module level also exhibited the same trend as on the cell level, as shown in Fig. 2(a) and (b). I–V measurements in the dark offer invaluable analytics for examining the properties of the p-n junctions. Taking into account the mechanisms of PID such that the space-charge region near the p-n junctions are most influenced by Na ions present at stacking faults, the extent of PID can be examined with J02 extracted from the equation of the double diode model [7], qðV−JRs Þ qðV−JRs Þ V−JRs þ J 02 exp þ ; J ¼ J 01 exp kT 2kT Rshunt where Rs and Rshunt represent series and shunt resistances, respectively. Because the saturation current density is the leakage of carriers across the p-n junction with an applied bias, the higher the saturation current density, the lower the quality of the diode. According to Fig. 2(c), while Na-fault injection caused the increase of J02 values of the solar cells in Groups 1 and 2, those of the solar cells in Group 3 remained nearly constant. As shown above in the normalized power drops (Fig. 2(a) and (b)), we could find that the trend of J02 on module level follows that
Fig. 2. Normalized power drops measured at (a) the cell and (b) module levels under illumination and the saturated current densities extracted from the double diode model on (c) the cell and (d) module levels in the dark.
Fig. 1. PID test structures on (a) the cell and (b) module levels.
of J02 on the cell level. In accordance with IEC 62804, if the extent of the power drop is more than 5% of the initial power, the sample is considered to have failed the test. Therefore, we considered that the tested sample underwent PID if the extracted value of J02 after the PID test was approximately 500 times the initial value.
Please cite this article as: W. Oh, et al., Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection, Microelectronics Reliability (2016), http://dx.doi.org/10.1016/j.microrel.2016.07.059
W. Oh et al. / Microelectronics Reliability xxx (2016) xxx–xxx
3
Table 2 Result of #3 after Na fault injection PID test (PID resistive solar cell). Time (h)
Pmax (W)
Isc (A)
Voc (V)
FF (%)
0 2 4 6 12
0.447 0.449 0.446 0.449 0.446
0.941 0.942 0.943 0.934 0.939
0.631 0.632 0.631 0.632 0.630
75.3 75.4 75.0 76.1 75.4
Table 3 Result of #7 after Na fault injection PID test (PID poor solar cell). Time (h)
Pmax (W)
Isc (A)
Voc (V)
FF (%)
0 2 4 6 12
0.451 0.248 0.190 0.155 0.054
0.953 0.938 0.932 0.924 0.814
0.629 0.593 0.544 0.478 0.232
75.2 44.6 37.5 35.1 28.6
Fig. 4. Refractive index and thickness of anti-reflection coatings.
The relation between the power drop and J02 can be described with the following equation: Tables 2 and 3 show the L-IV parameters after PID test in case of PID resistive and poor solar cells. Sample #3 was not degraded after Na fault injection PID test. Whereas #7 shows 90% degraded result by PID. Fig. 3 exhibits the plotting curves of J02 versus the normalized power drop measured at the cell and module levels of Fig. 2. In these curves, there are two separated sections in PID: the former, in which the loss in the fill factor (FF) occurs due to the initial drop of shunting and the latter, in which the power drop occurs with an open circuit voltage (Voc) drop.
Rd ¼ 1− exp−A J 02 :
Here Rd represents the degradation rate and A is the degradation coefficient. A is 494 and 562 in the cases of the cell and module levels, respectively. At the time that the power drop of 5% occurred, the calculated values of J02 were 1.0 × 10−4 and 0.9 × 10−4 A/cm2 for measurements on the cell and module levels, respectively. The calculated values were nearly identical, which allowed us to check the Na fault injection method to determine whether the tested sample was PID resistive or not. We measured the refractive index (RI) and the thickness of anti-reflection coatings (ARC) deposited on each of the solar cells with ellipsometry and investigated the relation between PID and the ARC (RI and thickness). As a result, the measured extent of PID was greater in multicrystalline solar cells than in monocrystalline solar cells. When the ARC's RI and thickness were high and low, respectively, the degradation was reduced (Fig. 4). 4. Conclusion We evaluated the PID vulnerability of solar cells on the cell level. This is the first reported evaluation of the kind. We conducted PID tests for eight different commercialized solar cells for 12 h. Na-fault injection was adopted as the means for evaluating the extent of PID on the cell level. We extracted J02 from I–V data gathered in the dark, which was measured at both the cell and module levels; the trends for both were identical. In conclusion, Na-fault injection is a reasonable means of performing PID tests on the cell level without module packaging. Acknowledgements This work was supported by the New & Renewable Energy (No. 20133010011770) of the Korea Institute of Energy Technology Evaluation and Planning (KETEP) grant funded by the Korea government Ministry of Trade, Industry and Energy. This work was supported by the Human Resources Program in Energy Technology of the Korea Institute of Energy Technology Evaluation and Planning (KETEP), granted financial resource from the Ministry of Trade, Industry & Energy, Republic of Korea (No. 20154030200760). 01 References
Fig. 3. Relations between the normalized power drop and the saturation current density measured at (a) the cell and (b) module levels of Fig. 2.
[1] S. Pingel, O. Frank, M. Winkler, S. Oaryan, T. Geipel, H. Hoehne, J. Berghold, 35th IEEE Photovoltaic Specialists Conference, 2010.
Please cite this article as: W. Oh, et al., Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection, Microelectronics Reliability (2016), http://dx.doi.org/10.1016/j.microrel.2016.07.059
4
W. Oh et al. / Microelectronics Reliability xxx (2016) xxx–xxx
[2] V. Naumann, D. Lausch, A. Hähnel, J. Bauer, O. Breitenstein, A. Graff, M. Werner, S. Swatek, S. Großer, J. Bagdahn, C. Hagendorf, Sol. Energy Mater. Sol. Cells 120 (2014) 383–389. [3] V. Naumann, D. Lausch, A. Graff, M. Werner, S. Swatek, J. Bauer, A. Hähnel, O. Breitenstein, S. Großer, J. Bagdahn, C. Hagendorf, Phys. Status Solidi (RRL) 7 (5) (2013) 315–318. [4] H. Zenkoh, Photovoltaic Module Reliability Workshop, 2013.
[5] J. Kapur, A. Bennett, J. Norwood, B. Hamzavytehrany, I. Kueppenbender, 28th European Photovoltaic Solar Energy Conference, 2013. [6] Q-Cells SE. Solar cell, solar cell manufacturing method and testing method. US Patent No. US2011/0308602 A1 (2011). [7] S. Bowden, A. Rohatgi, 17th European Photovoltaic Solar Energy Conference, 2001.
Please cite this article as: W. Oh, et al., Evaluation of potential-induced degradation in crystalline Si solar cells using Na fault injection, Microelectronics Reliability (2016), http://dx.doi.org/10.1016/j.microrel.2016.07.059