Excess gate current in the static induction transistor

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Printed in GreatBritain

2X. No 3. pp 217-221.

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EXCESS GATE CURRENT IN THE STATIC INDUCTION TRANSISTOR PIOTR P~OTKA

Institute of Electronic Technology, Technical University of Gdahsk. 80-952 Gdahsk. Poland (Receirwd

14 December 1983; in reoisedform

10 April

1984)

Abstract-In SIT devices an excess gate current flows at high drain-source voltages. This current originates from an impact multiplication of the drain current majority carriers. A simple method is presented for the calculation of this excess current. The method is based on a one dimensional analysis of the potential distribution and the ionization integral. Good agreement between measured and calculated results has been achieved. 1. INTRODUCTION

where I* is the ionization integral:

of a junction field effect transistor can be much higher than expected from the theory of the reverse biased p-n junction[l]. This is caused by the impact ionization in the channel from majority carriers in the drain current. In n-channel devices the generated electrons drift towards the drain, but the holes drift towards the gate and cause an excess gate current. This effect can be observed too in junction field effect devices with a triode-like characteristics like the static induction transistor[2]. The natural vertical construction-Fig. l-and negative temperature coefficient of the drain current make a SIT useful for power applications. However in power SIT the excess gate current can be in the order of several milliamperesFig. 4. In order to calculate the excess gate current, the main current path and the potential distribution along this path must be known. For a normal JFET these quantities can be obtained from a numerical analysis of a two-dimensional set of five transport equations[3]. But for the SIT the main current path is known. It is the symmetry plane of the channel. The potential distribution along this path can be obtained from Poisson’s equation. All calculations can be made on a minicomputer. The gate current

Z* =

/0

“a,, exp

[J

O1-(a,,- a,,) d

Y]d.v

(2)

and y = 0, y = W are coordinates of an “intrinsic gate” and drain, respectively, I,,() is the current of electrons inJected into the channel, Z, is the hole seed current, i.e. the current of holes entering the channel from the drain, a, and cup are electron and hole ionization rates, U is the generation rate, and A is the area of the drain. When a SIT operates well below drain-source breakdown voltage, the hole seed current Z,,,,and the thermally generated carriers can be neglected in eqn (1): Zl#0 I,=-----. 1 -II*

(3)

The gate current ZGof a SIT can be expressed by

(a)

2. MODELING OF IMPACT IONIZATION IN SIT DEVICES

Under the ZD of a SIT channel, the mated by a multiplication be expressed

assumption that the total drain current is concentrated in the centre of the multiplication process can be approxione dimensional model. According to theory[4] the total drain current ZDcan by:

n’-drain

Z,zo+Z,O.exp[ /Y(a,-a,,)dy] +iill.b.A.(i.exp[ld:(n,,-(y,,)dy’]dy I, =

n-

n--drain

1 -z*

Fig. 1. SIT constructions: with a buried gate (a) and planar

(1)

@I.

217

218 Table

I

I

where I, is the source current.

Noting

1.

I

between the gate and the drain. transformation

that

Is = Ifl

a coordinate

(5) 1‘=

and combining

After

w-.x

(8)

eqns (3), (4) and (5) gives I<;=I*.I,

the potential distribution can be approximated by a solution of the one dimensional Poisson’s equation:

(6)

ss

For the IG calculation necessary to know the along the main current are strongly dependent be approximated [5] by

CL =

I

t

from eqns (6) and (2) it is N,(x “) du ” dx ’ (9) ionization rates OL,,and CY,, cc0 0 0 path. These ionization rates on the electric field, but can where N,)(x) is the donor concentration in the gatcdrain cpitaxial layer. It has been shown [6, 71 that at large currents the potential barrier in a SIT is almost zero. Hence the potential of an “intrinsic gate” i\ EO A,.exp -E also nearly zero:

V(x)=D+C~x-~~

( >

where E = - dV(_y)/dy is the electrical field. The values of A, and E,, which are used for subsequent calculations has been taken from[5] and they are listed in Table 1. For the calculation of the potential distribution V(v) we assume a one dimensional model for the area

At the drain side of the gate-drain depletion layer the potential is equal to the drain-source voltage V,:

v,

V(_p = W) =

105-----

(11)

t ...

R [J-U

1

_..: :....,

..

104

!lOl~

.....

1 ‘”

il

IraIn epf

-I

IC sam le sur Pace Fig. 2. Spreading

resistance

distribution

and concentration

of donors

in n-type

regions

for a 2SK76

transistor.

Excess gate current

in the static induction

transistor

219

-experimental

vg [VI Fig. 3. Gate current

vs drain-source

Fig. 4. Gate current

voltage

vs drain current

for three types of SIT.

for 2SK76 and 2SK78.

220

P. PI

OtKA

Table 2. ----I Item

-----

2SK76A

Boundary conditions (10) and (11) enable to calculate the constants C and D in eqn (9). Thus the excess gate current as a function of Z, and VD can be obtained by the following successive calculations: (a) calculate V(y) and E(_v) along the main current path from eqns (8)-(1 I), (b) calculate the ionization rates as a function of position from eqn (7). (c) calculate I* from eqn (2), (d) calculate I, from eqn (6). 3.RESULTS OF CALCULATION

AND MEASUREMENT AND DISCUSSION

The excess gate current has been measured and calculated for three types n-channel transistors of the type 2SK76, 2SK76A, 2SK78. These transistors have a buried gate. Their construction has been described elsewhere[8]. All calculations have been carried out on a minicomputer. The actual distribution of the donors ND (J ) in the drain-gate epilayer. necessary for the calculations, has been obtained by the method of spreading resistance. As an example ND( J’) is presented in Fig. 2 for a 2SK76 transistor. I,; as a function of Vn at a drain current I,, = 1 mA is presented in Fig. 3. I(; as a function of IL, at V,, = 275 V is presented in Fig. 4. According to eqn (4) the gate current is an almost linear function of drain current at constant drain-source voltage. The deviation from the linear relation at larger currents

originates from the efl’ect of selfheating of a SIT (the ionization rates decrease when the temperature increases). The dependence of gate current on drain source voltage is exponential. Good agreement between measurement and calculation can be observed in Figs. 3 and 4. The mean dopant concentration R, in the draingate epi layer, the thickness de,,, and /,-values (at V, = 200 V, ID = 1 mA) for measured transistors are listed in Table 2. Transistors 2SK76A and 2SK76 have a similar value of deP,. Transistors 2SK76 and 2SK78 have a similar value of ND. It is noticeable from Table 2 that for decreasing Ic’, or increasing dep,, I6 falls steeply. In order to minimize excess gate current, N, must be minimized while deP, must be maximized. However, the decrease in ND or the increase in &,. when other design parameters remain fixed, results also in a greater specific on-resistance of the device[9] and [IO]. The specific on-resistance is a drain-source resistance at V, = 0 multiplied by an area of a transistor. A high value of this quantity is undesirable in the case of power transistor. For an example, the specific on-resistance of 2SK76 and 2SK76A transistors can be compared. These transistors have similar constructions but different m, values (Table 2). The specific on-resistance is 0.34 Q cm’ for a 2SK76 transistor and 0.12 D cm’ for a 2SK76A transistor while the gate current is one order of magnitude smaller in 2SK76 than in 2SK7hA transistor.

221

Excess gate current in the static induction transistor

It has been indicated that an excess gate current flow can affect small signal -properties of a field effect _ transistor[l 11. Depending on operating conditions, the excess gate current can make the input resistance low or even negative. This effect can be modelled in the small signal equivalent circuit of a SIT by applying two controlled current sources between drain and gate. Fig. 5. The first one is controlled by the drain current while the second one is controlled by the drain-source voltage. 4. CONCLUSIONS

At high drain-source voltages, an excess gate current flows in the Static Induction Transistor. The dependence of this current on drain current is nearly linear while the dependence on drain-source voltage is exponential. The excess gate current originates from the impact multiplication of majority carriers in the channel. An one dimensional analysis of both the potential distribution and the ionization integral along the SIT symmetry axis can be applied for the calculation of this current. The simple method pre-

sented for the excess gate current evaluation may be useful for designing of power SITS.

REFERENCES

1. R. D.

Ryan, Proc. IEEE 57, 1225 (1969).

2. J. Nishizawa, T. Terasaki and J. Shibata, IEEE Trans. Electron Dev. ED-25 185 (1975). 3. K. Yamaguchi and S. Asai, IEEE Trans. Electron Dev. ED-2S,

362 (1978).

4. C. D. Bulucea and D. C. Prisecaru, Electron Dev. ED-20,

IEEE

Trans.

692 (1973).

5. W. C. Niehause, T. E. Seidel and D. E. Inglesias, IEEE Trans. Electron Dem. ED-20, 765 (1973). 6. J. Nishizawa and K. Yamamoto, IEEE Trans. Electron Dev. ED-25, 314 (1978). 7. P. Plotka and B. Wilamowski, Solid-St. Electron 24, 105 (1981).

8. Y. Mochida, J. Nishizawa, T. Ohmi and R. K. Gupta, IEEE Truns. Electron Dev. ED-25, 761 (1978). 9. B. J. Baliga, IEEE Trans. Electron Dev. ED-27, 368 (1980).

10. 0. Ozawa, IEEE Trans. Electron Dev. ED-27, 2115 (1980). 11. N. Kumata, K. Hane and T. Suzuki, Solid-St. Elecfron. 24, 293 (1981).