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Fabrication technique of ground-plane embedded in a PrBa2Cu3Ox film
Physica C 392–396 (2003) 1332–1336 www.elsevier.com/locate/physc
Fabrication technique of ground-plane embedded in a PrBa2Cu3Ox film Masahiro Horibe *, Yoshihiro Ishimaru, Osami Horibe, Hironori Wakana, Yoshinobu Tarutani, Keiichi Tanabe ISTEC-SRL, 10-13 Shinonome 1-Chome, Koto-ku, Tokyo 135-0062, Japan Received 13 November 2002; accepted 27 January 2003
Abstract We tried to fabricate planarized patterned ground-plane (GP) structures by using a mechanical polishing technology. Our planarized patterned GPs had the geometry of GP embedded in a PrBa2 Cu3 Ox (PBCO) isolation film. This GP structures had no steps on the GP edges and the substrate surface was perfectly covered with PBCO or GP. It was confirmed that the morphology of insulating films on the planarized patterned-GP was uniform over the entire sample surface. The isolation resistance between the electrode layer and the GP was found high (>103 X cm2 ). Furthermore, the high critical current density (>106 A/cm2 ) of the superconducting striplines did not deteriorate on a planarized patterned-GP. It was thus demonstrated that high-quality uniform multilayer structures can be obtained this new planarized patterned GP. 2003 Elsevier B.V. All rights reserved. PACS: 74.72.Bk; 85.25.Am; 85.25.Cp Keywords: PrBa2 Cu3 Oy isolation film; Mechanical polishing; Planarized patterned ground-plane; Embedded GP structure
1. Introduction Ground-plane (GP) structures are generally needed for single-flux-quantum circuits. However, the GP had to be partially removed under the input- and output-pads for high speed signals, because the high capacitances between the GP and the pads disturb high-speed signal transmittance. Thus, GP patterning is required for high-speed
*
Corresponding author. Tel./fax: +81-3-3536-5709. E-mail address: [email protected] (M. Horibe).
input and output operation of SFQ circuits [1,2]. Since patterned GPs have usually 400 nm thickness (approximately twice of the London penetration depth), steps appear on their pattern edges. Furthermore, the upper isolation layer on GP has to be deposited with a thickness larger than that of GP in order to prevent electrical shorts between base-electrode and the GP on the pattern edge. Deposition of even thicker base- and counterelectrodes is also necessary to prevent electrical disconnection and electrical degradation of the base- and counter-electrodes on the GP edge. The structure of GP embedded in a substrate has been proposed as a solution of the above
0921-4534/$ - see front matter 2003 Elsevier B.V. All rights reserved. doi:10.1016/S0921-4534(03)01192-4
M. Horibe et al. / Physica C 392–396 (2003) 1332–1336
mentioned problems [3]. However, the polishing sequence may produce a pit or a groove at the boundary between a GP and a substrate, because the GP material and the substrate materials have different hardness. Furthermore, a substrate surface and a GP film surface co-exist on the sample. Thus, the optimum deposition conditions of upper layers on the substrate area and on the GP area are different. In other words, the electrical properties and crystallinity of upper-layers would be different on the substrate area and the GP area. We propose a new GP structure, that is GP embedded in an isolation film with the same crystal structure and heat absorptivity as those for the GP. In the present study, we have chosen PrBa2 Cu3 Ox (PBCO) as an isolation layer. PBCO has high resistivity of 1–10 X cm. PBCO and La0:2 Y0:9 Ba1:9 Cu3 Ox (La–YBCO) have almost the same lattice constants, the same crystal structures and the same heat absorption factors. Thus, we can expect that the above mentioned problems is solved by using the GP embedded in a PBCO film.
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Fig. 1. Fabrication sequence of the GP embedded in a PBCO film.
2. Fabrication process The fabrication process of the GP embedded in a PBCO film is schematically shown in Fig. 1. First, 600 nm-thick PBCO was deposited on MgO(1 0 0) or LSAT(1 0 0) substrate by pulse laser deposition (PLD) (Fig. 1(a)). The PBCO film was deposited at 730 C in oxygen pressure of 48 mTorr. Then 400 nm-depth holes of the GP structure were excavated in a PBCO film by Ar ion milling with a photoresist mask (Fig. 1(b)). At the same time, moat structures were created as PBCO mesa structures. After removing the photoresist, 400 nm-thick La–YBCO was deposited on a PBCO film with the holes of the GP-pattern by PLD (Fig. 1(c)). Then, the La– YBCO walls were created by Ar ion etching with a photoresist mask (Fig. 1(d)). Here, the PBCO film surface appeared, except for the regions under the La–YBCO walls. The La–YBCO walls were polished by a mechanical polishing technique (Fig. 1(e)), and thus the sample was planarized. After polishing, the sample surfaces was washed by xylene and ethanolamine. Then an SrTiO3 (STO)/ (LaAlO3 )0:3 (SrAl0:5 Ta0:5 O3 )0:7 (LSAT)/STO insu-
lating film was deposited on the GP embedded in the PBCO film. After the contact via holes were fabricated, the samples were annealed for 40 h at 550 C and then a La0:2 Yb0:9 Ba1:9 Cu3 Ox (La– YbBCO) film was deposited by PLD. The deposition temperature of c-axis oriented La–YbBCO films was about 100 C lower than that of c-axis La–YBCO films. Microstripline patterns were created by Ar ion milling. The electrical properties (the critical current density and the isolation resistance between the GP and the microstripline) were examined by DC current measurements. We prepared three types of GP geometries as shown in Fig. 2(a)–(c). Here, the GP geometries shown in Fig. 2(a)–(c) are called Ônormal typeÕ, Ôsubstrate typeÕ and ÔPBCO typeÕ, respectively. In the case of Ônormal typeÕ, the GP patterns were created by Ar ion etching after La–YBCO film was deposited on a substrate by PLD. In the case of Ôsubstrate typeÕ, first, the holes of the GP structure were excavated in a substrate by an Ar ion etching. Then, the GP patterns were formed by using the same process as shown in Fig. 1(c)–(e).
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Fig. 2. Three types of GP geometry examined in this work.
3. Experimental results and discussion Fig. 3(a) shows the atomic force microscope (AFM) image of a pattern edge for the Ônormal typeÕ GP geometry. The angle of the GP ramp was 20 to the substrate surface. The height of the GP ramp was 400 nm. Thus, the horizontal distance of the GP ramp area was about 1.1 lm. The AFM image of the boundary between a GP and a substrate of the Ôsubstrate typeÕ GP geometry is shown in Fig. 3(b). An array of pits or furrows is observed at the boundary between the GP and the substrate. The depth of each furrow was greater
Fig. 3. AFM images (3.0 lm · 5.0 lm) of the boundary between a GP and a substrate or a PBCO film for (a) Ônormal typeÕ, (b) Ôsubstrate typeÕ and (c) ÔPBCO typeÕ geometries.
than 10 nm. A slope of about 1.0 was also observed near the edge of the La–YBCO. Fig. 3(c) shows the AFM image of the boundary area between GP and PBCO in the ÔPBCO typeÕ GP geometry. Furrows at the boundary and a La– YBCO slope are not observed. Thus, a flat patterned-GP structure was obtained. We also fabricated the moat structures by using the Ôsubstrate typeÕ and the ÔPBCO typeÕ GP geometries. The moats were created as mesas of the substrate for the Ôsubstrate typeÕ or the PBCO film ÔPBCO typeÕ. AFM images of both types of moat structures are shown in Fig. 4(a) and (b). In the case of the Ôsubstrate typeÕ GP, the moat-mesa was extruded from the GP surface (Fig. 4(a)). The height of the extruded moat-mesa was about 30 nm. The edges of the moat-mesa were milled after the polishing procedure. In the case of the ÔPBCO typeÕ GP, flat surface of GP with the PBCO-moat was obtained as seen in Fig. 4(b). Even when the surface is over milled by the polishing sequence, almost the same hardness (in other words the same milling rate) of PBCO and La–YBCO leads to a flat sample surface. On the other hand, La–YBCO
Fig. 4. AFM images of moat structures for (a) Ôsubstrate typeÕ and (b) ÔPBCO typeÕ GP geometries (4.0 lm · 4.0 lm).
M. Horibe et al. / Physica C 392–396 (2003) 1332–1336
and the substrate material have different milling rates, and thus the substrate parts are extruded by over-polishing. The surface roughness (Ra ) of STO (150 nm)/ LSAT (400 nm)/STO (50 nm) isolation layers on the three type of structures are listed in Table 1. In the cases of the Ônormal typeÕ and the Ôsubstrate typeÕ, LSAT surfaces on the substrate and the GP films have different roughness values. Because of the different surface temperatures at the surfaces of a GP film and a substrate when LSAT was deposited, LSAT surface morphologies became different. In fact, the measured surface temperature of the substrate area was lower than that of the GP area. On the other hand, almost same roughness values were obtained for the case of ÔPBCO typeÕ, because of the same surface temperatures at the GP area and the PBCO area. Fig. 5 shows the XRD patterns of the La– YBCO base-electrode films on the samples of Ôsubstrate typeÕ and ÔPBCO typeÕ GP geometries. Mixture of a-axis orientation is observed for the Table 1 Roughness values for STO/LSAT/STO surfaces on the GP part and the substrate or PBCO part Samples
GP part (nm)
Substrate or PBCO part (nm)
Normal type Substrate type PBCO type
1.5 1.3 1.7
3.0 2.7 1.2
Note: The measurement area was 2.0 lm · 2.0 lm.
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La–YBCO deposited on the Ôsubstrate typeÕ GP geometry. This mixture of a-axis orientation is attributed to the lower surface temperature on the substrate region. On the other hand, purely c-axis oriented La–YBCO film is obtained on the ÔPBCO typeÕ GP geometry. The electrical properties of microstriplines on the ÔPBCO typeÕ GP geometry were examined at 4.2 K. The crossover area between the microstripline and the GP was 4.0 · 10 4 cm2 (the length and the width of microstripline were 4.0 mm and 10 lm). The cross-sectional area of the microstripline was 2.0 · 10 8 cm2 (the thickness and the width of microstripline were 0.2 and 10 lm). The isolation resistance between the La–YBCO electrode layer and the GP was greater than 500 kX which is probably limited by the resistance between the wires of the test fixture. In fact, the isolation resistance of 500 kX was observed for 400 lm · 600 lm (2.4 · 10 3 cm2 ) area, and thus the actual isolation resistance multiplied by the area was greater than 103 X cm2 . Furthermore, the high critical current density (>106 A/cm2 ) of the superconducting microstripline did not deteriorate on the boundary between the GP and the PBCO film. In contrast, degradation of the critical current density (4.0 · 104 A/cm2 ) of a superconducting microstripline was observed for the Ônormal typeÕ GP geometry. It was thus demonstrated that the problems in multiplayer structures mentioned before were solved by using the GP embedded in a PBCO film.
4. Summary
Fig. 5. XRD patterns of La–YBCO film/isolation layer structures on a Ôsubstrate typeÕ and ÔPBCO typeÕ GP geometries. Note that the volume of base-electrode was about 10 times larger than that of GP, and thus, (0 0 6) peak of GP was not obtained for Ôsubstrate typeÕ GP geometry. And (0 0 6) peaks of GP and PBCO film were shifted by a oxygen deficiency.
We proposed a new GP geometry with a PBCO film. The new GP geometry was realized by a GP embedded in a PBCO film. Steps and furrows were not observed at the boundary of La–YBCO GP and the PBCO in this geometry. The roughness of LSAT on the GP and the PBCO film was almost the same. Furthermore, purely c-axis oriented La– YBCO film was obtained on the entire sample. No degradation of critical current density of upperlayer and the isolation between the GP and the wiring layer was observed by employing the geometry of GP embedded in a PBCO film.
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Acknowledgements
References
The authors would like to thank Dr. Tsunehiro Hato of Fujitsu Laboratory for discussion on the polishing technique and Dr. Kazuhiro Shimaoka of AIST for the microstrip pattern design. This work was supported by the New Energy and Industrial Technology Development Organization (NEDO).
[1] B.D. Hunt, M.G. Forrester, J. Talvacchio, R.M. Young, J.D. McCambridge, IEEE Trans. Appl. Supercond. 7 (1997) 2936. [2] W.H. Mallison, S.J. Berkowitz, A.S. Hirahara, IEEE Trans. Appl. Supercond. 7 (1997) 2944. [3] T. Hato, Y. Ishimaru, H. Aso, A. Yoshida, N. Yokoyama, Advances in Superconductivity XII, Springer-Verlag, Tokyo, 2000, p. 1008.
Fabrication technique of ground-plane embedded in a PrBa2Cu3Ox film Masahiro Horibe *, Yoshihiro Ishimaru, Osami Horibe, Hironori Wakana, Yoshinobu Tarutani, Keiichi Tanabe ISTEC-SRL, 10-13 Shinonome 1-Chome, Koto-ku, Tokyo 135-0062, Japan Received 13 November 2002; accepted 27 January 2003
Abstract We tried to fabricate planarized patterned ground-plane (GP) structures by using a mechanical polishing technology. Our planarized patterned GPs had the geometry of GP embedded in a PrBa2 Cu3 Ox (PBCO) isolation film. This GP structures had no steps on the GP edges and the substrate surface was perfectly covered with PBCO or GP. It was confirmed that the morphology of insulating films on the planarized patterned-GP was uniform over the entire sample surface. The isolation resistance between the electrode layer and the GP was found high (>103 X cm2 ). Furthermore, the high critical current density (>106 A/cm2 ) of the superconducting striplines did not deteriorate on a planarized patterned-GP. It was thus demonstrated that high-quality uniform multilayer structures can be obtained this new planarized patterned GP. 2003 Elsevier B.V. All rights reserved. PACS: 74.72.Bk; 85.25.Am; 85.25.Cp Keywords: PrBa2 Cu3 Oy isolation film; Mechanical polishing; Planarized patterned ground-plane; Embedded GP structure
1. Introduction Ground-plane (GP) structures are generally needed for single-flux-quantum circuits. However, the GP had to be partially removed under the input- and output-pads for high speed signals, because the high capacitances between the GP and the pads disturb high-speed signal transmittance. Thus, GP patterning is required for high-speed
*
Corresponding author. Tel./fax: +81-3-3536-5709. E-mail address: [email protected] (M. Horibe).
input and output operation of SFQ circuits [1,2]. Since patterned GPs have usually 400 nm thickness (approximately twice of the London penetration depth), steps appear on their pattern edges. Furthermore, the upper isolation layer on GP has to be deposited with a thickness larger than that of GP in order to prevent electrical shorts between base-electrode and the GP on the pattern edge. Deposition of even thicker base- and counterelectrodes is also necessary to prevent electrical disconnection and electrical degradation of the base- and counter-electrodes on the GP edge. The structure of GP embedded in a substrate has been proposed as a solution of the above
0921-4534/$ - see front matter 2003 Elsevier B.V. All rights reserved. doi:10.1016/S0921-4534(03)01192-4
M. Horibe et al. / Physica C 392–396 (2003) 1332–1336
mentioned problems [3]. However, the polishing sequence may produce a pit or a groove at the boundary between a GP and a substrate, because the GP material and the substrate materials have different hardness. Furthermore, a substrate surface and a GP film surface co-exist on the sample. Thus, the optimum deposition conditions of upper layers on the substrate area and on the GP area are different. In other words, the electrical properties and crystallinity of upper-layers would be different on the substrate area and the GP area. We propose a new GP structure, that is GP embedded in an isolation film with the same crystal structure and heat absorptivity as those for the GP. In the present study, we have chosen PrBa2 Cu3 Ox (PBCO) as an isolation layer. PBCO has high resistivity of 1–10 X cm. PBCO and La0:2 Y0:9 Ba1:9 Cu3 Ox (La–YBCO) have almost the same lattice constants, the same crystal structures and the same heat absorption factors. Thus, we can expect that the above mentioned problems is solved by using the GP embedded in a PBCO film.
1333
Fig. 1. Fabrication sequence of the GP embedded in a PBCO film.
2. Fabrication process The fabrication process of the GP embedded in a PBCO film is schematically shown in Fig. 1. First, 600 nm-thick PBCO was deposited on MgO(1 0 0) or LSAT(1 0 0) substrate by pulse laser deposition (PLD) (Fig. 1(a)). The PBCO film was deposited at 730 C in oxygen pressure of 48 mTorr. Then 400 nm-depth holes of the GP structure were excavated in a PBCO film by Ar ion milling with a photoresist mask (Fig. 1(b)). At the same time, moat structures were created as PBCO mesa structures. After removing the photoresist, 400 nm-thick La–YBCO was deposited on a PBCO film with the holes of the GP-pattern by PLD (Fig. 1(c)). Then, the La– YBCO walls were created by Ar ion etching with a photoresist mask (Fig. 1(d)). Here, the PBCO film surface appeared, except for the regions under the La–YBCO walls. The La–YBCO walls were polished by a mechanical polishing technique (Fig. 1(e)), and thus the sample was planarized. After polishing, the sample surfaces was washed by xylene and ethanolamine. Then an SrTiO3 (STO)/ (LaAlO3 )0:3 (SrAl0:5 Ta0:5 O3 )0:7 (LSAT)/STO insu-
lating film was deposited on the GP embedded in the PBCO film. After the contact via holes were fabricated, the samples were annealed for 40 h at 550 C and then a La0:2 Yb0:9 Ba1:9 Cu3 Ox (La– YbBCO) film was deposited by PLD. The deposition temperature of c-axis oriented La–YbBCO films was about 100 C lower than that of c-axis La–YBCO films. Microstripline patterns were created by Ar ion milling. The electrical properties (the critical current density and the isolation resistance between the GP and the microstripline) were examined by DC current measurements. We prepared three types of GP geometries as shown in Fig. 2(a)–(c). Here, the GP geometries shown in Fig. 2(a)–(c) are called Ônormal typeÕ, Ôsubstrate typeÕ and ÔPBCO typeÕ, respectively. In the case of Ônormal typeÕ, the GP patterns were created by Ar ion etching after La–YBCO film was deposited on a substrate by PLD. In the case of Ôsubstrate typeÕ, first, the holes of the GP structure were excavated in a substrate by an Ar ion etching. Then, the GP patterns were formed by using the same process as shown in Fig. 1(c)–(e).
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M. Horibe et al. / Physica C 392–396 (2003) 1332–1336
Fig. 2. Three types of GP geometry examined in this work.
3. Experimental results and discussion Fig. 3(a) shows the atomic force microscope (AFM) image of a pattern edge for the Ônormal typeÕ GP geometry. The angle of the GP ramp was 20 to the substrate surface. The height of the GP ramp was 400 nm. Thus, the horizontal distance of the GP ramp area was about 1.1 lm. The AFM image of the boundary between a GP and a substrate of the Ôsubstrate typeÕ GP geometry is shown in Fig. 3(b). An array of pits or furrows is observed at the boundary between the GP and the substrate. The depth of each furrow was greater
Fig. 3. AFM images (3.0 lm · 5.0 lm) of the boundary between a GP and a substrate or a PBCO film for (a) Ônormal typeÕ, (b) Ôsubstrate typeÕ and (c) ÔPBCO typeÕ geometries.
than 10 nm. A slope of about 1.0 was also observed near the edge of the La–YBCO. Fig. 3(c) shows the AFM image of the boundary area between GP and PBCO in the ÔPBCO typeÕ GP geometry. Furrows at the boundary and a La– YBCO slope are not observed. Thus, a flat patterned-GP structure was obtained. We also fabricated the moat structures by using the Ôsubstrate typeÕ and the ÔPBCO typeÕ GP geometries. The moats were created as mesas of the substrate for the Ôsubstrate typeÕ or the PBCO film ÔPBCO typeÕ. AFM images of both types of moat structures are shown in Fig. 4(a) and (b). In the case of the Ôsubstrate typeÕ GP, the moat-mesa was extruded from the GP surface (Fig. 4(a)). The height of the extruded moat-mesa was about 30 nm. The edges of the moat-mesa were milled after the polishing procedure. In the case of the ÔPBCO typeÕ GP, flat surface of GP with the PBCO-moat was obtained as seen in Fig. 4(b). Even when the surface is over milled by the polishing sequence, almost the same hardness (in other words the same milling rate) of PBCO and La–YBCO leads to a flat sample surface. On the other hand, La–YBCO
Fig. 4. AFM images of moat structures for (a) Ôsubstrate typeÕ and (b) ÔPBCO typeÕ GP geometries (4.0 lm · 4.0 lm).
M. Horibe et al. / Physica C 392–396 (2003) 1332–1336
and the substrate material have different milling rates, and thus the substrate parts are extruded by over-polishing. The surface roughness (Ra ) of STO (150 nm)/ LSAT (400 nm)/STO (50 nm) isolation layers on the three type of structures are listed in Table 1. In the cases of the Ônormal typeÕ and the Ôsubstrate typeÕ, LSAT surfaces on the substrate and the GP films have different roughness values. Because of the different surface temperatures at the surfaces of a GP film and a substrate when LSAT was deposited, LSAT surface morphologies became different. In fact, the measured surface temperature of the substrate area was lower than that of the GP area. On the other hand, almost same roughness values were obtained for the case of ÔPBCO typeÕ, because of the same surface temperatures at the GP area and the PBCO area. Fig. 5 shows the XRD patterns of the La– YBCO base-electrode films on the samples of Ôsubstrate typeÕ and ÔPBCO typeÕ GP geometries. Mixture of a-axis orientation is observed for the Table 1 Roughness values for STO/LSAT/STO surfaces on the GP part and the substrate or PBCO part Samples
GP part (nm)
Substrate or PBCO part (nm)
Normal type Substrate type PBCO type
1.5 1.3 1.7
3.0 2.7 1.2
Note: The measurement area was 2.0 lm · 2.0 lm.
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La–YBCO deposited on the Ôsubstrate typeÕ GP geometry. This mixture of a-axis orientation is attributed to the lower surface temperature on the substrate region. On the other hand, purely c-axis oriented La–YBCO film is obtained on the ÔPBCO typeÕ GP geometry. The electrical properties of microstriplines on the ÔPBCO typeÕ GP geometry were examined at 4.2 K. The crossover area between the microstripline and the GP was 4.0 · 10 4 cm2 (the length and the width of microstripline were 4.0 mm and 10 lm). The cross-sectional area of the microstripline was 2.0 · 10 8 cm2 (the thickness and the width of microstripline were 0.2 and 10 lm). The isolation resistance between the La–YBCO electrode layer and the GP was greater than 500 kX which is probably limited by the resistance between the wires of the test fixture. In fact, the isolation resistance of 500 kX was observed for 400 lm · 600 lm (2.4 · 10 3 cm2 ) area, and thus the actual isolation resistance multiplied by the area was greater than 103 X cm2 . Furthermore, the high critical current density (>106 A/cm2 ) of the superconducting microstripline did not deteriorate on the boundary between the GP and the PBCO film. In contrast, degradation of the critical current density (4.0 · 104 A/cm2 ) of a superconducting microstripline was observed for the Ônormal typeÕ GP geometry. It was thus demonstrated that the problems in multiplayer structures mentioned before were solved by using the GP embedded in a PBCO film.
4. Summary
Fig. 5. XRD patterns of La–YBCO film/isolation layer structures on a Ôsubstrate typeÕ and ÔPBCO typeÕ GP geometries. Note that the volume of base-electrode was about 10 times larger than that of GP, and thus, (0 0 6) peak of GP was not obtained for Ôsubstrate typeÕ GP geometry. And (0 0 6) peaks of GP and PBCO film were shifted by a oxygen deficiency.
We proposed a new GP geometry with a PBCO film. The new GP geometry was realized by a GP embedded in a PBCO film. Steps and furrows were not observed at the boundary of La–YBCO GP and the PBCO in this geometry. The roughness of LSAT on the GP and the PBCO film was almost the same. Furthermore, purely c-axis oriented La– YBCO film was obtained on the entire sample. No degradation of critical current density of upperlayer and the isolation between the GP and the wiring layer was observed by employing the geometry of GP embedded in a PBCO film.
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M. Horibe et al. / Physica C 392–396 (2003) 1332–1336
Acknowledgements
References
The authors would like to thank Dr. Tsunehiro Hato of Fujitsu Laboratory for discussion on the polishing technique and Dr. Kazuhiro Shimaoka of AIST for the microstrip pattern design. This work was supported by the New Energy and Industrial Technology Development Organization (NEDO).
[1] B.D. Hunt, M.G. Forrester, J. Talvacchio, R.M. Young, J.D. McCambridge, IEEE Trans. Appl. Supercond. 7 (1997) 2936. [2] W.H. Mallison, S.J. Berkowitz, A.S. Hirahara, IEEE Trans. Appl. Supercond. 7 (1997) 2944. [3] T. Hato, Y. Ishimaru, H. Aso, A. Yoshida, N. Yokoyama, Advances in Superconductivity XII, Springer-Verlag, Tokyo, 2000, p. 1008.