Diamond and Related Materials 12 (2003) 403–407
Field effect transistor fabricated on hydrogen-terminated diamond grown on SrTiO3 substrate and iridium buffer layer M. Kubovica,*, A. Aleksova, M. Schreckb, Th. Bauerb, B. Stritzkerb, E. Kohna a
Department of Electron Devices and Circuits, University of Ulm, D-89081 Ulm, Germany b ¨ Physik, University of Augsburg, D-86135 Augsburg, Germany Institut fur
Abstract Up to now high performance devices have mainly been realized on HTHP single crystals with limited size. However, diamond of single crystal quality can also be grown on SrTiO3 substrate using an iridium buffer layer. For the first time p-type surface channel FETs with sub-micron gatelength have been fabricated on such a substrate. Small signal, large signal and power measurements could be performed up to gigahertz frequencies. This has resulted in cut-off frequencies fT s9.6 GHz, f max(MAG)s 16.3 GHz and f max(U)s17.3 GHz for LGs0.24 mm. For LGs0.9 mm a saturated RF power at 1 GHz of 0.2 Wymm could be measured. These results indicate the high quality of this quasi-substrate of approximately 0.6 cm2 in size. 䊚 2003 Elsevier Science B.V. All rights reserved. Keywords: Field effect transistor; Iridium buffer layer; Small signal; Power measurement
1. Introduction Hydrogen terminated diamond surfaces exhibit a hole conductive surface channel without doping impurities w1x. This p-type channel is a 2DHG with activation energy below 23 meV w2x and has successfully been implemented into field effect transistor structures w3,4x. High cut-off frequencies have been obtained with such structures with sub-micron gatelength on homoepitaxial layers on HTHP type Ib single crystal substrates of small chip size (f4=4 mm2) w5,6x. When using polycrystalline diamond films the FET characteristics (transconductance, open channel current and frequency response) are significantly reduced due to the surface roughness and the presence of grain boundaries. Even on devices with sub-micron gatelength fabricated on polished polycrystalline films microwave performance could not be obtained yet w7x. However, heteroepitaxial growth of diamond on a SrTiO3 ceramic substrate with intermediate iridium buffer layer can result in diamond films of high quality close to that of homoepitaxial films on synthetic single crystal stones w8x. The diamond film *Corresponding author. University of Ulm, EBS, Albert Einstein Allee 45, 89081 Ulm, Germany. Tel.: q49-731-5026179; fax: q49731-5026155. E-mail address:
[email protected] (M. Kubovic).
on IrySrTiO3 delaminates at higher thickness and can then be used as quasi-substrate. The quasi-substrate of approximately 0.6 cm2 in size used in this investigation and a commercially available HTHP substrate are shown for comparison in Fig. 1. The use of such quasi-substrate is a possible way to obtain large surface areas as needed in microelectronics manufacturing. To obtain high performance device characteristic on such material is therefore an important milestone for the relevance of diamond as electronic material. Due to its high electrical breakdown strength and high thermal conductivity diamond has commonly been considered as an ultimate substrate for power devices. Therefore another important problem is to verify the capability to modulate RF signals of large amplitude. Such measurements have not been reported for diamond in the past, thus the power handling capability of diamond has been hypothetical. Here, a first large signal power measurement obtained at 1 GHz signal frequency is discussed. Both features, the use of a quasi-substrate and the first RF power measurement may be considered as important milestones. This contribution focuses on technical details linking the material properties to the device performance. The motivation, general concepts and perspectives are discussed in a more general review also published in Ref. w9 x .
0925-9635/03/$ - see front matter 䊚 2003 Elsevier Science B.V. All rights reserved. doi:10.1016/S0925-9635(03)00068-2
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temperature was 650 8C and the pressure was 15 Torr. Subsequently, the sample was cooled down to RT in pure hydrogen atmosphere. 2.2. Device fabrication
Fig. 1. Delaminated diamond quasi-substrate (left) compared to a commercially available HTHP substrate (right). The size of the quasisubstrate is approximately four times larger than the size of the HTHP stone. Both substrates contain fabricated FET structures.
2. Experimental 2.1. Quasi-substrate growth A single crystal iridium film has been deposited on a SrTiO3 (0 0 1) substrate by electron beam evaporation at approximately 950 8C as reported previously w10x. Onto this Ir layer a diamond film was grown by bias enhanced nucleation at 700 8C and high methane in H2 concentration of 5% to obtain oriented nuclei. The initial nucleation layer is outgrown by an appropriate textured growth step at reduced CH4 concentration of 1% into a layer, which is free of grain boundaries w8x. However, the substrate surface still contains a high density of defects as shown in Fig. 2. Finally, the single crystal diamond film was delaminated from the substrate due to the large thermal expansion mismatch. On this quasisubstrate, additionally a 100 nm thick homoepitaxial layer was grown in a microwave plasma CVD reactor in a H2 atmosphere containing 1.5% of CH4. The
Fig. 2. Diamond substrate showing nearly single crystal surface with isolated defect areas of unoriented growth.
In essence the device fabrication followed that of devices fabricated on single crystal stones as has been described previously w5x. Due to the un-pinned nature of the hydrogen-terminated diamond surface w11x, metals of different barrier heights have been employed for ohmic and Schottky contacts, namely Au and Al. Au has been deposited by e-beam evaporation and patterned by wet chemical etching. Device isolation was obtained by using a low energy oxygen plasma. A three-layer ebeam lithography process has been used for the definition of the sub-micron gate patterns obtaining a T-shaped gate cross-section. The footprint of the gate has then been opened by wet chemical etch back of the Au layer and was therefore self-aligned in respect to the source and drain Au contacts in a process similar to the one used in Ref. w12x. Despite the high density of defects, many electrically active devices have been successfully fabricated between these defects as shown in Fig. 3. 3. Results and discussion The p-type surface channel FETs with sub-micron gatelength have been analyzed under DC, small signal and large signal RF power conditions. For devices with the smallest gatelength of 0.24 mm a maximum drain current of approximately 250 mAymm and a maximum transconductance of 97 mSymm was measured as extracted from the output characteristic shown in Fig. 4. The maximum source to drain voltage for this device was y90 V. The breakdown at this point seemed to originate from the destruction of the contact metallization rather than breakdown of the diamond semi-
Fig. 3. The fabricated device is not affected by the defect visible on the left side. The gate region itself is defect free.
M. Kubovic et al. / Diamond and Related Materials 12 (2003) 403–407
Fig. 4. Output characteristic of FET structure with LGs0.24 mm and WGs100 mm.
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Fig. 6. Cut-off frequencies vs. gatelength on the quasi-substrate and on commercially available HTHP stone.
conductor. The breakdown voltage for the device with 0.9 mm gatelength was as high as y180 V, however, in this case the maximum current level was significantly lower as compared to devices with 0.24 mm gatelength. The small signal RF performance was measured in the frequency range from 50 MHz to 20 GHz for 0.24 mm and 0.5 mm gatelength devices. The measured cutoff frequencies f T, f max(MAG) and f max(U) for the 0.24 mm gatelength devices were 9.6 GHz, 16.3 GHz and 17.3 GHz, respectively. The small signal gain plots of such a measurement are shown in Fig. 5. These data are close to the best data obtained for FETs on single crystal substrates w5x, confirming the good quality of the quasisubstrate. Fig. 6 shows these cut-off frequencies for 0.24 mm and 0.5 mm gatelength devices in comparison to previously obtained values on HTHP substrates. For the 0.5 mm gatelength device f T compares even favorably with previous results on single crystal stones, however it is obtained at the expense of f max, which is only
marginally higher than f T. For the shortest gatelength of 0.24 mm both f T and f max are slightly lower than values obtained previously. However, this result still needs to be analyzed in more detail to distinguish between the influence of the material, device structure and layout, respectively. Large signal measurements could be performed at 1 GHz for the first time, these were in particular power measurements in class A operation. In class A mode of operation the gate bias point is located near Imax y2 and the output signal expands around this point across the load line as basically described in Ref. w13x. The saturated power for class A is measured, when the output signal amplitude becomes limited by forward gate leakage (forward half cycle of the input signal) and by pinch-off (reverse half cycle). Such a power measurement is shown in Fig. 7, where at first the output power increases linearly with increasing input
Fig. 5. The RF gain plots and extracted cut-off frequencies for LGs 0.24 mm and WGs100 mm.
Fig. 7. Large signal power measurement at 1 GHz and class A bias point VDSsy40 V, VGSsy2.2 V, showing linear gain of 12 dB and a saturated power level of 0.2 Wymm, after Ref. w14x.
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Fig. 8. Large signal measurement of 0.9 mm gatelength device performed at 1 GHz with a class A bias point. Power scan performed at 50 V load results in saturated output power of 20 mWymm and in maximum RF current of 112 mAymm.
power, but then saturates at high input levels. The saturated power level can be used to calculate the maximum output current swing (since the output power is directly linked to the product of the load resistance and the square of the output current swing). This maximum RF current can then be introduced into the DC output characteristics, where the RF output current can be compared to the DC current. At first, power measurements were performed using the common microwave reference impedance of 50 V. An envelope of maximum RF output current can be plotted when scanning the large signal power measurement with drain voltage. This is shown in Fig. 8 for a device with LGs 0.9 mm and WGs550 mm for a drain bias up to y40 V. It is seen that the RF current is larger than the DC current and no compression of the RF current is observed. Next, an attempt was made to measure the saturated power at VDSsy40 V and VGSsy2.2 V in class A bias point, using matching at the output. With the highest available load of the tuner system (f400 V) the power plot shown in Fig. 7 could be obtained. A linear gain of 12 dB was obtained and a saturated power level of 0.2 Wymm could be extracted as first reported in Ref. w14x. The power which can be obtained in class A operation by three different load lines is shown in Fig. 9. For a load line of 50 V as used firstly an output power of 20 mWymm was obtained at VDSs y30 V. At a drain bias above y30 V the RF current envelope saturates and thus shifting of the VDS bias point toward higher voltages will not result in an increase of the saturated output power using this load line. Using the best available load of 400 V as described above results in a saturated output power of 0.2 Wymm at VDSsy40 V. Again, further increase of VDS will not result in a higher saturated output power. For a 0.9 mm gatelength device VDS could be y180 V as mentioned
above. For this case the optimum load line would be approximately 2.5 kV. Using this optimum load and an optimum bias point as indicated in Fig. 9, the saturated power in this case can be estimated to 2.1 Wymm, which is still 1 orders of magnitude below expectations w15x. The breakdown at VDSmax resulted in the destruction of the contact metallization, no intrinsic breakdown of diamond semiconductor was observed. This indicates that the measured power was not limited by the diamond properties but either by the measuring setup or by the layout of the FET. 4. Conclusion High performance MESFETs have been fabricated on diamond quasi-substrate grown on a SrTiO3 ceramic
Fig. 9. Power level of 0.9 mm gatelength device measured at different loads (50 and 400 V). Using the best data for VBR and 2.5 kV load line with an optimum bias point, the output power of 2.1 Wymm could be estimated (dashed line).
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substrate using an iridium buffer layer. On this quasisubstrate DC, small signal and power measurement could be performed for the first time. However, the obtained output power is still below expectations. Partially this is due to the fact that the used device structures have not yet been optimized for power applications. The size of the quasi-substrate is approximately 0.6 cm2. Provided that the epitaxial nucleation process will be improved further one can expect diamond quasi-substrates with properties similar to these of synthetic HTHP substrates. Thus, substrates of larger size may be available at lower cost in the near future and may allow wafer scale device development.
w6 x
w7 x
w8 x
w9 x
w10x
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