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FLIP-chip and “backside” techniques
MICROELECTRONICS RELIABILITY PERGAMON
Microelectronics Reliability39 (1999) 721-730
www.elsevier.com/locate/microrel
Tutorial paper
FLIP-chip and "backside" techniques D.L. Barton a, K. Bernhard-H6fer b, E.I. Cole Jr. a "Sandia National Laboratories, MS 1081, Albuquerque, NM87185-1081, USA blnfineon Technologies AG i.Gr., Munich, Germany Abstract
State-of-the-art techniques for failure localization and design modification through bulk silicon are essential for multi-level metallization and new, flip chip packaging methods. The tutorial reviews the transmission of light through silicon, sample preparation, and backside defect localization techniques that are both currently available and under development. The techniques covered include emission microscopy, scanning laser microscope based techniques (electrooptic techniques, LIVA and its derivatives), and other non-IR based tools (FIB, e-beam techniques, etc.). © 1999 Elsevier Science Ltd. All rights reserved.
1. Introduction
Quite often when performing failure analysis on a multi-layer device, the failing area of a circuit is physically located underneath upper layer metal lines such as power buses, high density routing signal lines, and bond pads. This makes electrical failure localization very difficult or even impossible using traditional front side failure analysis techniques (i.e. liquid crystal thermography, photoemission microscopy etc.). At the same time, new packaging techniques like Lead On Chip [1] and flip chip [2-6] enhance overall chip performance, but at the same time they can make conventional failure analysis techniques ineffective. These advancements present a challenge for failure analysts. Failure sites are simply no longer accessible from the front side of the die. Therefore the analysts has to gain access to the failure site from the backside of the die. In this case, however, the signal - usually light - has to penetrate through several hundred of microns of Si substrate. This tutorial will deal with the issues of accessing the defects through the silicon, sample preparation, and
the various techniques available for backside defect localization. 2. Basics
If light of intensity I0 is incident on a piece of bulk Si, the light intensity is attenuated dependent on the thickness dsi, wavelength ~., and doping concentration of the substrate [7]. The variation of the transmitted light intensity IT is given by the socalled Lambert-Beer absorption law [7]:
T=I~ _Io= (1 -Rsi ) "exp(-a(2) ds) with
(1)
T: light transmission R~i: refelction coefficient of Si a(~): absorption coefficient of Si
The absorption coefficient ~ consists of two major contributions [7] t h e band-gap related absorption and the free carrier absorption. Band-gap related absorption which is also called interband absorption is given by the bandstructure of Si [8]. An incident photon can only be absorbed if its energy
0026-2714/99/$ - see front matter. © 1999 Elsevier ScienceLtd. All rights reserved. PII: S0026-2714(99)00093-1
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can excite an electron from the valence band to the conduction band, i.e. if its energy is greater equal than the band-gap energy Egap of Si (1.12eV corresponding to 1.1gm at 300K). In Fig. l(a) the transmission of undoped Si is shown. Si acts as a lowpass filter absorbing all photons with energy greater than the band gap energy and being transparent for photons with energy less than Egap. By contrast free carrier (intraband) absorption, induces a transition within the same band. In an n-doped substrate the absorbed photon looses its energy to a conduction band electron. Once excited to higher energy the electron relaxes via phonon interaction to the conduction band minimum. Within the scope of a semiclassical model, the absorption coefficient increases linearly with the doping concentration n of the substrate and quadratically to the light wavelength [9]:
a
Y___2_"
(2)
/'/,/~ with m* the effective mass, bt the mobility, and n the doping concentration of the substrate In Fig. 1 the light transmission as a function of different doping levels of the substrate is shown. The higher the doping concentration the lower is the transmission due to free carrier absorption. The transmission is dependent not only on the thickness and nature of the substrate, but also the quality of the illuminated image taken from the backside of the die. To minimize diffuse light scattering, a mean surface roughness of less than 5 nm is recommended [10]. But even if the surface quality requirements are fulfilled, the wavelength of the IR light used limits the lateral resolution compared to visible light. 1OO
.o
.3 1 E
=~
o.1
m i- 0.01
1.0
1.5
2.0
\!°'1 2.5
Wavelength (~m)
Fig. 1. IR transmission of 625 gm of p-doped Si with doping concentration x 1016 cm-3 of(a) 1.5, (b) 33, (c) 120, (d) 730. 3. Backside preparation techniques
Backside preparation techniques can be roughly divided into two categories: global thinning and local
thinning. Global thinning techniques such as CNC (Computer Numerically Controlled) milling, mechanical grinding, as well as dry etching procedures thin the entire die. By contrast local thinning techniques such as FIB (Focused Ion Beam) and laser induced etching techniques thin smaller areas. Thinning the entire die is required to save time whenever a local thinning technique is used, but it may also be advantageous for optical based techniques whenever the signal strength or the quality of the illuminated image should be improved. The main operational areas of local thinning techniques are mechanical or e-beam probing and device modification from the backside. Backside sample preparation can be divided into two phases. Phase I involves gaining access to the chip. Phase II is modifying the backside surface of the die. Phase I is generally determined by package specifics. Flip-chip packages normally facilitate easy access to the backside of the die. Heat slugs attached to the die with thermally conductive epoxy can easily be detached by heating the package and removing the heat slug with the help of a sharp metal object. The situation is more complex if you have to gain access to a chip mounted in a package. The molding compound, the die pad, and the glue have to be removed. The actual CNC milling of the Si die is usually done with a diamond milling head. This diamond head is run with a high-frequency spindle up to 60,000 rpm. The device itself is fixed with wax on a sample holder. To cool the die and to remove the milled Si fragments a water cooling system is used. The Si die is usually thinned down to a thickness of 100-150 gm. Thinning the die more is not recommended as the die becomes mechanically unstable. In addition, the heat management of the device may be compromised, causing thermal collapse of the device during electrical operation. The milling head produces grooves and scratches on the Si surface which are typically on the order of several microns deep (Fig 2). To achieve the required surface quality several polishing steps are required. Polishing is usually done with diamond paste. Dependent on the grain size used for the final polishing step a mean surface roughness of 5nm or even better can be obtained (Fig. 2b). The described technique is applicable for packaged devices and flip-chips and with minor process modifications even for a single chip or wafer level [11]. As it is a computer controlled technique it provides highly reproducible and accurate results
D.L. Barton et al. /Microelectronics Reliability 39 (1999) 721-730
with a surface planarity of 20~tm or better (milled area 1 ram2).
10 5
i ~ ~ ( b )
a)afterCNCmilling
afterpolishing
Fig. 2. Si surface roughness after CRC milling (a) and after polishing the milled surface (b). Mechanical grinding and polishing is another global thinning technique. To ensure homogeneous Si removal it is recommended to encapsulate the die in epoxy or to place some wafer scraps around the die to be lapped. Grinding and polishing are usually done in several steps using a conventional lapping machine. For material removal a coarse abrasive paper is used. To obtain the fmal mirror finish polishing steps with diamond paste of different grain sizes are performed. The results of mechanical grinding and polishing are very similar to those of CNC milling. However its use for packaged devices is limited as it permits only the thinning of the entire device including package and leads. For completeness global thinning procedures based on dry etching processes should be mentioned. To achieve the required high etch rates high plasma density machines are needed which can be realized for example through microwave excitation, in an inductive coupled plasma, or an electron cyclotron resonance plasma [ 12]. Dry etching procedures using high plasma density systems however are still under development and have not been routinely used for backside FA to date. To probe an IC electrically from the backside or to modify it from the backside of the die FIB preparation procedures have been developed [ 13-17]. To gain access to the circuitry through the backside of the die up to several hundred of microns of bulk Si have to be removed. Etching of Si is most effective using XeF2 based gas chemistry [18]. XeF2 molecules delivered from a gas nozzle are adsorbed on the Si substrate. A surface reaction takes place
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and volatile reaction products are formed which are removed by the pumping system. This surface reaction is at least 10 times faster than direct FIB milling. Note that XeF2 reacts spontaneously with Si. This spontaneous reaction, however, can only take place if the surface layer is pure Si. The XeF2 milling rates are still too slow for backside preparation. Consequently new methods and equipment based on a high pressure gas delivery system in combination with a high current density column have been developed which enable a highspeed Si etching process. The commercially available high current density column provides beam currents up to 30nA (compared to 6nA in a conventional FIB). The nozzle configuration, either two gas nozzles or one nozzle with an opening for the ion beam, permits a very high local gas pressure (up to several Torr). The combination of both these components enhances Si etching up to a factor of 1000 compared to conventional FIB techniques [19]. In addition, nearly all gas delivered is instantaneously consumed. As a result etching takes place only where the beam is rastered and it is possible to mill a very precise pattern in the Si directly over the edit or probe area. An infrared microscope integrated into the FIB system is an additional useful feature for backside FIB. Since the backside of the chip is opaque for the ion beam, the infrared microscope is useful for navigation and alignment. To do electrical/e-beam probing or device modification from the backside of the die with a high-speed FIB process some large area sample preparation is recommended. To access the signal nodes it is not realistic to drill a small hole several square microns wide and several hundreds of microns deep through bulk Si down to the buried IC. Therefore the Si substrate is pre-thinned in 2 steps so that the final hole only needs to be drilled through a thin section of the substrate. In the first step the entire Si substrate is thinned down to a fraction of its original thickness, usually down to about 100~tm. This is done with the help of one of the global thinning techniques. The removal of the majority of the bulk Si is essential to accelerate the preparation process. Next alignment points for CAD navigation have to be identified either with the help of the integrated infrared microscope or simply by estimating the locations of stepper alignment marks or other large non-critical geometries which are typically found at the comers of the device. After having carried out the alignment
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it is possible to navigate precisely to buried geometries. A large trench is etched at the area of interest. This step is known as local thinning as Si is removed only above the selected nodes. This way the substrate rigidity is maintained. For local thinning the high speed FIB etching technique can be used. Trench size is usually in the 100xl00~tm 2 range. The remaining Si thickness is about 10~tm. During the final step small holes are drilled in the bottom of the trench to expose the signal lines of interest. As the precise milling capability of the FIB is required for this task this FIB process is very similar to standard front side applications. A major difference is that the substrate is covered with a thin silicon oxide film. This oxide deposition step can be done in situ with a FIB. With this thin oxide layer (thickness between 50-100nm) undesired spontaneous etching of the Si substrate can be avoided during successive process steps. Once the thin oxide layer has been deposited over the trench, the signal nodes of interest are exposed using XeF2 assisted milling. Next the nodes that will be contacted are covered with oxide and then re-exposed. This will avoid shorting nodes to the bulk Si when contact is made. As an alternative to the high speed FIB etching process for local Si thinning, a laser activated etching technique, laser microchemical (LMC) etching, can be used [20-27]. This method is based on scanning a focused high power Ar laser beam over the backside of the Si die. The substrate is in contact with a moderate pressure chlorine vapor which serves as enchant. Laser irradiation of a small volume (in the order of 1~un3) of the Si substrate brings it just above Si melting point. The surface of the molten zone reacts with the chlorine ambient to produce SiCI4, which is volatile. Because of the high reactivity of liquefied Si the etching rates are orders of magnitude faster than conventional chemical reactions. When the laser is scanned to the next address point, the thin unreacted liquid Si layer epitaxially regrows to a single crystal substrate. The laser activated process permits etch rates up to 100,0001am3/sec, which is much faster than the fastest FIB method. Compared to a corresponding FIB process, laser-activated processes are free from process debris such as Ga + contamination. A drawback, however, LMC has poorer lateral resolution than FIB methods. Due to non-linearities of the surface chemical reaction, the resolution can be better than the laser spot size, but is limited to about 0.5p,m. In practice the chlorine based Si etching process is used to locally thin the die to about 10~tm Si thickness. As
this laser activated process is even faster than the high-speed FIB process, typical trench dimensions are larger than for FIB preparation. To optimize throughput the laser-activated process can be used to deposit a dielectric for electrical insulation or longer interconnects with a length on the order of mm with the LMC tool. After these process steps the die is loaded into a FIB where the local repairs at the base of the trenches are usually done because of the better lateral resolution of the FIB milling process.
4. Backside failure analysis techniques Backside analysis techniques can be divided into two main categories: passive and active. Passive techniques measure the emissions from the sample and aside from removing the packaging material do not alter the sample. Photon emission microscopy (PEM) and the recently developed PICA (picosecond integrated circuit analyzer) technique are passive methods that will be addressed. Active techniques use a probe to interact with the materials on the integrated circuit. The probe can vary from a physical microprobe to an electron beam to a photon beam. Active methods are more numerous than passive techniques, including traditional failure analysis techniques that have been modified for backside applications. Our focus will be on optically based, backside active techniques.
4.1. Photon (or light) emission microscopy Photon (or light) emission microscopy (PEM) is a common failure analysis technique for frontside investigations for semiconductor devices [28, 29]. PEM is based on the detection of the weak electroluminescence radiation which is emitted from Si under numerous conditions in the visible and infrared wavelength range. The physical origin of the light emission can be easily understood at a p-n junction which is forward biased and reverse biased [30, 31]. If the junction is forward biased the mechanism is similar to that of light emitting devices (LED's) and semiconductor lasers. Under forward bias the built-in potential is lowered and minority carriers are injected into the contacts. These injected carriers recombine with the corresponding majority carriers. Because of the low bias conditions in the forward direction there are only a few high energetic charge carriers. Therefore the corresponding spectrum is very narrow with a maximum at the band-gap energy of Si at 1.1eV. By contrast, under reverse bias the built-in potential barrier increases.
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The reverse current comes from the charge carriers that are thermally generated within the diffusion length, fall down the potential barrier, and are accelerated in the electric field of the space charge region. In the space charge region the charge carriers loose their energy by various scattering events: scattering at phonons, crystal defects, and charged Coulomb centers. The scattering at Coulomb centers (for example ionized doping atoms) is described by classical electrodynamics the so-called Bremsstrahlung [32]. Analogous to the continuum radiation of a x-ray tube, a broad spectrum from the visible to the near infrared wavelength range is emitted. For most analyses the relevant spectra are very similar to that of a reverse biased junction. As can be seen from the spectrum of an n-channel MOSFET in saturation (Fig. 3) the spectrum extends from the visible to the near infrared wavelength range [31]. For backside investigations the photons have to penetrate through the substrate to the backside of the die before they are captured by the detector system. Consequently the emitted light propagates from the optically denser Si (refractive index nsi = 3.5) to the optically thinner medium air (refractive index n~r = 1). As a consequence a large amount of the emitted light is lost due to total reflection. In addition to total reflection losses, the emitted light intensity is attenuated in Si according to the processes described in the Basics section above. Dependent on the doping concentration of the die the infrared part of the emitted light intensity is further attenuated, requiring sensitive detection equipment.
8y
10 Intensity
(arbitrary units)
6 4 2 O
'"
,
0.4 0.6 0.8 1.0 1.2 1.4 1.6 t.8 Wavelength (urn)
Fig. 3. Spectral content of light emitted from an nchannel MOSFET in saturation. From a historical perspective, light emission analysis of integrated circuits has relied on borrowed technology from night vision applications. The benefit is that the technology exists and that performance (light amplification) is adequate for the needs of the application. The drawback of image
intensifiers is their spectral response. The spectral response of several commercially available image intensifiers is shown in Fig. 4. From Fig. 4, it is clear that intensifiers were designed to amplify visible light. As has been discussed already, for backside applications the silicon is transparent only in the near infrared (and at longer wavelengths). 103 Gen Ill-Blue
Peak 10 2 SensiUvitY(mA/W)
Gen Ill-Red
~,~/'~f
~
Gen III-NIR
Gen I 100 10-I 0
......... 400
800
1200
Fig. 4. Spectral response of several commercially available image intensifiers. To take advantage of the higher NIR intensities of light emitting defects NIR arrays are being applied to light emission analysis. A 256x256 pixel HgCdTe NIR array, NICMOS-3, was developed to image in the 800 - 2500 nm band on the Hubble Space Telescope [33]. This camera used a cooled, anti-reflection coated ZnSe window to provide good transmission between 500 nm and 5000 nm as well as low thermal emission. The usual read noise of the NICMOS-3 array is 35 electrons but modifications using special read techniques can reduce this noise to less than 15 electrons. Because the temperature of the array is maintained near 77 K, the dark current is negligible for integration times from 100 milliseconds to greater than 100 seconds. Thus, it is possible to measure photon fluxes at the array of less than 1 photon per second. Thermal blackbody radiation from the sample starts to become noticeable beyond 1400 nm and limits the sensitivity to non-thermal emission. In order to eliminate thermal information, a cold J-filter, which has a cutoff at 1400 nm and very low leakage at longer wavelengths can be placed in front of the array. PEM from the die backside is the application where infrared cameras significantly outperform CCD cameras. Fig. 5 shows a typical example of backside PEM. Other arrays such as InSb and PtSi are now available for low noise NIR applications. 4.2.
Picosecond imaging circuit analyzer (PICA)
PICA was developed at IBM and first presented by Kash and Tang [34]. The approach takes
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advantage of the light emission bursts that occur during switching of non-defective CMOS transistors. The light emission is strongest when the gate voltage is half the drain voltage, i.e. the midpoint of a digital logic transition. Because "naturally" occurring optical information is used in PICA analysis, the method is non-invasive. PICA uses a gated, intensified detector to gather light intensity information as a function of time. Waveforms detecting logic state transitions are acquired stroboscopically by repeated cycling of the test device through test vectors. A thermoelectrically cooled microchannel plate photomultiplier (MCP) with a position sensitive anode is used to collect the light emission. The dark count per pixel of the PICA system has been reported as ~0.001/s, with photon timing accuracy of 100 ps possible. The present detector response is excellent for front side analysis, however the reported systems have marginal sensitivity for backside applications.
in certain crystals (those that lack center symmetry, such as KD*P and lithium niobate). Various combinations of the Kerr and Pockels effects have been used to measure potential changes from the backside of devices. The refractive index in Si is related to the electron and hole concentrations, which are related to the local applied electric fields. The basic idea is to detect changes in n through the backside of a device during operation. The Kerr and Pockels effects occur very rapidly, allowing GHz frequency measurements to be made. Normally a polarized reference laser beam is used and split into two beams with a Nomarski prism. One beam is reflected through the backside of the sample at the test point and the other beam to a reference site. A phase comparison between the reference and probe beam is performed. The phase difference is translated to a polarization change when the two beams are compared. The polarization modulation is then converted to a local voltage variation. 4.4.
Fig. 5. Backside infrared (1 .I-1.4 ~tm) brightfield image (left) of gate oxide failure area and corresponding emission image (right) after an exposure time of 1.5 seconds.
4.3. Electrooptic effects in semiconductors Electrooptic effects were first observed in 1875 by Scottish physicist John Kerr. Kerr found that an isotropic, transparent substance becomes birefringent when placed in an electric field. When the optical axis corresponds to the direction of the applied electric field, the change in n (index of refraction) is given is given by: An = ~.oKE2
(3)
where K is the Kerr constant, E is the applied field, and ~.0 is the wavelength. In 1893 German physicist Fredrich Pockels studied electrooptic effects and discovered that the birefringence is linearly proportional to electric field
Laser voltage probe (LVP)
The LVP produces voltage contrast images and waveforms similar to those produced by electron beam voltage contrast systems [35]. The early LVP work for Si was performed by Bloom and Heinrich at Stanford University. The LVP takes advantage of an electro-absorption phenomenon called the FranzKeldysh effect. When the electric field exceeds 104 V/cm in Si tunneling states are created that effectively reduce the band gap. Photons near the band gap wavelength that previously were transmitted are now absorbed. The change in absorption with applied electric field is used to measure changes in local potentials on the IC. The maximum absorption change occurs at 1065 nm, making the 1064 nm Nd:YAG laser line a convenient probe source. The magnitude of the Franz-Keldysh effect is in the ppm range, so the system for detecting the change in absorption must be relatively sensitive. The use of a mode locked laser allows - 12 GHz bandwidth sampling. The IR laser source limits the spot size to - 0.7 ~tm. A comparison of e-beam and LVP waveforms is shown in Fig. 6. Both methods use stroboscopic data acquisition. Note that the e-beam pulse width can be changed while the laser pulse width cannot. Improvements in IR laser technology will improve the LVP bandwidth.
D.L. Barton et el./Microelectronics Reliability 39 (1999) 721-730
4. 5. Scanning optical microscopy techniques Active photon probing takes advantage of the interactions of a scanned photon beam with an IC. In particular, for photon energies greater than the indirect band gap of silicon electron-hole pairs are generated in the semiconductor. Normally the electron-hole pairs will randomly recombine and there is essentially no net effect. However, when electron-hole pairs are generated near the interface between differently doped regions in an unbiased IC, the charge carriers are separated by the built-in potential between areas with different Fermi levels. Biasing an IC alters the Fermi levels and hence alters the magnitude of electron-hole pair separation or photocurrent. In contrast to passive photon probing techniques, the detector in active photon probing is the IC itself. Future research on the interaction of the probe laser with circuit operation (such as occurs in LIVA and related techniques) will determine the noninvasiveness of the LVP approach. The photon beam source for active probing is usually a scanning optical microscope (SOM). The basic SOM consists of a focused light spot that is scanned over the sample in a raster fashion. By using different laser wavelengths and intensities, variations in the amount of photocurrent can be obtained and backside photon probing can be performed.
E-Beam (50ps sampling pulse) .
i
.
.
.
i- i--'~ ~
"~ .
.
.
.
~
5 min. avg. 30 s avg.
LVP (35ps sampling pulse) J ~ - - i ~ I i ' ~ i ! rill
20
5 min. avg. 30 s avg.
ns
Fig. 6. E-beam and LVP waveforms comparison.
4.5.1. LIVA (Light-Induced Voltage Alteration) LIVA images are produced by monitoring the voltage changes of the constant current power supply
727
as the optical beam from the SOM is scanned across an IC [36]. Voltage changes occur when the electron-hole pair recombination current increases or decreases the power demands of the IC. LIVA takes advantage of photon generated electron-hole pairs to yield information about IC defects and functionality. In the "Voltage Alteration" mode, the IC acts as its own current-to-voltage amplifier, producing a much larger LIVA voltage signal than photocurrent signal with constant voltage biasing. This is in part due to the difference in "scale" for IC voltage (mVV) and current (na). Clearly the voltage signal is easier to measure. Under identical illumination conditions, localized defects on ICs can generate LIVA signals 3 to 4 orders of magnitude greater than signals from non-defective ICs. This difference in LIVA signal depends upon the defect type, but two basic mechanisms can result in the large increase. First, the defect, because of its location in the IC amplifies the effects of normal photocurrents by altering the power demand of circuit elements connected to the defect region. Second, the defect region itself is a site of enhanced recombination compared to nondefective areas. Two types of defects illustrating the differences between these mechanisms are described below. Junctions connected to open conductors amplify normal photocurrent effects to produce a larger LIVA signal (Fig. 7). As the photo-produced charge flows, the open line is unable to sustain its normal voltage, reducing the bias across the junction. This can change the saturation condition of the transistor directly associated with the open-circuited junction, changing the IC's power demands. The voltage of the open-circuited conductor will be the same as the p+ diffusion. Therefore any other transistors connected to the open conductor may change their saturation condition, further amplifying the LIVA signal. When photon injection ceases, the junction voltage will slowly recover to its initial equilibrium voltage which is determined by weak coupling of the open conductor to neighboring conductors and transistors, parasitic leakage conditions, and tunneling across the open [37]. Of course, if the IC logic state is such that there is no potential difference across the opencircuited junction, there will be no LIVA signal. The use of LIVA on an IC with open conductors is illustrated in Fig. 8. Generation of LIVA signals from backside IR illumination requires that the photon wavelength be long enough to penetrate through the silicon substrate but short enough (have
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D.L. Barton et al. /Microelectronics Reliability 39 (1999) 721-730
enough energy) to produce electron-hole pairs in the junction regions. The 1064 nm line of a Nd:YAG laser serves both of these requirements. This example was performed from the backside using a 1064 nm, 1.2 W laser. The other defect type with greatly enhanced LIVA signal is direct semiconductor damage such as overstress damage, crystal defects, and pinholes. Such semiconductor damage can cause a direct increase or decrease in recombination current. The changes in local Fermi levels caused by dopant redistribution and newly formed charge leakage paths will normally produce elevated IDDQ with no illumination. Electron-hole pair generation and recombination due to illumination in the area of the defect will produce even greater amounts of "leakage current". Logic State Mapping using LIVA can be acquired because photocurrent generation is dependent on the circuit bias. Fig. 9 illustrates how the logic states of transistors can be identified. Fig. 9b displays a LIVA difference image made from two images of the microprocessor in two different logic states. The field of view is the same as Fig. 9a. The difference image was produced by a simple subtraction of two LIVA images, with the resultant image showing only those transistors that changed logic state.
4.5.2 Localized Heating From Photon Beams Thus far we have discussed the production of electron-hole pairs and the subsequent photocurrents in semiconductors through photon interactions. Another active photon probing approach uses the heat from a photon beam to effect IC functionality. Through localized heating shorted, resistive, and open interconnections on ICs can be localized. Two methods for detecting shorts and resistive conductors are Optical Beam Induced Resistive Change (OBIRCH) and its constant current analog, Thermally-Induced Voltage Alteration (TIVA). Open conductors can be localized using Seebeck Effect Imaging (SEI). All of the thermal probing techniques can be applied from the front and backside of an IC by use of the proper optical wavelengths. To avoid photocurrent generation when performing localized thermal injection in these techniques, a laser wavelength with energy less than the silicon indirect bandgap is used. For the analysis described a 1340 nm laser is used. rich transistors
4,
1 pch transisto~
11
Laser I
I ~
f"
\
Open Conductor
I t
/
,J
I I
)'~
/
:
; ---
~ , 1 1 3 ~v to D°wnstream / I i---------~ogic
,_',_,//' ' /
j
Fig. 7. Outline diagram showing how localized photon injection can affect open-circuited junctions and downstream logic.
Fig. 8. Backside IR LIVA (left) and reflected IR (right) images of a microcontroller with open contacts.
Fig. 9. Two images showing (a) a LIVA logic map of cell rows for one state, (b) a LIVA difference image between two different states. The 5 mW, HeNe laser was used for the images. 4.5.2.10BIRCH and TIVA imaging Shorted conductors cause increased IC power consumption when the shorted conductors are at different electrical potentials, i.e. a short between VDDand Vss. The power consumption will depend upon the resistance of the short site and its location in the circuit. As a laser is scanned over an IC with a short circuit, laser heating changes the resistance of the short when it is illuminated, changing the IC power demand. It has been found that thermally-induced power changes are usually greater for shorted signal lines than power busses. This results from signal line voltage fluctuations altering transistor gate voltages, producing the same amplification effect observed in LIVA. This resistance change with localized heating is the basis for the OBIRCH technique [38]. The change in IC power consumption is detected by an IC
D.L. Barton et al. /Microelectronics Reliability 39 (1999) 721-730
current change with constant voltage bias, yielding limited detection sensitivity in OBIRCH [38]. The same localized effect can be detected using a constant supply current biasing approach, which achieves greater sensitivity. This approach is known as constant current OBIRCH [39] or TIVA [40]. OBIRCH has also been used to localize defects with a high resistivity in conductors such as voids [39]. Recently it has been shown that the voltage signals produced in TIVA (and in SEI as well) have a non-linear response to increases in laser probe power [41]. An example of this non-linear response is shown in Fig. 10. The response results in a dramatic increase in sensitivity and decrease in image acquisition time. Fig. 11 is a backside TIVA example localizing a short site caused by a stainless steel particle on a 0.5 gm, 1Mb SRAM. The short was visible in earlier analyses using a 120 mW, 1.3 gm laser, and a 16-minute image acquisition time. Increasing the laser power by a factor of 5X decreased the acquisition time to 2 minutes. Moreover, the two shorted conductors that were not seen in earlier analyses are now clearly visible.
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the order of gV/K [41]. This is known as thermoelectric power or the Seebeck Effect [41]. For IC analysis, the effect has been demonstrated as a means to localize voiding in metal test patterns [42]. If an IC conductor is electrically intact and has no shorts, the potential gradient produced by localized heating is readily compensated for by the transistor or power bus electrically driving the conductor and essentially no signal is produced. However, if the conductor is electrically isolated from a driving transistor or power bus, the Seebeck Effect will change the potential of the conductor. This change in conductor potential will change the bias condition of transistors whose gates are connected to the electrically open conductor, changing the transistors' saturation condition and power dissipation. A Seebeck Effect Image (SEI) of the changing IC power demands displays the location of electrically floating conductors. The use of constant current, voltage change measurement is critical to the success of this technique because of the small voltage alteration which occurs, typically on the order of gVs. An example of a SEI image is shown in Fig. 12. 5. Conclusions
t~
4
2
I0
200
400
600
Laser Intensity (roW)
Fig. 10. Non-linear response of defects to laser intensity.
The continued growth in the use of flip-chip packaging and multi-level metellization is driving the development of backside analysis tools and techniques. Backside sample preparation techniques and their effects have been discussed. The failure analysis tools reviewed primarily rely on infrared light for detection and stimulation of the sample under test. Non-optical tools were also discussed and can be very effective, but they are destructive and require extensive sample preparation. For the foreseeable future, backside failure analysis technique development and application will be at the forefront of advanced failure analysis interests.
Fig. 11. Backside TIVA (left) and reflected (right) images of a shorted conductor.
4.5.2.2 Seebeck Effect lmaging (SEI) Thermal gradients in conductors generate electrical potential gradients with typical values on
Fig. 12. Backside SEI (left) and reflected light (right) images of an open conductor.
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Acknowledgements The authors thank H. Millinger for CNC milling contributions and B. Ebersberger for AFM measurements, both with Inf'meon Technologies Munich. Sandia is a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy under contract number DE-AC0494AL85000.
References [1]
[2] [3] [4]
[5] [6] [7] [8]
[9] [10] [11] [12] [13]
[14] [15] [16] [17] [18] [19]
Lowrey T, Cloud G, Kelly D, Zagar P and Seyyedy M; 64Mb DRAM challenges. Semiconductor International. (1993) 49. DeHaven K and Dietz J. Controlled collapse chip connection (C4) - an enabling technology. IEEE. (1994) 1. Tummula R, Rymaszewski EJ. Microelectronics packaging handbook. Van Nostrand Reinhold, New York, ch. 6, 1989, pp 366-391. Kromann G, Huang W, Gerke D. A high-density C4/CBGA interconnect technology for a CMOS microprocessor. IEEE Electronics Component and Technology Conference. (1994) 1. Semmens JE and Adams T. Flip chip package failure mechanisms. Solid State Technology. (1998) 59. Lau J.J. Flip chip technologies. McGraw-Hill, New York, 1996. Pankove JL. Optical processes in semiconductors. Dover Publications, Inc. New York, 1971. Landolt-BOrnstein. Zahlenwerte und funktionen aus naturwissenschaft und technik. Springer Verlag, Berlin, Chapter 17 Semiconductors, 1989. Soref RA and Bennett BR. Electrooptical effects in silicon. IEEE J. Quant. Electron. 23 (1987) 123. Weber G, diploma thesis, Infineon Technologies, Munich, 1998. Chiang CL and Hurley DF. Dynamics of backside wafer level microprobing. IRPS (1998) 137. Widmann D, Mader H, Friedrich H. Technologie hochintegrierter schaltungen. Springer Verlag Berlin, 1996. Livengood RH, Winer P, Ran VR. Application of advanced micromachining techniques for the characterization and debug of high performance microprocessors. Proc. of the Intern. Symp. on Electron, Ion and Photon Beams and Nanofabrication (1998) Lee R and Antoniou N. FIB micro-surgery on flip-chips from the backside. ISTFA. (1998) 455. Antoniou N. Focused ion beam systems keep pace. Back-end Supplement. (1998) 33. Ullmann PF, Talbot CG, Lee RA, Orjuela C, Nicholson R. A New robust backside flip-chip probing methodology.ISTFA. (1996) 381. Livengood RH and Rao VR. FIB techniques to debug flipchip integrated circuits. Semicon. Intern. (1998) 111. Casey Jr. JD, Doyle AF, Lee RG and Stewart DK and Zimmermann H. Gas-assisted etching with focused ion beam technology. Microelectronic Engineering 24 (1994) 43. Micrion 9800 FlipChip Focused Ion Beam System, Data Sheet
[20] Ehrlich DJ, Tsao JY. Laser microfabrication - thin film processes and lithography. Academic Press, Inc., Boston, 1989. [21] Bloomstein TM and Ehrlich DJ. Laser-chemical threedimensional writing for microelectromechanics and application to standard-cell microfluidics. J. Vac. Sci. Technol. B 10 (1992) 2671. [22] Bloomstein TM and Ehrlich DJ," Stereo laser micromaching of silicon", Appl. Phys. Lett. 61. (1992) 708. [23] Ehrlich DJ and Tsao JY. A review of laser-microchemicai processing. J. Vac. Sci. Technol. B1 (1983). 969. [24] Silvermann S, Laser microchemical technology enables realtime editing of first-run silicon. Solid State Technology (1996) 113. [25] Treyz GV, Beach R and Osgood Jr. RM. Rapid direct writing of high-aspect ratio trenches in silicon: process physics. J. Vac. Sci. Technol. B 6, (1988) 3.7. [26] Silverman S, Aucoin R, Mallatt J and Ehrlich D. Laser microchemical technology: new tools for flip-chip debug and failure analysis. ISTFA. (1997) 211. [27] Silverman S, Aucoin R, Ehrlich D and Nill K. OBIC endpointing method for laser thinning of flip-chip circuits. ISTFA. (1998) 461. [28] Hawkins CF, Soden JM, Cole Jr. El, and Snyder ES. Use of light emission in failure analysis of CMOS ICs. ISTFA. (1990) 55-67. [29] Soden JM and Cole Jr. El. IRPS Tutorial. (1992) 4al-4a.16. [30] Pankove Jl. Optical processes in semiconductors. PrenticeHall, New Jersey 1971, Ch 6. [31] Chynoweth AG and McKay KG, Phys. Rev., 102 (2), (1956) 369-376. [32] Kux A, Lugli P, Ostermeir R, Koch F, and Deboy G. Mat. Res. Soc. Symp. Proc., 256. (1992) 223-226. [33] Shivanandan K and Nyunt K. ISTFA. (1995) 69-71. [34] Tsang JC and Kash JA. Appl. Phys. Let/;., 70. (1997) 889891 (1997). [35] Paniccia M., Eiles T, Rao VRM, and Yee WM. Novel optical probing technique for flip chip packaged microprocessors. Int. Test Conf. (1998) 740-747. [36] Cole Jr. El, Soden JM, Rife JL, Barton DL, and Henderson CL. Novel failure analysis techniques using photon probing with a scanning optical microscope. IRPS. (1994) 388-398. [37] Cole Jr. El and Anderson RE, Rapid localization of IC open conductors using charge-induced voltage alteration (CIVA). IRPS. (1992) 288-298. [38] Nikawa K and Inoue S. Various contrasts identifiable from the backside of a chip by 1.3 tam laser. ISTFA (1996) 387392. [39] Nikawa K and Inoue S. New capabilities of OBIRCH method for fault localization and defect detection. Proc. of Sixth Asian Test Symposium. (1997). 219-219. [40] Cole Jr. El, Tangyunyong P, and Barton DL. Backside localization of open and shorted IC interconnections. IRPS (1998) 129-136. [41] Cole Jr. EI, Tangyunyong P, Benson DA, and Barton DL. TIVA and SEI developments for enhanced front and backside interconnection failure analysis. ESREF (1999). [42] Koyama T, Mashiko Y, Sekine M, Koyama H., and Horie K, New non-bias optical beam induced current (NB-OBIC) technique for evaluation of AI interconnects. IRPS (1995) 228-233.
Microelectronics Reliability39 (1999) 721-730
www.elsevier.com/locate/microrel
Tutorial paper
FLIP-chip and "backside" techniques D.L. Barton a, K. Bernhard-H6fer b, E.I. Cole Jr. a "Sandia National Laboratories, MS 1081, Albuquerque, NM87185-1081, USA blnfineon Technologies AG i.Gr., Munich, Germany Abstract
State-of-the-art techniques for failure localization and design modification through bulk silicon are essential for multi-level metallization and new, flip chip packaging methods. The tutorial reviews the transmission of light through silicon, sample preparation, and backside defect localization techniques that are both currently available and under development. The techniques covered include emission microscopy, scanning laser microscope based techniques (electrooptic techniques, LIVA and its derivatives), and other non-IR based tools (FIB, e-beam techniques, etc.). © 1999 Elsevier Science Ltd. All rights reserved.
1. Introduction
Quite often when performing failure analysis on a multi-layer device, the failing area of a circuit is physically located underneath upper layer metal lines such as power buses, high density routing signal lines, and bond pads. This makes electrical failure localization very difficult or even impossible using traditional front side failure analysis techniques (i.e. liquid crystal thermography, photoemission microscopy etc.). At the same time, new packaging techniques like Lead On Chip [1] and flip chip [2-6] enhance overall chip performance, but at the same time they can make conventional failure analysis techniques ineffective. These advancements present a challenge for failure analysts. Failure sites are simply no longer accessible from the front side of the die. Therefore the analysts has to gain access to the failure site from the backside of the die. In this case, however, the signal - usually light - has to penetrate through several hundred of microns of Si substrate. This tutorial will deal with the issues of accessing the defects through the silicon, sample preparation, and
the various techniques available for backside defect localization. 2. Basics
If light of intensity I0 is incident on a piece of bulk Si, the light intensity is attenuated dependent on the thickness dsi, wavelength ~., and doping concentration of the substrate [7]. The variation of the transmitted light intensity IT is given by the socalled Lambert-Beer absorption law [7]:
T=I~ _Io= (1 -Rsi ) "exp(-a(2) ds) with
(1)
T: light transmission R~i: refelction coefficient of Si a(~): absorption coefficient of Si
The absorption coefficient ~ consists of two major contributions [7] t h e band-gap related absorption and the free carrier absorption. Band-gap related absorption which is also called interband absorption is given by the bandstructure of Si [8]. An incident photon can only be absorbed if its energy
0026-2714/99/$ - see front matter. © 1999 Elsevier ScienceLtd. All rights reserved. PII: S0026-2714(99)00093-1
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D.L. Barton et al. /Microelectronics Reliability 39 (1999) 721-730
can excite an electron from the valence band to the conduction band, i.e. if its energy is greater equal than the band-gap energy Egap of Si (1.12eV corresponding to 1.1gm at 300K). In Fig. l(a) the transmission of undoped Si is shown. Si acts as a lowpass filter absorbing all photons with energy greater than the band gap energy and being transparent for photons with energy less than Egap. By contrast free carrier (intraband) absorption, induces a transition within the same band. In an n-doped substrate the absorbed photon looses its energy to a conduction band electron. Once excited to higher energy the electron relaxes via phonon interaction to the conduction band minimum. Within the scope of a semiclassical model, the absorption coefficient increases linearly with the doping concentration n of the substrate and quadratically to the light wavelength [9]:
a
Y___2_"
(2)
/'/,/~ with m* the effective mass, bt the mobility, and n the doping concentration of the substrate In Fig. 1 the light transmission as a function of different doping levels of the substrate is shown. The higher the doping concentration the lower is the transmission due to free carrier absorption. The transmission is dependent not only on the thickness and nature of the substrate, but also the quality of the illuminated image taken from the backside of the die. To minimize diffuse light scattering, a mean surface roughness of less than 5 nm is recommended [10]. But even if the surface quality requirements are fulfilled, the wavelength of the IR light used limits the lateral resolution compared to visible light. 1OO
.o
.3 1 E
=~
o.1
m i- 0.01
1.0
1.5
2.0
\!°'1 2.5
Wavelength (~m)
Fig. 1. IR transmission of 625 gm of p-doped Si with doping concentration x 1016 cm-3 of(a) 1.5, (b) 33, (c) 120, (d) 730. 3. Backside preparation techniques
Backside preparation techniques can be roughly divided into two categories: global thinning and local
thinning. Global thinning techniques such as CNC (Computer Numerically Controlled) milling, mechanical grinding, as well as dry etching procedures thin the entire die. By contrast local thinning techniques such as FIB (Focused Ion Beam) and laser induced etching techniques thin smaller areas. Thinning the entire die is required to save time whenever a local thinning technique is used, but it may also be advantageous for optical based techniques whenever the signal strength or the quality of the illuminated image should be improved. The main operational areas of local thinning techniques are mechanical or e-beam probing and device modification from the backside. Backside sample preparation can be divided into two phases. Phase I involves gaining access to the chip. Phase II is modifying the backside surface of the die. Phase I is generally determined by package specifics. Flip-chip packages normally facilitate easy access to the backside of the die. Heat slugs attached to the die with thermally conductive epoxy can easily be detached by heating the package and removing the heat slug with the help of a sharp metal object. The situation is more complex if you have to gain access to a chip mounted in a package. The molding compound, the die pad, and the glue have to be removed. The actual CNC milling of the Si die is usually done with a diamond milling head. This diamond head is run with a high-frequency spindle up to 60,000 rpm. The device itself is fixed with wax on a sample holder. To cool the die and to remove the milled Si fragments a water cooling system is used. The Si die is usually thinned down to a thickness of 100-150 gm. Thinning the die more is not recommended as the die becomes mechanically unstable. In addition, the heat management of the device may be compromised, causing thermal collapse of the device during electrical operation. The milling head produces grooves and scratches on the Si surface which are typically on the order of several microns deep (Fig 2). To achieve the required surface quality several polishing steps are required. Polishing is usually done with diamond paste. Dependent on the grain size used for the final polishing step a mean surface roughness of 5nm or even better can be obtained (Fig. 2b). The described technique is applicable for packaged devices and flip-chips and with minor process modifications even for a single chip or wafer level [11]. As it is a computer controlled technique it provides highly reproducible and accurate results
D.L. Barton et al. /Microelectronics Reliability 39 (1999) 721-730
with a surface planarity of 20~tm or better (milled area 1 ram2).
10 5
i ~ ~ ( b )
a)afterCNCmilling
afterpolishing
Fig. 2. Si surface roughness after CRC milling (a) and after polishing the milled surface (b). Mechanical grinding and polishing is another global thinning technique. To ensure homogeneous Si removal it is recommended to encapsulate the die in epoxy or to place some wafer scraps around the die to be lapped. Grinding and polishing are usually done in several steps using a conventional lapping machine. For material removal a coarse abrasive paper is used. To obtain the fmal mirror finish polishing steps with diamond paste of different grain sizes are performed. The results of mechanical grinding and polishing are very similar to those of CNC milling. However its use for packaged devices is limited as it permits only the thinning of the entire device including package and leads. For completeness global thinning procedures based on dry etching processes should be mentioned. To achieve the required high etch rates high plasma density machines are needed which can be realized for example through microwave excitation, in an inductive coupled plasma, or an electron cyclotron resonance plasma [ 12]. Dry etching procedures using high plasma density systems however are still under development and have not been routinely used for backside FA to date. To probe an IC electrically from the backside or to modify it from the backside of the die FIB preparation procedures have been developed [ 13-17]. To gain access to the circuitry through the backside of the die up to several hundred of microns of bulk Si have to be removed. Etching of Si is most effective using XeF2 based gas chemistry [18]. XeF2 molecules delivered from a gas nozzle are adsorbed on the Si substrate. A surface reaction takes place
723
and volatile reaction products are formed which are removed by the pumping system. This surface reaction is at least 10 times faster than direct FIB milling. Note that XeF2 reacts spontaneously with Si. This spontaneous reaction, however, can only take place if the surface layer is pure Si. The XeF2 milling rates are still too slow for backside preparation. Consequently new methods and equipment based on a high pressure gas delivery system in combination with a high current density column have been developed which enable a highspeed Si etching process. The commercially available high current density column provides beam currents up to 30nA (compared to 6nA in a conventional FIB). The nozzle configuration, either two gas nozzles or one nozzle with an opening for the ion beam, permits a very high local gas pressure (up to several Torr). The combination of both these components enhances Si etching up to a factor of 1000 compared to conventional FIB techniques [19]. In addition, nearly all gas delivered is instantaneously consumed. As a result etching takes place only where the beam is rastered and it is possible to mill a very precise pattern in the Si directly over the edit or probe area. An infrared microscope integrated into the FIB system is an additional useful feature for backside FIB. Since the backside of the chip is opaque for the ion beam, the infrared microscope is useful for navigation and alignment. To do electrical/e-beam probing or device modification from the backside of the die with a high-speed FIB process some large area sample preparation is recommended. To access the signal nodes it is not realistic to drill a small hole several square microns wide and several hundreds of microns deep through bulk Si down to the buried IC. Therefore the Si substrate is pre-thinned in 2 steps so that the final hole only needs to be drilled through a thin section of the substrate. In the first step the entire Si substrate is thinned down to a fraction of its original thickness, usually down to about 100~tm. This is done with the help of one of the global thinning techniques. The removal of the majority of the bulk Si is essential to accelerate the preparation process. Next alignment points for CAD navigation have to be identified either with the help of the integrated infrared microscope or simply by estimating the locations of stepper alignment marks or other large non-critical geometries which are typically found at the comers of the device. After having carried out the alignment
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it is possible to navigate precisely to buried geometries. A large trench is etched at the area of interest. This step is known as local thinning as Si is removed only above the selected nodes. This way the substrate rigidity is maintained. For local thinning the high speed FIB etching technique can be used. Trench size is usually in the 100xl00~tm 2 range. The remaining Si thickness is about 10~tm. During the final step small holes are drilled in the bottom of the trench to expose the signal lines of interest. As the precise milling capability of the FIB is required for this task this FIB process is very similar to standard front side applications. A major difference is that the substrate is covered with a thin silicon oxide film. This oxide deposition step can be done in situ with a FIB. With this thin oxide layer (thickness between 50-100nm) undesired spontaneous etching of the Si substrate can be avoided during successive process steps. Once the thin oxide layer has been deposited over the trench, the signal nodes of interest are exposed using XeF2 assisted milling. Next the nodes that will be contacted are covered with oxide and then re-exposed. This will avoid shorting nodes to the bulk Si when contact is made. As an alternative to the high speed FIB etching process for local Si thinning, a laser activated etching technique, laser microchemical (LMC) etching, can be used [20-27]. This method is based on scanning a focused high power Ar laser beam over the backside of the Si die. The substrate is in contact with a moderate pressure chlorine vapor which serves as enchant. Laser irradiation of a small volume (in the order of 1~un3) of the Si substrate brings it just above Si melting point. The surface of the molten zone reacts with the chlorine ambient to produce SiCI4, which is volatile. Because of the high reactivity of liquefied Si the etching rates are orders of magnitude faster than conventional chemical reactions. When the laser is scanned to the next address point, the thin unreacted liquid Si layer epitaxially regrows to a single crystal substrate. The laser activated process permits etch rates up to 100,0001am3/sec, which is much faster than the fastest FIB method. Compared to a corresponding FIB process, laser-activated processes are free from process debris such as Ga + contamination. A drawback, however, LMC has poorer lateral resolution than FIB methods. Due to non-linearities of the surface chemical reaction, the resolution can be better than the laser spot size, but is limited to about 0.5p,m. In practice the chlorine based Si etching process is used to locally thin the die to about 10~tm Si thickness. As
this laser activated process is even faster than the high-speed FIB process, typical trench dimensions are larger than for FIB preparation. To optimize throughput the laser-activated process can be used to deposit a dielectric for electrical insulation or longer interconnects with a length on the order of mm with the LMC tool. After these process steps the die is loaded into a FIB where the local repairs at the base of the trenches are usually done because of the better lateral resolution of the FIB milling process.
4. Backside failure analysis techniques Backside analysis techniques can be divided into two main categories: passive and active. Passive techniques measure the emissions from the sample and aside from removing the packaging material do not alter the sample. Photon emission microscopy (PEM) and the recently developed PICA (picosecond integrated circuit analyzer) technique are passive methods that will be addressed. Active techniques use a probe to interact with the materials on the integrated circuit. The probe can vary from a physical microprobe to an electron beam to a photon beam. Active methods are more numerous than passive techniques, including traditional failure analysis techniques that have been modified for backside applications. Our focus will be on optically based, backside active techniques.
4.1. Photon (or light) emission microscopy Photon (or light) emission microscopy (PEM) is a common failure analysis technique for frontside investigations for semiconductor devices [28, 29]. PEM is based on the detection of the weak electroluminescence radiation which is emitted from Si under numerous conditions in the visible and infrared wavelength range. The physical origin of the light emission can be easily understood at a p-n junction which is forward biased and reverse biased [30, 31]. If the junction is forward biased the mechanism is similar to that of light emitting devices (LED's) and semiconductor lasers. Under forward bias the built-in potential is lowered and minority carriers are injected into the contacts. These injected carriers recombine with the corresponding majority carriers. Because of the low bias conditions in the forward direction there are only a few high energetic charge carriers. Therefore the corresponding spectrum is very narrow with a maximum at the band-gap energy of Si at 1.1eV. By contrast, under reverse bias the built-in potential barrier increases.
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D.L. Barton et al. /Microelectronics Reliability 39 (1999) 721-730
The reverse current comes from the charge carriers that are thermally generated within the diffusion length, fall down the potential barrier, and are accelerated in the electric field of the space charge region. In the space charge region the charge carriers loose their energy by various scattering events: scattering at phonons, crystal defects, and charged Coulomb centers. The scattering at Coulomb centers (for example ionized doping atoms) is described by classical electrodynamics the so-called Bremsstrahlung [32]. Analogous to the continuum radiation of a x-ray tube, a broad spectrum from the visible to the near infrared wavelength range is emitted. For most analyses the relevant spectra are very similar to that of a reverse biased junction. As can be seen from the spectrum of an n-channel MOSFET in saturation (Fig. 3) the spectrum extends from the visible to the near infrared wavelength range [31]. For backside investigations the photons have to penetrate through the substrate to the backside of the die before they are captured by the detector system. Consequently the emitted light propagates from the optically denser Si (refractive index nsi = 3.5) to the optically thinner medium air (refractive index n~r = 1). As a consequence a large amount of the emitted light is lost due to total reflection. In addition to total reflection losses, the emitted light intensity is attenuated in Si according to the processes described in the Basics section above. Dependent on the doping concentration of the die the infrared part of the emitted light intensity is further attenuated, requiring sensitive detection equipment.
8y
10 Intensity
(arbitrary units)
6 4 2 O
'"
,
0.4 0.6 0.8 1.0 1.2 1.4 1.6 t.8 Wavelength (urn)
Fig. 3. Spectral content of light emitted from an nchannel MOSFET in saturation. From a historical perspective, light emission analysis of integrated circuits has relied on borrowed technology from night vision applications. The benefit is that the technology exists and that performance (light amplification) is adequate for the needs of the application. The drawback of image
intensifiers is their spectral response. The spectral response of several commercially available image intensifiers is shown in Fig. 4. From Fig. 4, it is clear that intensifiers were designed to amplify visible light. As has been discussed already, for backside applications the silicon is transparent only in the near infrared (and at longer wavelengths). 103 Gen Ill-Blue
Peak 10 2 SensiUvitY(mA/W)
Gen Ill-Red
~,~/'~f
~
Gen III-NIR
Gen I 100 10-I 0
......... 400
800
1200
Fig. 4. Spectral response of several commercially available image intensifiers. To take advantage of the higher NIR intensities of light emitting defects NIR arrays are being applied to light emission analysis. A 256x256 pixel HgCdTe NIR array, NICMOS-3, was developed to image in the 800 - 2500 nm band on the Hubble Space Telescope [33]. This camera used a cooled, anti-reflection coated ZnSe window to provide good transmission between 500 nm and 5000 nm as well as low thermal emission. The usual read noise of the NICMOS-3 array is 35 electrons but modifications using special read techniques can reduce this noise to less than 15 electrons. Because the temperature of the array is maintained near 77 K, the dark current is negligible for integration times from 100 milliseconds to greater than 100 seconds. Thus, it is possible to measure photon fluxes at the array of less than 1 photon per second. Thermal blackbody radiation from the sample starts to become noticeable beyond 1400 nm and limits the sensitivity to non-thermal emission. In order to eliminate thermal information, a cold J-filter, which has a cutoff at 1400 nm and very low leakage at longer wavelengths can be placed in front of the array. PEM from the die backside is the application where infrared cameras significantly outperform CCD cameras. Fig. 5 shows a typical example of backside PEM. Other arrays such as InSb and PtSi are now available for low noise NIR applications. 4.2.
Picosecond imaging circuit analyzer (PICA)
PICA was developed at IBM and first presented by Kash and Tang [34]. The approach takes
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advantage of the light emission bursts that occur during switching of non-defective CMOS transistors. The light emission is strongest when the gate voltage is half the drain voltage, i.e. the midpoint of a digital logic transition. Because "naturally" occurring optical information is used in PICA analysis, the method is non-invasive. PICA uses a gated, intensified detector to gather light intensity information as a function of time. Waveforms detecting logic state transitions are acquired stroboscopically by repeated cycling of the test device through test vectors. A thermoelectrically cooled microchannel plate photomultiplier (MCP) with a position sensitive anode is used to collect the light emission. The dark count per pixel of the PICA system has been reported as ~0.001/s, with photon timing accuracy of 100 ps possible. The present detector response is excellent for front side analysis, however the reported systems have marginal sensitivity for backside applications.
in certain crystals (those that lack center symmetry, such as KD*P and lithium niobate). Various combinations of the Kerr and Pockels effects have been used to measure potential changes from the backside of devices. The refractive index in Si is related to the electron and hole concentrations, which are related to the local applied electric fields. The basic idea is to detect changes in n through the backside of a device during operation. The Kerr and Pockels effects occur very rapidly, allowing GHz frequency measurements to be made. Normally a polarized reference laser beam is used and split into two beams with a Nomarski prism. One beam is reflected through the backside of the sample at the test point and the other beam to a reference site. A phase comparison between the reference and probe beam is performed. The phase difference is translated to a polarization change when the two beams are compared. The polarization modulation is then converted to a local voltage variation. 4.4.
Fig. 5. Backside infrared (1 .I-1.4 ~tm) brightfield image (left) of gate oxide failure area and corresponding emission image (right) after an exposure time of 1.5 seconds.
4.3. Electrooptic effects in semiconductors Electrooptic effects were first observed in 1875 by Scottish physicist John Kerr. Kerr found that an isotropic, transparent substance becomes birefringent when placed in an electric field. When the optical axis corresponds to the direction of the applied electric field, the change in n (index of refraction) is given is given by: An = ~.oKE2
(3)
where K is the Kerr constant, E is the applied field, and ~.0 is the wavelength. In 1893 German physicist Fredrich Pockels studied electrooptic effects and discovered that the birefringence is linearly proportional to electric field
Laser voltage probe (LVP)
The LVP produces voltage contrast images and waveforms similar to those produced by electron beam voltage contrast systems [35]. The early LVP work for Si was performed by Bloom and Heinrich at Stanford University. The LVP takes advantage of an electro-absorption phenomenon called the FranzKeldysh effect. When the electric field exceeds 104 V/cm in Si tunneling states are created that effectively reduce the band gap. Photons near the band gap wavelength that previously were transmitted are now absorbed. The change in absorption with applied electric field is used to measure changes in local potentials on the IC. The maximum absorption change occurs at 1065 nm, making the 1064 nm Nd:YAG laser line a convenient probe source. The magnitude of the Franz-Keldysh effect is in the ppm range, so the system for detecting the change in absorption must be relatively sensitive. The use of a mode locked laser allows - 12 GHz bandwidth sampling. The IR laser source limits the spot size to - 0.7 ~tm. A comparison of e-beam and LVP waveforms is shown in Fig. 6. Both methods use stroboscopic data acquisition. Note that the e-beam pulse width can be changed while the laser pulse width cannot. Improvements in IR laser technology will improve the LVP bandwidth.
D.L. Barton et el./Microelectronics Reliability 39 (1999) 721-730
4. 5. Scanning optical microscopy techniques Active photon probing takes advantage of the interactions of a scanned photon beam with an IC. In particular, for photon energies greater than the indirect band gap of silicon electron-hole pairs are generated in the semiconductor. Normally the electron-hole pairs will randomly recombine and there is essentially no net effect. However, when electron-hole pairs are generated near the interface between differently doped regions in an unbiased IC, the charge carriers are separated by the built-in potential between areas with different Fermi levels. Biasing an IC alters the Fermi levels and hence alters the magnitude of electron-hole pair separation or photocurrent. In contrast to passive photon probing techniques, the detector in active photon probing is the IC itself. Future research on the interaction of the probe laser with circuit operation (such as occurs in LIVA and related techniques) will determine the noninvasiveness of the LVP approach. The photon beam source for active probing is usually a scanning optical microscope (SOM). The basic SOM consists of a focused light spot that is scanned over the sample in a raster fashion. By using different laser wavelengths and intensities, variations in the amount of photocurrent can be obtained and backside photon probing can be performed.
E-Beam (50ps sampling pulse) .
i
.
.
.
i- i--'~ ~
"~ .
.
.
.
~
5 min. avg. 30 s avg.
LVP (35ps sampling pulse) J ~ - - i ~ I i ' ~ i ! rill
20
5 min. avg. 30 s avg.
ns
Fig. 6. E-beam and LVP waveforms comparison.
4.5.1. LIVA (Light-Induced Voltage Alteration) LIVA images are produced by monitoring the voltage changes of the constant current power supply
727
as the optical beam from the SOM is scanned across an IC [36]. Voltage changes occur when the electron-hole pair recombination current increases or decreases the power demands of the IC. LIVA takes advantage of photon generated electron-hole pairs to yield information about IC defects and functionality. In the "Voltage Alteration" mode, the IC acts as its own current-to-voltage amplifier, producing a much larger LIVA voltage signal than photocurrent signal with constant voltage biasing. This is in part due to the difference in "scale" for IC voltage (mVV) and current (na). Clearly the voltage signal is easier to measure. Under identical illumination conditions, localized defects on ICs can generate LIVA signals 3 to 4 orders of magnitude greater than signals from non-defective ICs. This difference in LIVA signal depends upon the defect type, but two basic mechanisms can result in the large increase. First, the defect, because of its location in the IC amplifies the effects of normal photocurrents by altering the power demand of circuit elements connected to the defect region. Second, the defect region itself is a site of enhanced recombination compared to nondefective areas. Two types of defects illustrating the differences between these mechanisms are described below. Junctions connected to open conductors amplify normal photocurrent effects to produce a larger LIVA signal (Fig. 7). As the photo-produced charge flows, the open line is unable to sustain its normal voltage, reducing the bias across the junction. This can change the saturation condition of the transistor directly associated with the open-circuited junction, changing the IC's power demands. The voltage of the open-circuited conductor will be the same as the p+ diffusion. Therefore any other transistors connected to the open conductor may change their saturation condition, further amplifying the LIVA signal. When photon injection ceases, the junction voltage will slowly recover to its initial equilibrium voltage which is determined by weak coupling of the open conductor to neighboring conductors and transistors, parasitic leakage conditions, and tunneling across the open [37]. Of course, if the IC logic state is such that there is no potential difference across the opencircuited junction, there will be no LIVA signal. The use of LIVA on an IC with open conductors is illustrated in Fig. 8. Generation of LIVA signals from backside IR illumination requires that the photon wavelength be long enough to penetrate through the silicon substrate but short enough (have
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D.L. Barton et al. /Microelectronics Reliability 39 (1999) 721-730
enough energy) to produce electron-hole pairs in the junction regions. The 1064 nm line of a Nd:YAG laser serves both of these requirements. This example was performed from the backside using a 1064 nm, 1.2 W laser. The other defect type with greatly enhanced LIVA signal is direct semiconductor damage such as overstress damage, crystal defects, and pinholes. Such semiconductor damage can cause a direct increase or decrease in recombination current. The changes in local Fermi levels caused by dopant redistribution and newly formed charge leakage paths will normally produce elevated IDDQ with no illumination. Electron-hole pair generation and recombination due to illumination in the area of the defect will produce even greater amounts of "leakage current". Logic State Mapping using LIVA can be acquired because photocurrent generation is dependent on the circuit bias. Fig. 9 illustrates how the logic states of transistors can be identified. Fig. 9b displays a LIVA difference image made from two images of the microprocessor in two different logic states. The field of view is the same as Fig. 9a. The difference image was produced by a simple subtraction of two LIVA images, with the resultant image showing only those transistors that changed logic state.
4.5.2 Localized Heating From Photon Beams Thus far we have discussed the production of electron-hole pairs and the subsequent photocurrents in semiconductors through photon interactions. Another active photon probing approach uses the heat from a photon beam to effect IC functionality. Through localized heating shorted, resistive, and open interconnections on ICs can be localized. Two methods for detecting shorts and resistive conductors are Optical Beam Induced Resistive Change (OBIRCH) and its constant current analog, Thermally-Induced Voltage Alteration (TIVA). Open conductors can be localized using Seebeck Effect Imaging (SEI). All of the thermal probing techniques can be applied from the front and backside of an IC by use of the proper optical wavelengths. To avoid photocurrent generation when performing localized thermal injection in these techniques, a laser wavelength with energy less than the silicon indirect bandgap is used. For the analysis described a 1340 nm laser is used. rich transistors
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Fig. 8. Backside IR LIVA (left) and reflected IR (right) images of a microcontroller with open contacts.
Fig. 9. Two images showing (a) a LIVA logic map of cell rows for one state, (b) a LIVA difference image between two different states. The 5 mW, HeNe laser was used for the images. 4.5.2.10BIRCH and TIVA imaging Shorted conductors cause increased IC power consumption when the shorted conductors are at different electrical potentials, i.e. a short between VDDand Vss. The power consumption will depend upon the resistance of the short site and its location in the circuit. As a laser is scanned over an IC with a short circuit, laser heating changes the resistance of the short when it is illuminated, changing the IC power demand. It has been found that thermally-induced power changes are usually greater for shorted signal lines than power busses. This results from signal line voltage fluctuations altering transistor gate voltages, producing the same amplification effect observed in LIVA. This resistance change with localized heating is the basis for the OBIRCH technique [38]. The change in IC power consumption is detected by an IC
D.L. Barton et al. /Microelectronics Reliability 39 (1999) 721-730
current change with constant voltage bias, yielding limited detection sensitivity in OBIRCH [38]. The same localized effect can be detected using a constant supply current biasing approach, which achieves greater sensitivity. This approach is known as constant current OBIRCH [39] or TIVA [40]. OBIRCH has also been used to localize defects with a high resistivity in conductors such as voids [39]. Recently it has been shown that the voltage signals produced in TIVA (and in SEI as well) have a non-linear response to increases in laser probe power [41]. An example of this non-linear response is shown in Fig. 10. The response results in a dramatic increase in sensitivity and decrease in image acquisition time. Fig. 11 is a backside TIVA example localizing a short site caused by a stainless steel particle on a 0.5 gm, 1Mb SRAM. The short was visible in earlier analyses using a 120 mW, 1.3 gm laser, and a 16-minute image acquisition time. Increasing the laser power by a factor of 5X decreased the acquisition time to 2 minutes. Moreover, the two shorted conductors that were not seen in earlier analyses are now clearly visible.
729
the order of gV/K [41]. This is known as thermoelectric power or the Seebeck Effect [41]. For IC analysis, the effect has been demonstrated as a means to localize voiding in metal test patterns [42]. If an IC conductor is electrically intact and has no shorts, the potential gradient produced by localized heating is readily compensated for by the transistor or power bus electrically driving the conductor and essentially no signal is produced. However, if the conductor is electrically isolated from a driving transistor or power bus, the Seebeck Effect will change the potential of the conductor. This change in conductor potential will change the bias condition of transistors whose gates are connected to the electrically open conductor, changing the transistors' saturation condition and power dissipation. A Seebeck Effect Image (SEI) of the changing IC power demands displays the location of electrically floating conductors. The use of constant current, voltage change measurement is critical to the success of this technique because of the small voltage alteration which occurs, typically on the order of gVs. An example of a SEI image is shown in Fig. 12. 5. Conclusions
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The continued growth in the use of flip-chip packaging and multi-level metellization is driving the development of backside analysis tools and techniques. Backside sample preparation techniques and their effects have been discussed. The failure analysis tools reviewed primarily rely on infrared light for detection and stimulation of the sample under test. Non-optical tools were also discussed and can be very effective, but they are destructive and require extensive sample preparation. For the foreseeable future, backside failure analysis technique development and application will be at the forefront of advanced failure analysis interests.
Fig. 11. Backside TIVA (left) and reflected (right) images of a shorted conductor.
4.5.2.2 Seebeck Effect lmaging (SEI) Thermal gradients in conductors generate electrical potential gradients with typical values on
Fig. 12. Backside SEI (left) and reflected light (right) images of an open conductor.
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D . L Barton et al. /Microelectronics Reliability 39 (1999) 721-730
Acknowledgements The authors thank H. Millinger for CNC milling contributions and B. Ebersberger for AFM measurements, both with Inf'meon Technologies Munich. Sandia is a multiprogram laboratory operated by Sandia Corporation, a Lockheed Martin Company, for the United States Department of Energy under contract number DE-AC0494AL85000.
References [1]
[2] [3] [4]
[5] [6] [7] [8]
[9] [10] [11] [12] [13]
[14] [15] [16] [17] [18] [19]
Lowrey T, Cloud G, Kelly D, Zagar P and Seyyedy M; 64Mb DRAM challenges. Semiconductor International. (1993) 49. DeHaven K and Dietz J. Controlled collapse chip connection (C4) - an enabling technology. IEEE. (1994) 1. Tummula R, Rymaszewski EJ. Microelectronics packaging handbook. Van Nostrand Reinhold, New York, ch. 6, 1989, pp 366-391. Kromann G, Huang W, Gerke D. A high-density C4/CBGA interconnect technology for a CMOS microprocessor. IEEE Electronics Component and Technology Conference. (1994) 1. Semmens JE and Adams T. Flip chip package failure mechanisms. Solid State Technology. (1998) 59. Lau J.J. Flip chip technologies. McGraw-Hill, New York, 1996. Pankove JL. Optical processes in semiconductors. Dover Publications, Inc. New York, 1971. Landolt-BOrnstein. Zahlenwerte und funktionen aus naturwissenschaft und technik. Springer Verlag, Berlin, Chapter 17 Semiconductors, 1989. Soref RA and Bennett BR. Electrooptical effects in silicon. IEEE J. Quant. Electron. 23 (1987) 123. Weber G, diploma thesis, Infineon Technologies, Munich, 1998. Chiang CL and Hurley DF. Dynamics of backside wafer level microprobing. IRPS (1998) 137. Widmann D, Mader H, Friedrich H. Technologie hochintegrierter schaltungen. Springer Verlag Berlin, 1996. Livengood RH, Winer P, Ran VR. Application of advanced micromachining techniques for the characterization and debug of high performance microprocessors. Proc. of the Intern. Symp. on Electron, Ion and Photon Beams and Nanofabrication (1998) Lee R and Antoniou N. FIB micro-surgery on flip-chips from the backside. ISTFA. (1998) 455. Antoniou N. Focused ion beam systems keep pace. Back-end Supplement. (1998) 33. Ullmann PF, Talbot CG, Lee RA, Orjuela C, Nicholson R. A New robust backside flip-chip probing methodology.ISTFA. (1996) 381. Livengood RH and Rao VR. FIB techniques to debug flipchip integrated circuits. Semicon. Intern. (1998) 111. Casey Jr. JD, Doyle AF, Lee RG and Stewart DK and Zimmermann H. Gas-assisted etching with focused ion beam technology. Microelectronic Engineering 24 (1994) 43. Micrion 9800 FlipChip Focused Ion Beam System, Data Sheet
[20] Ehrlich DJ, Tsao JY. Laser microfabrication - thin film processes and lithography. Academic Press, Inc., Boston, 1989. [21] Bloomstein TM and Ehrlich DJ. Laser-chemical threedimensional writing for microelectromechanics and application to standard-cell microfluidics. J. Vac. Sci. Technol. B 10 (1992) 2671. [22] Bloomstein TM and Ehrlich DJ," Stereo laser micromaching of silicon", Appl. Phys. Lett. 61. (1992) 708. [23] Ehrlich DJ and Tsao JY. A review of laser-microchemicai processing. J. Vac. Sci. Technol. B1 (1983). 969. [24] Silvermann S, Laser microchemical technology enables realtime editing of first-run silicon. Solid State Technology (1996) 113. [25] Treyz GV, Beach R and Osgood Jr. RM. Rapid direct writing of high-aspect ratio trenches in silicon: process physics. J. Vac. Sci. Technol. B 6, (1988) 3.7. [26] Silverman S, Aucoin R, Mallatt J and Ehrlich D. Laser microchemical technology: new tools for flip-chip debug and failure analysis. ISTFA. (1997) 211. [27] Silverman S, Aucoin R, Ehrlich D and Nill K. OBIC endpointing method for laser thinning of flip-chip circuits. ISTFA. (1998) 461. [28] Hawkins CF, Soden JM, Cole Jr. El, and Snyder ES. Use of light emission in failure analysis of CMOS ICs. ISTFA. (1990) 55-67. [29] Soden JM and Cole Jr. El. IRPS Tutorial. (1992) 4al-4a.16. [30] Pankove Jl. Optical processes in semiconductors. PrenticeHall, New Jersey 1971, Ch 6. [31] Chynoweth AG and McKay KG, Phys. Rev., 102 (2), (1956) 369-376. [32] Kux A, Lugli P, Ostermeir R, Koch F, and Deboy G. Mat. Res. Soc. Symp. Proc., 256. (1992) 223-226. [33] Shivanandan K and Nyunt K. ISTFA. (1995) 69-71. [34] Tsang JC and Kash JA. Appl. Phys. Let/;., 70. (1997) 889891 (1997). [35] Paniccia M., Eiles T, Rao VRM, and Yee WM. Novel optical probing technique for flip chip packaged microprocessors. Int. Test Conf. (1998) 740-747. [36] Cole Jr. El, Soden JM, Rife JL, Barton DL, and Henderson CL. Novel failure analysis techniques using photon probing with a scanning optical microscope. IRPS. (1994) 388-398. [37] Cole Jr. El and Anderson RE, Rapid localization of IC open conductors using charge-induced voltage alteration (CIVA). IRPS. (1992) 288-298. [38] Nikawa K and Inoue S. Various contrasts identifiable from the backside of a chip by 1.3 tam laser. ISTFA (1996) 387392. [39] Nikawa K and Inoue S. New capabilities of OBIRCH method for fault localization and defect detection. Proc. of Sixth Asian Test Symposium. (1997). 219-219. [40] Cole Jr. El, Tangyunyong P, and Barton DL. Backside localization of open and shorted IC interconnections. IRPS (1998) 129-136. [41] Cole Jr. EI, Tangyunyong P, Benson DA, and Barton DL. TIVA and SEI developments for enhanced front and backside interconnection failure analysis. ESREF (1999). [42] Koyama T, Mashiko Y, Sekine M, Koyama H., and Horie K, New non-bias optical beam induced current (NB-OBIC) technique for evaluation of AI interconnects. IRPS (1995) 228-233.