Formation of anodic plasma oxides on InP, GaAs and Si through Al and Sm overlayers

Formation of anodic plasma oxides on InP, GaAs and Si through Al and Sm overlayers

applied surface science ELSEVIER Applied Surface Science 78 (1994) 239-248 Formation of anodic plasma oxides on InP, GaAs and Si through Al and S...

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applied surface science ELSEVIER

Applied

Surface

Science

78 (1994) 239-248

Formation of anodic plasma oxides on InP, GaAs and Si through Al and Sm overlayers E. PinEik a,*, I. Thurzo a, V. NhdaZdy a, J. BartoS a, M. Jergel a, J. Kocanda a Institute of Physics, Slovak Academy of Sciences, Dlibravska’ cesta 9, 842 28 Bratislaua, Slocak Republic ‘Department

b

of Microelectronics, Slovak Technical lJnil;ersity, IlkociEoca 3, 812 19 BratislaL,a, Slovak Republic (Received

20 December

1993; accepted

for publication

28 March

1994)

Abstract We studied the rate at which the anodic plasma oxide growth on Al/InP, Al/Si, Al/GaAs and Sm/GaAs proceeded. In all cases a faster oxide growth has been observed compared to free semiconductor surfaces. Modelling of the growth processes indicates that both the density of the negative oxygen ions on the surface and their migration coefficient are enhanced in structures with an overlayer.

Bond’s method of measurement of the GaAs lattice parameter and SIMS analysis lead us to conclude that the semiconductor crystal lattice near the surface (in depth less than 200 nm) is impaired to such a level that it markedly influences the reaction rate inclusion of the corresponding

between the cross-section

negative oxygen ions and semiconductor interface atoms. It implies into the equations describing the growth of the anodic oxide.

1. Introduction In a recent review article by Taylor et al. [l] it is concluded that plasma oxidation is a promising low-temperature alternative for the formation of high-quality insulating layers on semiconductors, and that the issue as to whether the oxidizing negative oxygen ions are formed by electron attachment in the plasma or at the gas/oxide interface, or both, remains to be solved. Studies of oxygen transport mechanisms during plasma anodization of Si have been carried out by Perriere et al. [2l. They observed the enhancement effect of the zirconia layer on the

* Corresponding

author.

0169.4332/94/$07.00 0 1994 Elsevier SSDI 0169-4332(94)00127-M

Science

kinetics of Si anodization between room temperature and 600°C. The roles of both the neutral and negatively charged oxygen particles in the plasma oxidation of silicon are discussed in Ref. [31. A new approach to describing the plasma anodic silicon oxide growth based on an exponential decay of the O- concentration in the growing dielectric film was presented by Peeters and Li [4]. Gourrier et al. [51 published interesting results concerning the physical and electrical properties of Al/GaAs oxides prepared by a multipole plasma source with densities of the current flowing through the samples of up to 40 mA cm-*. The transport of oxygen ions through GaAs oxide has been investigated by Yamasaki and Sugano [6] using two isotopes of oxygen.

B.V. All rights reserved

E. Pi&k et al. /Applied Surface Science 78 (I 994) 239-248

240

Properties of InP plasma native oxides with thicknesses below 12.5 nm prepared at 300°C during 30 min were studied by Saada et al. [7l. These samples were either biased or at floating potential during oxide growth. Use of Al, Al,O, and InP cathode is interesting from the point of view of our growth concept presented in this article. The objective of our contribution is to demonstrate how anodic plasma oxidation of InP, Si and GaAs can be promoted by a very thin aluminium or samarium overlayer and finally to sketch an explanation of these phenomena. We used anodic current densities below 4 mA cm-’ but the electric field intensity in the oxide was higher in comparison with Gourrier’s group regime 151.

2. Oxidation

procedure

The following crystalline semiconductors were used in our experiments: InP (Ndonors= lOi cmp3), Si UVdonors= 1016 and 101’ cmp3 Nacceptors - 10” cme3) and GaAs (Ndonors= 10’8’cm-3). The InP, Si and GaAs surfaces had (1001, (111) and (100) orientations, respectively. They were mechano-chemically polished by standard procedures and then an aluminium layer of a suitable thickness was evaporated onto them. The plasma oxidation temperatures of all samples were kept below or equal to 300°C. Thicknesses of the Al layers on InP and Si were 4-8 nm. The corresponding oxides were prepared in the constantcurrent mode of anodization under a current density of 3.8 rnA cm-’ in an oxygen plasma at pressure pox 2: 30 Pa. An inductive coil was used to couple energy from a = 350 kHz generator with 6-8 kW maximum power to the discharge. This high power was needed, mainly, because of the long distance of the oxidized sample from the discharge centre. A sketch of the geometrical configuration of the anodization electrodes is shown in Fig. lb. This arrangement was reported for the first time in our contribution 181. In the case of GaAs ultrathin OS-l.5 nm thick Al or Sm overlayers were used. The discharge conditions differed considerably from those mentioned above; the output power of the hf genera-

-0.3 kW -

rf

power-

-7 IkW 0 0 0

=I la1

(b)

Fig. 1. Illustration of both the sample situation with regard to the discharge centre and the anodization electrode localization in the case of an anodic oxidation of (a> GaAs with ultrathin AI or Sm overlayer (thickness below 1.5 nm), (b) Si or InP with 4-8 nm thick aluminium overlayer.

tor was = 0.3 kW and its oscillation frequency 1.25 MHz. The oxygen pressure was again about T 30 Pa. A standard configuration of electrodes [9,10] was used - see Fig. la. In this case the samples were oxidized in the constant-voltage mode at 60 V.

3. Experimental

techniques

applied

for diagnos-

tics

3.1. Measurements of thicknesses The thicknesses of the anodic oxide layers were estimated from quasistatic and highfrequency C-T/ curves [ll] while the dielectric constants &4l oxide) = 10, e(GaAs oxide) = 10, &i oxide) = 4 and &nP oxide) = 5.75 were taken. In the quasistatic method (mostly used) a triangular voltage sweep at a rate of (Y= *80 mV s-l was used. The current I flowing through the MOS structure was measured by an electrometer with R = lo9 fi input resistance in most cases. The capacitance C was obtained from the relation C = I/a. Our structures were often composed of two oxides, of the metal and of the semiconductor, respectively. The total capacitance in accumulation C, is determined as: l/‘,

=

l/Cmetaloxide

+

l/Csemicond.oxide-

(1)

E. PinEik et al. /Applied

The thickness of the metal oxide is dmetalotide= 5d meta,,where 5 is a constant which expresses the increase of the metal volume after bonding it to oxygen, 5 = 1.3 for aluminium. Then the thickness of the semiconductor oxide is given by the relation: 1 dsemicond.

oxide

=

Esemicond.

oxide

CT

5d

241

Surface Science 78 (1994) 239-248

-

X-ray

metal

‘metaloxide

I

(2) 3.2. DL TS measurements Two versions of deep level transient spectroscopy were used for analyzing MOS properties: (i> small-signal charge DLTS with excitation pulses of amplitude AU = 50 mV superimposed on the quiescent gate bias ug [12,13], for MOS prepared on InP, GaAs and Si crystalline semiconductors with a 4-8 nm thick aluminium overlayer. The preamplifier output signal was sampled, usually, at times t, = 5 ms and t, = 10 ms, (ii> capacitance DLTS spectrometer, which used a 10 MHz probing frequency [14] for MOS structures on GaAs with an ultrathin Al overlayer (below 1.5 nm>. The relaxation transients were measured by a differential sampling integrator with rate windows between 10 ps and 100 ms. The excitation voltage step was 1 V. In both cases Al gates of 0.34 mm2 area were evaporated onto the oxides to form MOS diodes. 3.3. G&s lattice parameter

measurement

This method was applied to both GaAs and ultrathin Al/GaAs based MOS structures. The lattice parameter measurements were performed by Bond’s method [15,161 with an X-ray diffractometer using CuKP radiation. A scheme of the method is shown in Fig. 2. The measurements were carried out at room temperature. The resolution of the temperature measurements was 0.02 K. The results were corrected for temperature expansion (to 295 K) using the expansion coefficient (Y= 5.8 x 10e6 K-‘. The reflection peak profiles were scanned in 20” steps. The beam height was 1 mm and its width 0.1 mm. The size

Fig. 2. Scheme of Bond’s method of lattice parameter measurement, where a very precise determination of the angle between position (a) and (b) of the investigated crystal is needed. Diffraction from the measured plane is registered in corresponding counters.

of the beam surface spot was approximately 1.5 mm’. To obtain information from the vicinity of the interface the distance of lattice planes was measured for which the diffraction condition is satisfied at an angle of incidence or reflection approaching 90” with respect to the normal of the surface. This method enhanced the absorption of the beam while yielding a small penetration depth. The bulk lattice parameter (it means deeper towards the semiconductor bulk) was obtained by utilizing CUKJ? radiation reflections from (553) and (800) planes. The half-widths of the (553) and (800) reflection peaks were about 12’ and 8’, respectively.

4. Experimental 4.1. Experimental

results and discussion growth observation

The resistance of InP to oxidation has been recognized in some earlier fundamental studies

E. Pi&k et al. /Applied Surface Science 78 (1994) 239-248

242

0

I

I

I

I

3

6

9

12 t,,

(min)

Fig. 3. Growth kinetics in the case of anodic oxidation of GaAs, Al/GaAs, Sm/GaAs and Al/Si. Solid lines belong to the computed and fitted dependences. Constant-voltage mode (U,, = 60 VI was used for the GaAs structure at T,, = 220°C. Oxidation of AI/Si proceeded in the constant-current mode (I,,, = 3.8 mA cmm2) at sample temperature T,, = 300°C.

summarized by Spicer et al. [17]. Our experimental experience with free InP surface has complied fully with these findings, but anodic oxidation of InP through Al films of thicknesses up to 8 nm helped us to override the oxidation resistance [8]. In the temperature range 150-200°C a thickness of the InP native oxide up to e 50 nm could be achieved while the oxidation duration amounted to 25 min. The electrode configuration illustrated in Fig. lb was used for crystalline silicon oxidation at 300°C [HI. The resulting oxide film thickness d,, as a function of the oxidation time t,, is shown in Fig. 3 (heavily doped n-type Si). An anodic current density of l,,X= 3.8 mA cm-* was used. Anodic oxidation without the aluminium overlayer at the same current densities provided electrically conducting oxide layers of thicknesses below 10 nm during a 15 min lasting oxidation. Moruzzi et al. [19] reported thicknesses of 20 nm/15 min at 300°C for I,, = 10 mA cme2. The growth kinetics for a RF plasma anodization of heavily doped n-type GaAs in a constantvoltage operation mode (U,, = 60 V, I,, < 3 mA cm-*) at the temperature of 220°C is shown in Fig. 3. The corresponding variations of the anodic

current densities with time for GaAs based substrates are shown in Fig. 4. For the sample with an Al film the retention period lasted approximately 420 s, after which delay the oxidation proceeded faster than in the case of the reference sample. The results for this

1.90

t,,

(mid

Fig. 4. Evolution of the anodization current densities f,, with mode at U,, = 60 V. oxidation time t,, in the constant-voltage Curves correspond to those of the growth kinetics shown in Fig. 3.

E. Pi&k

I

et al. /Applied

I

200

Surface Science 78 (1994) 239-248

I

243

I

I

300

&OO T [Kl

Fig. 5. DLTS spectra of a GaAs MOS capacitor with = 230 nm thick native oxide measured in the depletion mode (the first value UP is bias, the second one Un is excitation level) showing the shift of peak position with increasing bias. The activation energy calculation by help of an Arrhenius plot is between 0.8 and 0.85 eV.

type of semiconductor have been partly presented in Ref. [20]. X-ray photoelectron spectroscopy did not con-

0

firm conclusively the existence of aluminium atoms at the oxide/semiconductor interface after anodization which slightly contradicts our con-

-

/-

u. CL

0

4

-0.05 -

k

upN,Nl

\ \

-0.10 -

GaAs da,=2 I

200

-l/-2 -2/-3 -3/-b

nm I

I

300

I

I

LOO

T IKI Fig. 6. DLTS spectra of an MOS capacitor with - 200 nm thick oxide grown on Al(1.5 nm)/GaAs (transmission of = 75%). Two peaks marked by arrows correspond to defects with energies 0.33 and 0.80 eV below E,. Energy of the high-temperature peak lies, usually, between 0.75 and 0.8 eV. We supposed its origin to be the same as that of the peak shown in Fig. 5.

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E. Pi&k et al. /Applied Surface Science 78 (1994) 239-248

cept about the destruction of the subsurface layer by in-drifted metal atoms. Therefore, we performed subsidiary measurements by the capacitance version of DLTS. In Fig. 5 capacitance DLTS spectra are shown of MOS structures prepared on heavily doped (concentration of Si donors was (l-3) x 101’ cmP3) n-type GaAs with native oxide (without aluminium) measured in depletion. The corresponding activation energy obtained by an Arrhenius plot is between 0.80 and 0.85 eV below the GaAs conduction band. The peak magnitude and its position changed with applied bias. The spectra of MOS with oxides grown anodically on ultrathin Al/GaAs deviate from those shown in Fig. 5 in several respects: (i> the magnitudes of the DLTS peaks decreased, (ii> their shift with bias disappeared, (iii) in some cases two peaks were found - see Fig. 6 - they are marked by arrows, (iv) the activation energy corresponding to the peak lying at the higher temperature is lower - between 0.75 and 0.80 eV; we suppose the same origin of peaks from both Fig. 5 and Fig. 6. These results demonstrate important structural changes at the oxide/semiconductor interface when using the aluminium overlayer, thus indicating the presence of Al at the interface and finally proving that the subsurface GaAs may be impaired before its oxidation. Oxidation of Sm/GaAs structures under the same technological conditions proceeded by even higher growth rates without any retention period. The distribution of Sm and SmO in the resulting = 150 nm oxide is shown in Fig. 7. Thicknesses of the evaporated Al and Sm layers were, in the GaAs case, below 1.5 nm. Because of their high transparency to visible light we characterized them by transmission T values for a 400-600 nm wavelength range of incident light. An excellent example of deep in-diffusion of Al into crystalline silicon at - 300°C is shown in Jung’s work [21] by Auger spectroscopy. 4.2. Simple theoretical growth description For a description of the oxide growth on Si and GaAs we applied a hopping transport model of oxygen ions through the oxide layer [22-241.

I I 0

I

I

I

I

20

10

/

SmO I

30 number

168’ / LO

of

frames

Fig. 7. SIMS profiles of Sm and SmO components of a 150 nm thick GaAs anodic plasma oxide prepared on a Sm/GaAs structure.

We suppose that the oxide/semiconductor interface reactions are very fast compared to the bulk migration. The O- ion current density can be expressed by the relation: DC, Ji =‘gi -_g(d,) 2a

exp( -&+I),

(3)

where C, is the negative oxygen ion concentration on the oxide surface, D is the migration coefficient, Zqi is the oxygen ion charge, 2a is the distance between two oxygen atoms in the oxide, E’ = kT/q,a,

(4)

and g(d,) represents the reductions of the ionic current due to the space charge: g( d,,) = (1 + d,,/L’)

-(’ +L”dox),

(5) where L’ is the width of the space charge layer: L’ = leokT/( Zq,)‘aC,.

(6) Values of the negative oxygen ion concentration C, and migration coefficient D obtained by a fitting procedure for growth kinetics illustrated in Fig. 3 are shown in Table 1. The parameters related to GaAs confirm that both the concentration of O- ions and the coefficient D are markedly changed as a result of Al or Sm overlayer impact.

4.3. Lattice distortions The presented calculations for C, and D did not take into account the possibility of yet an-

E. PinZk et al. /Applied

Table 1 Values of the negative oxygen ion concentration C, and the migration coefficient (diffusion + drift) D obtained by a fitting procedure applied to the oxidation kinetics of GaAs, Al/GaAs, Sm/GaAs and Al/Si structures Sample

c,x10-‘8 (cmm3)

D x 10” (crn’~-~)

GaAs Al/GaAs Sm/GaAs Al/Si

2.14 8.60 12.2 7.70

2.91 6.02 8.60 0.42

other state of the oxide/semiconductor interface as a result of the Al or Sm interaction with the semiconductor. A considerable distortion of the lattice of the semiconductor below the overlayer before the moment when the oxygen ions are transported through it, is expected. The process of lattice impairing can proceed during raising the sample temperature to the selected one or in the course of the migration of Al or Sm atoms which is faster than that of oxygen ions under the influence of the high electric field during oxidation. It was shown elsewhere [20] that a distinct influence of the anodic oxidation process on the value of the lattice parameter is registered even at a depth of 3.2 pm below the semiconductor surface. The results of the measurements of the changes in the lattice parameter by Bond’s method for the effective depth of 0.8 pm are presented in Table 2. As a reference value of the lattice parameter the value a = 5.65317 A has been taken, which is the lattice parameter of unoxidized GaAs at a Table 2 Changes in the lattice parameter of the GaAs bulk for a dep!h of = 800 nm below the surface of the structure prepared by anodic oxidation of GaAs, Al/GaAs and Sm/GaAs samples 0 (reference lattice parameter a = 5.65317 A, reflections from the (553) plane) Type of sample

Free surface of GaAs Native oxide on GaAs Oxide with Al (T = 74%) Oxide with Sm (T = 80%)

Lattice

strain

Au x lo4 A

As grown

Annealed

- 4.50 -5.10 - 2.20 - 12.60

+ +

1.50 1.50 1.85 1.60

245

Surface Science 78 (1994) 239-248 Table 3 Correlation between the oxide thickness, and the lattice strain

DLTS

peak

Approximative

DLTS peak height

Lattice

oxide thickness (nm) (T = 80% Al)

log AC (F)

Aax104W

60 160 340

- 12.0 - 12.7 - 13.8

-3.0 - 2.5 -0.7

height

strain

depth of = 18 pm after annealing at 350°C during one hour in nitrogen. The second column presents measurements of the same parameter after annealing at a depth of 0.8 pm. These results imply that the bulk of the semiconductor crystal adjacent to the overlayer in the oxide growth region is impaired to a higher but unfortunately unknown level. On the basis of our measurements it can be stated that five conditions have a decisive influence on the magnitude and sign (contraction or dilatation) of the lattice parameter change: (i> sample treatment before the plasma processing, (ii) final thickness of the oxide layer, (iii> annealing procedure and its duration, (iv) Al or Sm overlayer promoted oxidation process, and (v> growth rate of the oxide. We believe that two findings have an extraordinary significance: (i) the sound correlation between the magnitude of the DLTS signal and the lattice contraction value Aa in corresponding structures while the oxide thickness is taken as a variable parameter - see Table 3 [25] (values of Aa were calculated as the difference between the “bulk” and “subsurface” lattice parameters aso - a,,,); (ii) annealing of the structures with native oxide (without Al or Sm overlayer) solely reduces the lattice contraction magnitude almost to its reference value a = 5.65317 A but the same procedure applied to oxide/gaAs structures prepared with an Al or Sm overlayer resulted in a dilatation of the GaAs lattice parameter with respect to its reference value. We suppose that the lattice distortions undergo alterations with oxide thickness and/or annealing procedures. Their initial and ultimate states can be connected with transforming the

246

E. PinELket al. /Applied Surface Science 78 (1994) 239-248

original elastic distortions, point defects and imperfect stoichiometry of the investigated structures [26,271.

Consequently, formula:

Eqs. (11 and (5) lead to the

4.4. Sketch of a modified growth kinetics concept

(8) Our main conceptual difficulty resides in a poor understanding of the growth mechanism itself, particularly with respect to the rate of forming oxide molecules at the oxide/semiconductor interface, as a result of O- and semiconductor atom interaction. The contemporary theoretical background used for an explanation of the growth kinetics is based on the influence of the space charge in the oxide on both the oxygen ion and electron transport [23,24]. Peeters and Li [4] suppose a loss term for the oxygen ions in the oxide and so a gradual drop of their contribution to the total current at increasing depths in the oxide. On the basis of our results we suppose that the dominant role in the growth kinetics is played by the state of disturbance of the crystalline semiconductor lattice after a partial annealing which is going on during raising the temperature to its ultimate value while preparing the samples for oxidation (it lasts = 30 min for InP and Si and y 10 min for GaAs). This disturbed state, which leads, probably, to higher oxide growth rates, can be characterized by an enhanced cross-section Q of the reaction of the negative oxygen ions with the semiconductor atoms. Then the film thickness increase can be defined by the relation:

d(d,,)/dt=(jiQn)/(NZ~i),

(7)

where ji is the negative ion current density in the oxide, N is the density of the oxide molecules, n is the semiconductor surface atom density relevant to the crystallographic lattice plane.

The rest of the O- ions in the film which do not form the oxide molecules and whose number is proportional to (1 - QN), form some kind of “shielding” for the positive surface charge of the dipole layer at the oxide/semiconductor interface. There is likely a relation of these extra species to the density of surface states. A quasi-steady state between the negative oxygen ion migration and the rate of interface reactions is not met, the deviation being different at different oxide thicknesses. A correct estimation of the cross-section Q by the relation (7) clashes with finding the real values of the negative ion density Ji which contributes a part to the total oxidation current density J, flowing through the oxide: Jr = Ji + J,, )

(9)

where J,i is the current density corresponding to electron flow. According to Kiermasz et al. [28] the ion/electron current ratio p in SiO, is 4.17 x 10p3. This value was calculated from the linear region of the dependence of SiO, thickness on oxidation time. From the parabolic region of the same d,, - t,, graph p = 2.92 x 10d3 was obtained [28]. Further, the former value of p will be used because we shall estimate Q by help of the linear part of the thickness-time dependences illustrated in Fig. 3. The corresponding approximate initial growth rates are enumerated in Table 4. Provided the

Table 4 Cross-sections estimated by relation (7) while linear parts of the growth dependences

(Figs. 3 and 4) were used

Type of oxidized structure

Cross-section (cm’) Growth rate (A/s)

GaAs

Al/GaAs

1.39 x lo-l4 1.8

6.39 x lo-l4 8.3

Sm/GaAs 1.45 x 10-13 18.8

Al/S 4.48 x lo- I5 0.64

E. PinZk et al. /Applied Surface Science 78 (1994)

negative ion current density is independent of either chemical composition or thickness of the oxide - which means independent of the type of the semiconductor - then the next values of Ji could be determined: (i) in the constant-voltage mode (oxidation of GaAs) where the average value of the total oxidation current density Jr = 2.4 x low3 A cm-* was taken (see Figs. 3 and 41, Ji = 2.4 X lop3 A cm-* X 4.17 X lop3 = 1.0 X lop5 A cm-‘, (ii) in the constant-current mode (oxidation of Si): Ji = 3.8 X lop3 A cm-* X 4.17 X lop3 = 1.38 x 10e5 A cm-*. The following constants were taken for using them in relation (7): molar weights of oxides Msio, = 60.086, MAszo, = 197.84 and MGazO, = 187.44, Avogradro number iVA= 6.022 X 1O23 mol-‘, and specific mass densities psio, = 2.33 g cmp3 , pAsZO,= 3.738 g cme3 and pGa,03 = 5.88 g cmp3. From the above constants we calculated the oxide molecule densities: Nsio = 2.335 x 1O22 cmp3 and NoaAsoxide= 1.504 x 10z 22 cme3. The semiconductor atom surface densities of nsi and noaAs at the oxidation temperature used were deduced as an average number of semiconductor atoms per cm2 while they are at distances equivalent to the temperature-dependent lattice parameters which are given by [29]: asi( T) = 5.4304 + 1.8138 x 10-5( T - 298.15 K), (10)

239-248

247

ductor/oxide interface, the depth profile of the in-diffused Al or Sm atoms is to be taken into account. Put in other words, in the course of oxidation Q should be a function of the oxide/semiconductor interface depth, or Q = Q(t,,). Evidently, with the anodization voltage applied, any drift of ionized Al or Sm could modify the Q function.

5. Conclusion

In conclusion, we have reported on some common features of the anodic plasma oxidation process in Al/InP, Al/Si, Al/GaAs and Sm/GaAs structures. For the first two structures the Al thickness was below 8 nm. For the last two ones it was less than 1.5 nm. In all cases the accelerated growth kinetics, under the assumption of the existence of a space charge in the oxide, indicated that both the density of the negative oxygen ions on the surfaces and the migration coefficients of ions increased if Al or Sm overlayers were used. We have tried to show that for a better physical description of the oxide growth process the time-dependent crosssection of the reaction between the negative oxygen ions with the semiconductor lattice atoms must be introduced.

and by uGaAs(T) = 5.65317 + 5.8 x 10-5( T- 298.15 K). (11)

The latter lattice constant 5.65317 A is that from our measurements. Application of (10) and (11) yielded the following approximate surface densities: nsi(at 300°C) = 3.385 X 1014 cm-* and nGaks (at 22O”C>= 3.128 x 1014 cmp2. We supposed that oxygen is drifting through the oxide layers as O- anions (2 = - 1). In the end, the cross-sections QGaAs, QA,,oaAs, Q Sm/GaAs and QAl,si were calculated. The results are shown in Table 4. For a more precise determination of Q, if one assumes that the cross-section is given by the state of the semiconductor lattice at the semicon-

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