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Formation of germanium (111) on graphene on insulator by rapid melting growth for novel germanium-on-insulator structure
Materials Letters 168 (2016) 223–227
Contents lists available at ScienceDirect
Materials Letters journal homepage: www.elsevier.com/locate/matlet
Formation of germanium (111) on graphene on insulator by rapid melting growth for novel germanium-on-insulator structure Tahsin Morshed a, Yuki Kai b, Ryo Matsumura b, Jong-Hyeok Park b, Hironori Chikita b, Taizoh Sadoh b, Abdul Manaf Hashim a,n a b
Malaysia-Japan International Institute of Technology, Universiti Teknologi Malaysia, Jalan Sultan Yahya Petra, 54100 Kuala Lumpur, Malaysia Department of Electronics, Kyushu University, 744 Motooka, Fukuoka 819-0395, Japan
art ic l e i nf o
a b s t r a c t
Article history: Received 16 December 2015 Received in revised form 6 January 2016 Accepted 13 January 2016 Available online 14 January 2016
We demonstrate the crystallization of the microstrips of electrodeposited amorphous germanium (Ge) on graphene on insulator by rapid melting growth for the first time. Growth of single-crystalline Ge microstrips with (111) orientation was confirmed. The high level of compressive strain was found to be resulted from the intermixing of C atoms from multilayer graphene (MLG) and Ge. Probably the introduction of local C atom into Ge film enhances nucleation of Ge on MLG, which results in (111)-oriented Ge nuclei. Subsequent lateral growth enables crystallization of Ge with (111) orientation on the entire microstrip. The results also indicate that graphene is very useful to suppress the spontaneous nucleation in the melting Ge films and the lattice rotation or misorientation. This novel and innovative technique provides a breakthrough towards the realization of high quality Ge-on-insulator structures to facilitate the next-generation ultra-large-scale integrated circuits (ULSIs) with multifunctionalities. & 2016 Elsevier B.V. All rights reserved.
Keywords: Crystal growth Carbon nanomaterials Electrodeposition Germanium-on-insulator Graphene Rapid melting growth
1. Introduction The performance of silicon ultra-large-scale integrated circuits (Si-ULSIs) has been enhanced over the last 30 years by increasing the number of transistors in accordance with Moore’s law [1]. The scaling rule of the Si transistor has made it possible to enhance the performance of the ULSIs. However, the miniaturization of the transistors becomes increasingly difficult owing to the physical limitations, and the conventional scaling rule will not be enough to enhance the performance of the ULSIs. Recently, the concept of advanced heterogeneous integration on Si platform was proposed by Takagi et al. towards the realization of a so-called “More than Moore” technology [2]. They proposed new semiconductor materials with higher mobility than Si such as germanium (Ge) to be introduced on the Si platform in order to not only enhance the performance of MOS transistors [3] but also to facilitate the present ULSIs with various functionalities where these materials can be used to fabricate various kinds of functional devices, such as optical devices, photodetectors, and solar batteries. In order to fabricate electronic devices in Ge, it is necessary to electrically isolate the Ge and the Si substrate by insulator. Therefore, some breakthrough on growth technologies is strongly required to n
Corresponding author. E-mail address: [email protected] (A.M. Hashim).
http://dx.doi.org/10.1016/j.matlet.2016.01.056 0167-577X/& 2016 Elsevier B.V. All rights reserved.
realize high quality Ge-on-insulator (GOI) structures. Graphene is a two-dimensional hexagonal network of carbon atoms which is formed by making strong triangular s-bonds of the sp2 hybridized orbitals. This bonding structure is similar to the cplane of a hexagonal crystalline structure and (111) plane of diamond structure. With this regard, the growth of (111) oriented Ge on graphene direction is feasible. It is well documented that graphene has a great potential for novel electronic devices to act as device channel, transparent electrode, sensing membrane and so forth, because of its extraordinary electrical, thermal, and mechanical properties, including a carrier mobility exceeding 104 cm2/Vs and a thermal conductivity of 103 W/mK [4–8]. Therefore, with the excellent electrical and thermal characteristics of graphene layers, growing Ge nanostructures and thin films on graphene layers would enable this Ge/graphene/SiO2/Si material system to be exploited in diverse sophisticated device applications. It is well documented that the rapid melting growth (RMG) technique allows the lateral liquid phase epitaxy of Ge on insulator on Si substrates where the grown Ge crystal maintains the crystallographic orientation of the Si wafer or Si seed [9,11]. It has been shown possible to grow chip length (1 cm) GOI strips (width: 3– 5 mm, thickness: 100 nm) [12] and the hybrid integration of (100), (110), and (111) orientated GOI on the same wafer [13]. The growth of (111) oriented GOI is particularly important because the
224
T. Morshed et al. / Materials Letters 168 (2016) 223–227
Fig. 1. (a) FESEM image of Ge microstrips (width 15 mm, length 200 mm) before annealing and (b) EBSD image in normal direction (nd). (For interpretation of the references to color in this figure, the reader is referred to the web version of this article.)
maximum electron mobility in the metal-oxide-semiconductor inversion layer is achieved in the (111) plane [14]. These works trigger an idea to employ graphene as a seed layer for the growth of Ge on insulator by crystallizing the electrodeposited amorphous Ge using the rapid melting process. RMG technique is expected to be able to overcome the problem of large lattice mismatches between graphene and Ge. So far, we have also successfully reported several interesting works on the growth of silicon carbide (SiC) [15] and zinc oxide (ZnO) [16–20] on insulator by utilizing graphene as a template layer. In this work, a liquid-phase method, namely an electrochemical deposition (ECD), will be used to deposit Ge on graphene. The ECD technique seems to be a promising method to grow Ge on graphene at room temperature with high purity and good controllability of growth rate [18–20]. The same procedure of sample preparation and rapid melting process that has been applied for the formation of Si-seeded GOI structure [10– 13] will be applied to crystallize the electrodeposited Ge.
2. Experimental details The deposition of Ge on multilayer graphene (MLG)/SiO2/Si(100) substrates (Graphene laboratories Inc., Calverton, NY, USA) was carried out in a mixture of 5% germanium(IV) chloride (GeCl4) in propylene glycol (C3H8O2) using a simple twoterminal ECD setup where graphene acted as a cathode and platinum (Pt) wire as an anode. It is worth noting that the coverage of MLG is around 95% and the properties of chemical vapor deposition grown graphene can be further found in Ref. [18]. The sample preparation including the ECD process was done at room temperature in a nitrogen-filled glove box. Both anode and cathode were connected to the external direct current (DC) power supply. The electrodeposition was operated under galvanostatic control where the current density was fixed during the deposition. The deposition was performed at fixed current density of 3.0 mA/cm2 (potential¼ 3.5 V) for 75 h. The thickness of the as-deposited Ge was 400 nm. After 75 h, the sample was removed immediately from the electrolyte and quickly rinsed with deionized (DI) water to remove any residue from the surface. The deposited Ge layer was then patterned into strips with 15 mm width and 200 mm length using conventional photolithography and wet chemical etching technique. Then, the exposed graphene was etched out by using oxygen (O2) plasma etching in order to improve the adhesion between the
capping layer and substrate's insulator. The patterned Ge strips were capped with 30 nm-thick SiNx followed by 1 mm-thick SiO2 layers deposited by magnetron sputtering to prevent severe agglomeration of Ge during the rapid melting process. Then, the capped Ge strips were heat treated by rapid thermal annealing process at 980 °C for 1 s. Finally, the capping layer was removed by chemical etching prior to the characterization. The as-deposited sample was cut to several pieces for the analysis which includes the characterization using Raman spectroscopy, electron back scattering diffraction (EBSD), field emission scanning electron microscopy (FESEM), and high-resolution transmission electron microscopy (HRTEM).
3. Results and discussion First, it is worth noting that the deposition mechanism of Ge using GeCl4:C3H8O2 is considered to be the same with the deposition of Ge on Si substrate [21–23]. From the cyclic voltammogram study, it shows two reduction processes where Ge(IV) is reduced to Ge(II) prior to the deposition of Ge on substrate as summarized by Eqs. (1) and (2) [23]. Ge4 þ þ 2e -Ge2 þ
(1)
Ge2 þ þ 2e -Ge
(2)
Fig. 1(a) shows the FESEM image of the patterned Ge microstrip before annealing where the morphology shows continuous and uniform strips. Based on the EDX spectra (data not shown), the deposited Ge film was found to be highly pure without any excessive contaminants such as Pt metal. Fig. 1(b) shows the color coded normal direction (ND) EBSD images of the Ge microstrip where it can be understood from the random distribution of colors that the crystal structure is amorphous. Fig. 2 shows the Raman spectra of the as-deposited layer and the heat treated Ge microstrip. It can be seen that no significant Ge–Ge vibration mode peak was observed for the as-deposited Ge, thus confirming that the structure was amorphous. From the Raman spectra, the main peak at 300 cm 1 which corresponds to Ge–Ge vibration mode was clearly observed after the rapid annealing process, confirming the crystallization of Ge. The value of full width half maximum (FWHM) of this peak was estimated to be around 3.4 cm 1, which is very close to the value of the
T. Morshed et al. / Materials Letters 168 (2016) 223–227
Fig. 2. Raman spectra of Ge microstrip before annealing and after annealing at 980 °C. Also shown the spectra of bulk Ge as a comparison.
standard single crystalline bulk Ge wafer of 3.1 cm 1, as shown in Fig. 2. Fig. 3(a) shows the FESEM image of heat treated Ge microstrip. Due to severe agglomeration, the strip's length shrunk to be about 70 mm. Fig. 3(b) shows the lateral strain profile evaluated by the Raman line scan of the heat treated Ge strip for the length of 60 mm, where negative values indicate compressive strains. Here,
(a)
225
it clearly shows large compressive strain has been generated up to 0.13%. The EBSD image, as shown in Fig. 3(c), indicates the singlecrystalline (111) oriented Ge strip with 70 mm length and 15 mm width. It was reported that only several mm Ge grain was grown without any seeding area [11]. Therefore, it can be concluded that MLG is playing the key role to enhance single-crystallization of (111) oriented Ge. Three locations which indicated the high compressive strain, medium strain, and low strain were chosen for the HRTEM observation. Fig. 3(d) shows the HRTEM image of the location with the high compressive strain. Here, the introduction of C atoms into the grown Ge layer was clearly recognized. Fig. 3 (e) shows the HRTEM image of the location with the medium compressive strain. Here, it shows less introduction of C atoms in the crystalline Ge. Fig. 3(f) shows the HRTEM image of the location with the low compressive strain. No structure of graphene was observed, suggesting that the measured area does not have a coverage of graphene since the total coverage of graphene on the entire substrate was initially 95%. The interface of crystalline Ge and SiO2 was clearly observed. The results seem to suggest that the compressive strain increases with the introduction of C atoms into the Ge layer. It was shown in Fig. 3(f) that crystalline Ge was observed on SiO2 where there is no graphene layer. In general, the crystallization of large grain single-crystal Ge on bare SiO2 is not possible to be obtained. This strongly suggests that the induction of lateral growth could start from the intermixing of Ge/graphene region. The region of the mixing of C atoms from the MLG and Ge is speculated to be the possible nucleation region of Ge (111) and the lateral growth has been induced from this nucleation region probably by the spatial gradient of solidification temperature.
Si Ge
(b)
Strain (%)
15 µm
-0.04 -0.06 -0.08 -0.1 -0.12 -0.14
HRTEM area
0
10
20
30 40 50 Position (µm)
60 111
Si
(111) Ge
100 110
(c) 15 µm
MLG
Interface
Ge Ge
MLG
MLG
5nm
(d)
Ge
[111] plane
(e)
[111] plane
SiO2
5nm
5nm
(f)
Fig. 3. (a) FESEM image, (b) strain distribution evaluated by Raman line scan, (c) EBSD image, and (d)–(f) HRTEM images of locations with three different level of strain. This is a heat-treated Ge microstrip.
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Ge (111) atomic arrangement
strips grown by Si-seeded RMG, where Si(100) substrates were employed as crystal seed [12]. Similarly, high carrier mobility (about 1000 cm2/V s) is also expected for this orientation-controlled single-crystal GOI strips obtained by the present study. These carrier mobilities are much higher than that for poly-Ge (about 140 cm2/V s) obtained by a conventional seed-free process such as a solid-phase crystallization [24].
4. Conclusions We demonstrate a novel innovative approach to obtain crystalline GOI structure on Si by introducing MLG template for the first time. Orientation controlled large and wide (111) Ge singlecrystal strip was obtained on graphene on insulator platform. The possible growth mechanism was proposed. This innovative technique will open up new vistas for developing Ge-based transferable devices by utilizing the flexibility of atomically thin graphene layers to facilitate the next-generation ultra-large-scale integrated circuits (ULSIs) with multifunctionalities.
Acknowledgements
Ge (111) nucleation site on MLG
Fig. 4. Possible nucleation mechanism for Ge (111) on MLG.
The similarity of lattice periodicity between graphene and Ge (111) makes the nucleation of Ge (111) feasible on graphene platform. Here, it can be understood that the intermixing of Ge/graphene is the possible nucleation site and the lateral growth has been induced from this nucleation region. Based on the HRTEM image of Ge/graphene intermixing region, a possible nucleation region is presented by a schematic diagram in Fig. 4, where MLG offers atomic arrangement to match with the (111) plane of Ge lattice. Thus, the results seem to suggest that the atomic arrangement of MLG with Ge may determine the crystallographic orientation of the nucleation of Ge, and the orientation of the whole strip is determined by the orientation of nuclei. Graphene also shows its capability to suppress the problem of lattice rotation or misorientation which is often reported to happen in the formation of Si-seeded GOI strip. Finally, it is worth noting that the high carrier mobility (about 1000 cm2/V s) was demonstrated for orientation-controlled GOI
T. Morshed thanks MJIIT for the scholarship and JASSO for financial support during the research attachment at Sadoh Laboratory, Kyushu University. This work was funded by the NSG Corp., UTM, MOSTI and MOE through various research grants.
References [1] R. Pillarisetty, Academic and industry research progress in germanium nanodevices, Nature 479 (2011) 324–328. [2] S. Takagi, M. Sugiyama, T. Yasuda, M. Takenaka, Ge/III–V channel engineering for future CMOS, ECS Trans. 19 (2009) 9–20. [3] K. Gopalakrishnan, P.B. Griffin, Kai. Ma, M.D. Deal, J.D. Plummer, MOSFETs and high-speed photodetectors on Ge-on-insulator substrates fabricated using rapid melt growth, in: Proceeding of IEEE International Electron Devices Meeting, San Francisco, CA, USA, 13–15 December 2004. [4] S.F.A. Rahman, S. Kasai, A.M. Hashim, Room temperature nonlinear of a graphene-based three-branch nanojunction device with chemical doping, Appl. Phys. Lett. 100 (2012) 193116:1–193116:3. [5] A.A. Balandin, Thermal properties of graphene and nanostructured carbon materials, Nat. Mater 10 (2011) 569–581. [6] A.A. Balandin, D.L. Nika, Phononics in low-dimensional materials, Mater. Today 15 (2012) 266–275. [7] S. Chen, Q. Wu, C. Mishra, J. Kang, H. Zhang, K. Cho, W. Cai, A.A. Balandin, R. S. Ruoff, Thermal conductivity of isotopically modified graphene, Nat. Mater. 11 (2012) 203–207. [8] S. Ghosh, D.L. Nika, E.P. Pokatilov, A.A. Balandin, Heat conduction in graphene: experimental study and theoretical interpretation, New J. Phys. 11 (2009) 095012:1–095012:19. [9] Y. Liu, M.D. Deal, J.D. Plummer, High-quality single-crystal Ge on insulator by liquid-phase epitaxy on Si substrates, Appl. Phys. Lett. 84 (2004) 2563–2565. [10] A.M. Hashim, M. Anisuzzaman, S. Muta, T. Sadoh, M. Miyao, Epitaxial-template structure utilizing Ge-on-insulator stripe arrays with nanospacing for advanced heterogeneous integration on Si platform, Jpn. J. Appl. Phys. 51 (2012) 06FF04:1–06FF04:5. [11] M. Miyao, T. Tanaka, K. Toko, M. Tanaka, Giant Ge-on-insulator formation by Si–Ge mixing-triggered liquid-phase epitaxy, Appl. Phys. Express 2 (2009) 045503. [12] K. Toko, Y. Ohta, T. Tanaka, T. Sadoh, M. Miyao, Chip-size formation of highmobility Ge strips on SiN films by cooling rate controlled rapid-melting growth, Appl. Phys. Lett. 99 (2011) 032103. [13] M. Kurosawa, N. Kawabata, T. Sadoh, M. Miyao, Hybrid-orientation Ge-oninsulator structures on (100) Si platform by Si micro-seed formation combined with rapid-melting growth, Appl. Phys. Lett. 100 (2012) 172107. [14] T. Nishimura, C.H. Lee, T. Tabata, S.K. Wang, K. Nagashio, K. Kita, A. Toriumi, High-electron-mobility Ge n-channel metal-oxide-semiconductor field-effect transistors with high-pressure oxidized Y2O3, Appl. Phys. Express 4 (2011) 064201. [15] B. Astuti, M. Tanikawa, S.F.A. Rahman, K. Yasui, A.M. Hashim, Graphene as a buffer layer for silicon carbide-on-insulator structures, Materials 5 (2012) 2270–2279. [16] N.F. Ahmad, N.I. Rusli, M.R. Mahmood, K. Yasui, A.M. Hashim, Seed/catalyst-
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[17]
[18]
[19]
[20]
free growth of zinc oxide nanostructures on multilayer graphene by thermal evaporation, Nanoscale Res. Lett. 9 (2014) 83. N.F. Ahmad, K. Yasui, A.M. Hashim, Seed/catalyst-free growth of zinc oxide on graphene by thermal evaporation: effects of substrate inclination angles and graphene thicknesses, Nanoscale Res. Lett. 10 (2015) 10. N.S.A. Aziz, M.R. Mahmood, K. Yasui, A.M. Hashim, Seed/catalyst-free vertical growth of high-density electrodeposited zinc oxide nanostructures on a single-layer graphene, Nanoscale Res. Lett. 9 (2014) 95. N.S.A. Aziz, T. Nishiyama, N.I. Rusli, M.R. Mahmood, K. Yasui, A.M. Hashim, Seedless growth of zinc oxide flower-shaped structures on multilayer graphene by electrochemical deposition, Nanoscale Res. Lett. 9 (2014) 337. N.A. Hambali, H. Yahaya, M.R. Mahmood, T. Terasako, A.M. Hashim, Synthesis of zinc oxide nanostructures on graphene/glass substrate by electrochemical deposition: effects of current density and temperature, Nanoscale Res. Lett. 9 (2014) 609.
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[21] M.S.Z. Abidin, R. Matsumura, M. Anisuzzaman, J.H. Park, S. Muta, M. R. Mahmood, T. Sadoh, A.M. Hashim, Crystallization of electrodeposited germanium thin film on silicon (100), Materials 6 (2013) 5047–5057. [22] M.S.Z. Abidin, T. Morshed, H. Chikita, Y. Kinoshita, S. Muta, M. Anisuzzaman, J. H. Park, S.R. Matsumura, M.R. Mahmood, T. Sadoh, A.M. Hashim, The effects of annealing temperatures on composition and strain in SixGe1 x obtained by melting growth of electrodeposited Ge on Si (100), Materials 7 (2014) 1409–1421. [23] M.S.Z. Abidin, Shahjahan, M.R. Mahmood, A.M. Hashim, Electrodeposited germanium on silicon substrate using a mixture of germanium tetrachloride and propylene glycol, J. Teknol. 72 (2014) 77–82. [24] K. Toko, I. Nakao, T. Sadoh, T. Noguchi, M. Miyao, Electrical properties of polyGe on glass substrate grown by two-step solid-phase crystallization, SolidState Electron. 53 (2009) 1159–1164.
Contents lists available at ScienceDirect
Materials Letters journal homepage: www.elsevier.com/locate/matlet
Formation of germanium (111) on graphene on insulator by rapid melting growth for novel germanium-on-insulator structure Tahsin Morshed a, Yuki Kai b, Ryo Matsumura b, Jong-Hyeok Park b, Hironori Chikita b, Taizoh Sadoh b, Abdul Manaf Hashim a,n a b
Malaysia-Japan International Institute of Technology, Universiti Teknologi Malaysia, Jalan Sultan Yahya Petra, 54100 Kuala Lumpur, Malaysia Department of Electronics, Kyushu University, 744 Motooka, Fukuoka 819-0395, Japan
art ic l e i nf o
a b s t r a c t
Article history: Received 16 December 2015 Received in revised form 6 January 2016 Accepted 13 January 2016 Available online 14 January 2016
We demonstrate the crystallization of the microstrips of electrodeposited amorphous germanium (Ge) on graphene on insulator by rapid melting growth for the first time. Growth of single-crystalline Ge microstrips with (111) orientation was confirmed. The high level of compressive strain was found to be resulted from the intermixing of C atoms from multilayer graphene (MLG) and Ge. Probably the introduction of local C atom into Ge film enhances nucleation of Ge on MLG, which results in (111)-oriented Ge nuclei. Subsequent lateral growth enables crystallization of Ge with (111) orientation on the entire microstrip. The results also indicate that graphene is very useful to suppress the spontaneous nucleation in the melting Ge films and the lattice rotation or misorientation. This novel and innovative technique provides a breakthrough towards the realization of high quality Ge-on-insulator structures to facilitate the next-generation ultra-large-scale integrated circuits (ULSIs) with multifunctionalities. & 2016 Elsevier B.V. All rights reserved.
Keywords: Crystal growth Carbon nanomaterials Electrodeposition Germanium-on-insulator Graphene Rapid melting growth
1. Introduction The performance of silicon ultra-large-scale integrated circuits (Si-ULSIs) has been enhanced over the last 30 years by increasing the number of transistors in accordance with Moore’s law [1]. The scaling rule of the Si transistor has made it possible to enhance the performance of the ULSIs. However, the miniaturization of the transistors becomes increasingly difficult owing to the physical limitations, and the conventional scaling rule will not be enough to enhance the performance of the ULSIs. Recently, the concept of advanced heterogeneous integration on Si platform was proposed by Takagi et al. towards the realization of a so-called “More than Moore” technology [2]. They proposed new semiconductor materials with higher mobility than Si such as germanium (Ge) to be introduced on the Si platform in order to not only enhance the performance of MOS transistors [3] but also to facilitate the present ULSIs with various functionalities where these materials can be used to fabricate various kinds of functional devices, such as optical devices, photodetectors, and solar batteries. In order to fabricate electronic devices in Ge, it is necessary to electrically isolate the Ge and the Si substrate by insulator. Therefore, some breakthrough on growth technologies is strongly required to n
Corresponding author. E-mail address: [email protected] (A.M. Hashim).
http://dx.doi.org/10.1016/j.matlet.2016.01.056 0167-577X/& 2016 Elsevier B.V. All rights reserved.
realize high quality Ge-on-insulator (GOI) structures. Graphene is a two-dimensional hexagonal network of carbon atoms which is formed by making strong triangular s-bonds of the sp2 hybridized orbitals. This bonding structure is similar to the cplane of a hexagonal crystalline structure and (111) plane of diamond structure. With this regard, the growth of (111) oriented Ge on graphene direction is feasible. It is well documented that graphene has a great potential for novel electronic devices to act as device channel, transparent electrode, sensing membrane and so forth, because of its extraordinary electrical, thermal, and mechanical properties, including a carrier mobility exceeding 104 cm2/Vs and a thermal conductivity of 103 W/mK [4–8]. Therefore, with the excellent electrical and thermal characteristics of graphene layers, growing Ge nanostructures and thin films on graphene layers would enable this Ge/graphene/SiO2/Si material system to be exploited in diverse sophisticated device applications. It is well documented that the rapid melting growth (RMG) technique allows the lateral liquid phase epitaxy of Ge on insulator on Si substrates where the grown Ge crystal maintains the crystallographic orientation of the Si wafer or Si seed [9,11]. It has been shown possible to grow chip length (1 cm) GOI strips (width: 3– 5 mm, thickness: 100 nm) [12] and the hybrid integration of (100), (110), and (111) orientated GOI on the same wafer [13]. The growth of (111) oriented GOI is particularly important because the
224
T. Morshed et al. / Materials Letters 168 (2016) 223–227
Fig. 1. (a) FESEM image of Ge microstrips (width 15 mm, length 200 mm) before annealing and (b) EBSD image in normal direction (nd). (For interpretation of the references to color in this figure, the reader is referred to the web version of this article.)
maximum electron mobility in the metal-oxide-semiconductor inversion layer is achieved in the (111) plane [14]. These works trigger an idea to employ graphene as a seed layer for the growth of Ge on insulator by crystallizing the electrodeposited amorphous Ge using the rapid melting process. RMG technique is expected to be able to overcome the problem of large lattice mismatches between graphene and Ge. So far, we have also successfully reported several interesting works on the growth of silicon carbide (SiC) [15] and zinc oxide (ZnO) [16–20] on insulator by utilizing graphene as a template layer. In this work, a liquid-phase method, namely an electrochemical deposition (ECD), will be used to deposit Ge on graphene. The ECD technique seems to be a promising method to grow Ge on graphene at room temperature with high purity and good controllability of growth rate [18–20]. The same procedure of sample preparation and rapid melting process that has been applied for the formation of Si-seeded GOI structure [10– 13] will be applied to crystallize the electrodeposited Ge.
2. Experimental details The deposition of Ge on multilayer graphene (MLG)/SiO2/Si(100) substrates (Graphene laboratories Inc., Calverton, NY, USA) was carried out in a mixture of 5% germanium(IV) chloride (GeCl4) in propylene glycol (C3H8O2) using a simple twoterminal ECD setup where graphene acted as a cathode and platinum (Pt) wire as an anode. It is worth noting that the coverage of MLG is around 95% and the properties of chemical vapor deposition grown graphene can be further found in Ref. [18]. The sample preparation including the ECD process was done at room temperature in a nitrogen-filled glove box. Both anode and cathode were connected to the external direct current (DC) power supply. The electrodeposition was operated under galvanostatic control where the current density was fixed during the deposition. The deposition was performed at fixed current density of 3.0 mA/cm2 (potential¼ 3.5 V) for 75 h. The thickness of the as-deposited Ge was 400 nm. After 75 h, the sample was removed immediately from the electrolyte and quickly rinsed with deionized (DI) water to remove any residue from the surface. The deposited Ge layer was then patterned into strips with 15 mm width and 200 mm length using conventional photolithography and wet chemical etching technique. Then, the exposed graphene was etched out by using oxygen (O2) plasma etching in order to improve the adhesion between the
capping layer and substrate's insulator. The patterned Ge strips were capped with 30 nm-thick SiNx followed by 1 mm-thick SiO2 layers deposited by magnetron sputtering to prevent severe agglomeration of Ge during the rapid melting process. Then, the capped Ge strips were heat treated by rapid thermal annealing process at 980 °C for 1 s. Finally, the capping layer was removed by chemical etching prior to the characterization. The as-deposited sample was cut to several pieces for the analysis which includes the characterization using Raman spectroscopy, electron back scattering diffraction (EBSD), field emission scanning electron microscopy (FESEM), and high-resolution transmission electron microscopy (HRTEM).
3. Results and discussion First, it is worth noting that the deposition mechanism of Ge using GeCl4:C3H8O2 is considered to be the same with the deposition of Ge on Si substrate [21–23]. From the cyclic voltammogram study, it shows two reduction processes where Ge(IV) is reduced to Ge(II) prior to the deposition of Ge on substrate as summarized by Eqs. (1) and (2) [23]. Ge4 þ þ 2e -Ge2 þ
(1)
Ge2 þ þ 2e -Ge
(2)
Fig. 1(a) shows the FESEM image of the patterned Ge microstrip before annealing where the morphology shows continuous and uniform strips. Based on the EDX spectra (data not shown), the deposited Ge film was found to be highly pure without any excessive contaminants such as Pt metal. Fig. 1(b) shows the color coded normal direction (ND) EBSD images of the Ge microstrip where it can be understood from the random distribution of colors that the crystal structure is amorphous. Fig. 2 shows the Raman spectra of the as-deposited layer and the heat treated Ge microstrip. It can be seen that no significant Ge–Ge vibration mode peak was observed for the as-deposited Ge, thus confirming that the structure was amorphous. From the Raman spectra, the main peak at 300 cm 1 which corresponds to Ge–Ge vibration mode was clearly observed after the rapid annealing process, confirming the crystallization of Ge. The value of full width half maximum (FWHM) of this peak was estimated to be around 3.4 cm 1, which is very close to the value of the
T. Morshed et al. / Materials Letters 168 (2016) 223–227
Fig. 2. Raman spectra of Ge microstrip before annealing and after annealing at 980 °C. Also shown the spectra of bulk Ge as a comparison.
standard single crystalline bulk Ge wafer of 3.1 cm 1, as shown in Fig. 2. Fig. 3(a) shows the FESEM image of heat treated Ge microstrip. Due to severe agglomeration, the strip's length shrunk to be about 70 mm. Fig. 3(b) shows the lateral strain profile evaluated by the Raman line scan of the heat treated Ge strip for the length of 60 mm, where negative values indicate compressive strains. Here,
(a)
225
it clearly shows large compressive strain has been generated up to 0.13%. The EBSD image, as shown in Fig. 3(c), indicates the singlecrystalline (111) oriented Ge strip with 70 mm length and 15 mm width. It was reported that only several mm Ge grain was grown without any seeding area [11]. Therefore, it can be concluded that MLG is playing the key role to enhance single-crystallization of (111) oriented Ge. Three locations which indicated the high compressive strain, medium strain, and low strain were chosen for the HRTEM observation. Fig. 3(d) shows the HRTEM image of the location with the high compressive strain. Here, the introduction of C atoms into the grown Ge layer was clearly recognized. Fig. 3 (e) shows the HRTEM image of the location with the medium compressive strain. Here, it shows less introduction of C atoms in the crystalline Ge. Fig. 3(f) shows the HRTEM image of the location with the low compressive strain. No structure of graphene was observed, suggesting that the measured area does not have a coverage of graphene since the total coverage of graphene on the entire substrate was initially 95%. The interface of crystalline Ge and SiO2 was clearly observed. The results seem to suggest that the compressive strain increases with the introduction of C atoms into the Ge layer. It was shown in Fig. 3(f) that crystalline Ge was observed on SiO2 where there is no graphene layer. In general, the crystallization of large grain single-crystal Ge on bare SiO2 is not possible to be obtained. This strongly suggests that the induction of lateral growth could start from the intermixing of Ge/graphene region. The region of the mixing of C atoms from the MLG and Ge is speculated to be the possible nucleation region of Ge (111) and the lateral growth has been induced from this nucleation region probably by the spatial gradient of solidification temperature.
Si Ge
(b)
Strain (%)
15 µm
-0.04 -0.06 -0.08 -0.1 -0.12 -0.14
HRTEM area
0
10
20
30 40 50 Position (µm)
60 111
Si
(111) Ge
100 110
(c) 15 µm
MLG
Interface
Ge Ge
MLG
MLG
5nm
(d)
Ge
[111] plane
(e)
[111] plane
SiO2
5nm
5nm
(f)
Fig. 3. (a) FESEM image, (b) strain distribution evaluated by Raman line scan, (c) EBSD image, and (d)–(f) HRTEM images of locations with three different level of strain. This is a heat-treated Ge microstrip.
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Ge (111) atomic arrangement
strips grown by Si-seeded RMG, where Si(100) substrates were employed as crystal seed [12]. Similarly, high carrier mobility (about 1000 cm2/V s) is also expected for this orientation-controlled single-crystal GOI strips obtained by the present study. These carrier mobilities are much higher than that for poly-Ge (about 140 cm2/V s) obtained by a conventional seed-free process such as a solid-phase crystallization [24].
4. Conclusions We demonstrate a novel innovative approach to obtain crystalline GOI structure on Si by introducing MLG template for the first time. Orientation controlled large and wide (111) Ge singlecrystal strip was obtained on graphene on insulator platform. The possible growth mechanism was proposed. This innovative technique will open up new vistas for developing Ge-based transferable devices by utilizing the flexibility of atomically thin graphene layers to facilitate the next-generation ultra-large-scale integrated circuits (ULSIs) with multifunctionalities.
Acknowledgements
Ge (111) nucleation site on MLG
Fig. 4. Possible nucleation mechanism for Ge (111) on MLG.
The similarity of lattice periodicity between graphene and Ge (111) makes the nucleation of Ge (111) feasible on graphene platform. Here, it can be understood that the intermixing of Ge/graphene is the possible nucleation site and the lateral growth has been induced from this nucleation region. Based on the HRTEM image of Ge/graphene intermixing region, a possible nucleation region is presented by a schematic diagram in Fig. 4, where MLG offers atomic arrangement to match with the (111) plane of Ge lattice. Thus, the results seem to suggest that the atomic arrangement of MLG with Ge may determine the crystallographic orientation of the nucleation of Ge, and the orientation of the whole strip is determined by the orientation of nuclei. Graphene also shows its capability to suppress the problem of lattice rotation or misorientation which is often reported to happen in the formation of Si-seeded GOI strip. Finally, it is worth noting that the high carrier mobility (about 1000 cm2/V s) was demonstrated for orientation-controlled GOI
T. Morshed thanks MJIIT for the scholarship and JASSO for financial support during the research attachment at Sadoh Laboratory, Kyushu University. This work was funded by the NSG Corp., UTM, MOSTI and MOE through various research grants.
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