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FPGA based acceleration and deceleration circuit for industrial robots and CNC machine tools
Mechatronics 12 (2002) 635–642
Technical Note
FPGA based acceleration and deceleration circuit for industrial robots and CNC machine tools Jae Wook Jeon *, Yun-Ki Kim School of Electrical and Computer Engineering, Sungkyunkwan University, 300 Chunchun-Dong, Jangan-Gu, Suwon City, Kyungki-Do, 440-746, South Korea Received 23 October 1998; accepted 25 September 2000
Abstract In order to make industrial robots and computer numerical control (CNC) machine tools perform tasks efficiently, many techniques for the acceleration and deceleration of industrial robots and CNC machine tools have been proposed. Polynomial technique can generate velocity profiles of various acceleration and deceleration characteristics, but it requires a lot of computations. Digital convolution technique can generate efficiently velocity profiles, but it cannot generate velocity profiles with some kinds of acceleration and deceleration characteristics. This paper proposes an efficient approach for generating velocity profiles that cannot be generated by previous techniques as well as velocity profiles generated by them. Based on the proposed approach, an acceleration and deceleration circuit for industrial robots and CNC machine tools is designed by using the VHDL and it is implemented with a FPGA. A velocity profile generated by the acceleration and deceleration circuit will be applied to one single-axis control system. Ó 2002 Published by Elsevier Science Ltd.
1. Introduction In order to make industrial robot and computer numerical control (CNC) machine tools move more accurately and more quickly, one of the important factors is efficiently generating velocity profiles that have the desired acceleration and deceleration characteristics. One of the existing techniques for generating velocity profiles is generating position trajectories by the selection of polynomial functions [1]. This technique can generate various velocity profiles of which the deceleration charac*
Corresponding author. Tel.: +82-31-290-7129; fax: +82-31-290-7231. E-mail addresses: [email protected] (J.W. Jeon), [email protected] (Y.-K. Kim).
0957-4158/02/$ - see front matter Ó 2002 Published by Elsevier Science Ltd. PII: S 0 9 5 7 - 4 1 5 8 ( 0 1 ) 0 0 0 1 2 - 5
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J.W. Jeon, Y.-K. Kim / Mechatronics 12 (2002) 635–642
teristics can be independent from the acceleration characteristics. Since the computational load is increased almost exponentially with the order of polynomial in this technique, it requires a lot of computations to generate smooth velocity profiles with small jerk preferred for industrial robots and CNC machine tools [2–5]. Other existing techniques for generating velocity profiles are based on a digital convolution [5–9]. These techniques are much more efficient than the techniques selecting polynomial functions. But, some velocity profiles that are useful for industrial robots and CNC machine tools cannot be generated by these techniques [4]. In this paper, a generalized approach for the acceleration and deceleration of industrial robots and CNC machine tools is proposed. The proposed technique is as simple and efficient as the techniques based on a digital convolution and can generate more various velocity profiles than the techniques based on a digital convolution can. According to the acceleration characteristics, the deceleration characteristics, and the acceleration interval, and the deceleration interval, some coefficients are calculated and are stored in advance. Given a desired moving distance, a velocity profile that has the desired characteristics is generated by calculating the position increment during each sampling time. The position increment during each sampling is calculated by multiplying the stored coefficients with the product of one sampling time and the velocity after acceleration. Based on the proposed approach, an acceleration and deceleration circuit for industrial robots and CNC machine tools is designed by using the VHDL and it is implemented with a FPGA. In Section 2, it will be explained how to generate a desired velocity profile by the proposed technique. In Section 3, an acceleration and deceleration circuit based on the proposed approach will be designed and be implemented with a FPGA. In Section 4, an unsymmetrical smooth velocity profile generated by the acceleration and deceleration circuit will be applied to one single-axis control system. 2. Proposed trajectory generation technique Let us consider one single-axis control system of which the maximum velocity, the maximum acceleration, and the sampling time are Vmax , Amax and Ts , respectively. Let fa ðuÞ and fd ðuÞ represent the desired acceleration and deceleration characteristics, respectively, where fa ð0Þ ¼ 0, fa ð1Þ ¼ 1, fd ð0Þ ¼ 1, fd ð1Þ ¼ 0, and max jfa ðuÞj ¼ 06u61 R1 R1 max jfd ðuÞj ¼ 1. Defining aa ¼ 0 fa ðuÞ du and ad ¼ 0 fd ðuÞ du, aa and ad can be 06u61
calculated from the desired acceleration and deceleration characteristics, respectively, and be stored in advance. For some integers na and nd , defining a ck ¼ R k=na R k=nd fa ðuÞ du for k ¼ 1; 2; . . . ; na and d ck ¼ nd ðk1Þ=n fd ðuÞ du for k ¼ 1; 2; . . . ; na ðk1Þ=n a d nd , a ck can be calculated from na and the desired acceleration characteristics, and d ck can be calculated from nd and the desired deceleration characteristics. They can be stored in advance. Given an acceleration interval Ta ¼ na Ts , a deceleration interval Td ¼ nd Ts , and a distance S, a velocity profile with the acceleration characteristic, fa ðuÞ, and the deceleration characteristic, fd ðuÞ, can be generated as the following:
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(i) For an acceleration interval Ta ¼ na Ts and a deceleration interval Td ¼ nd Ts , the corresponding coefficients a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd are retrieved. (ii) For moving a distance S, the velocity after the acceleration Vm is determined as 8 S > > if N 6 0; S > : if N > 0; N þ aa na þ ad nd where N¼
S Vmax Ts
aa na ad nd :
ð2Þ
(iii) Then the position increment during each sampling time is calculated as a ck V m T s ; 1 6 k 6 na ; if N 6 0 dP ðkTs Þ ¼ d ð3Þ cðkna Þ Vm Ts ; na þ 1 6 k 6 na þ nd ; 8 a 1 6 k 6 na ; > < ck V m T s ; T ; n V ð4Þ if N > 0 dP ðkTs Þ ¼ m s a þ 1 6 k 6 na þ N ; > : dc na þ N þ 1 6 k 6 na þ N þ nd : ðkna N Þ Vm Ts ; Since the coefficients a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd has been calculated and stored in advance, the velocity profile with the desired acceleration and deceleration characteristics can be efficiently calculated for a given distance. Since the coefficients d c1 ; d c2 ; . . . ; d cnd can be selected independently from the coefficients a c1 ; a c2 ; . . . ; a cna , the deceleration characteristics can be made to be independent from the acceleration characteristics.
3. Design of an acceleration and deceleration circuit The proposed approach is designed as in Fig. 1 [2,9]. The coefficients that represent acceleration and deceleration characteristics a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd are stored in coefficient memory (CM). CM is not inside the FPGA, but consists of EPROMs. In order to perform fixed-point arithmetic rather than floating-point arithmetic, the coefficients a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd are multiplied by 128 and the corresponding integer values are stored in CM. The relation of the input clock frequency fclk and the sampling time Ts is given by fclk ¼ ð4 2048Þð1=Ts Þ. The value of C selects a velocity profile that has the desired acceleration and deceleration characteristics. The maximum position increment Vmax Ts when a motor is running at the maximum velocity Vmax is given by Fmax and its unit is the pulse. The maximum of Fmax is set to 2047. One pulse means the minimum value of position increment commands in industrial robots and CNC machine tools. na and nd represent the intervals of acceleration and deceleration, respectively, as in before. S is the distance of which the unit is pulse.
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CM γ
CG
VDD
RPC
Counter
γ
δP PI
CPG
Comparator1
Comparator2
Fig. 1. The architecture of proposed acceleration and deceleration circuit.
3.1. Clock generator The block clock generator (CG) divide the input clock, clk, by 4 and 2 to make cpg_clk and high_en, respectively. That is, the frequency fcpg clk of cpg_clk and the frequency fhigh en of high_en are given by fcpg clk ¼ fclk =4 and fhigh en ¼ fclk =2. The cpg_clk is used in the adding operation of the block command pulse generator (CPG) and in the Counter. The high_en is used in order to count the outputs of CPG when the outputs of CPG are remaining at ‘1’. 3.2. Determination of velocity after acceleration and deceleration distance The block velocity after acceleration and deceleration distance (VDD) selects a velocity profile that has the desired acceleration and deceleration characteristics by the input C, and selects aa and ad corresponding to na and nd . As in Eqs. (1) and (2), the velocity after acceleration Vm is given by the distance Vm Ts during one sampling time. The value of Vm Ts is calculated in the pulse unit and is represented by Fm . The distance Sd during the deceleration interval is determined by Fm , ad , and nd . These calculations are performed with fixed-point numbers in order to make a simple circuit. Fm is calculated as
J.W. Jeon, Y.-K. Kim / Mechatronics 12 (2002) 635–642
Fm ¼
8 < :
ð128SÞ ð128aa Þna þ ð128ad Þnd
Fmax
639
if ½ð128aa Þna þ ð128ad Þnd Fmax P ð128SÞ if ½ð128aa Þna þ ð128ad Þnd Fmax < ð128SÞ
ð5Þ If the value of Fm is calculated as zero, then a motor is not moving. Thus, if this happens, the value of Fm is set to 1. The second comparator (Comparator 2) as in Fig. 1 prevents the errors that may result from the difference of this setting and the true value of Fm . When the remaining distance Sr is zero, the second comparator sends a pulse-stop signal to the block CPG, which results in the stop of pulse generation. The distance Sd during the deceleration interval is calculated with fixed-point numbers as in the calculation of Fm .
ð128ad Þnd Fm Sd ¼ ð6Þ 128 3.3. Determination of position increment during each sampling time The block position increment (PI) during each sampling time calculates the position increment dP during each sampling time by multiplying Fm and a c1 ; a c2 ; . . . ; a cna , or d c1 ; d c2 ; . . . ; d cnd . Since the coefficients a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd are multiplied by 128 and the corresponding integer values are stored in CM, the output dP of the block PI is the product of 128 and the true value of dP . Since the maximum value of Fmax is 2047, the maximum value of the output dP of the block PI is 2047 128. Thus, the number of bits of dP is 18. The true value of dP is obtained in the block CPG with dividing the output dP of the block PI by 128. 3.4. Command pulse generator The block CPG performs the similar function as digital differential analyzer (DDA) [2,7,9]. According to the period of the cpg_clk, the output dP of the block PI is added and the addition result is stored in the 18-bit register. The carry in this 18-bit register is the output of the block CPG. The high_en is used in order to count the outputs of the block CPG when the outputs are remaining at 1. The input clock frequency fclk and the frequency fcpg clk of cpg_clk and the sampling time Ts have the relation of fclk ¼ ð4 2048Þð1=Ts Þ and fcpg clk ¼ fclk =4. If dP is the input of the block CPG during one sampling time, then the corresponding output pulse of the block CPG is calculated as ðdP fcpg clk Ts Þ=218 ¼ ðdP 2048Þ=218 ¼ dP =128 and therefore the true value of dP is obtained. 3.5. Determination of deceleration start time The block remaining pulse calculator (RPC) and the first comparator (Comparator 1) determine when the deceleration starts. The remaining distance Sr represents the amount of the remaining movement. The block RPC calculates Sr by decrementing the value of given distance S each time one output pulse of the block CPG
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is generated. Comparing Sr with the distance Sd during the deceleration interval determines when the deceleration starts. That is, when Sr is the same as Sd , the output value UD of the first comparator is changed to 1 and the deceleration is starting. 3.6. Determination of coefficients in velocity profiles As in the above, the coefficients ð128a c1 Þ; ð128a c2 Þ; . . . ; ð128a cna Þ and ð128d c1 Þ; ð128d c2 Þ; . . . ; ð128d cnd Þ representing the acceleration and deceleration characteristics, respectively, are stored in CM. If the output value UD of the first comparator is 0, the portion of CM storing ð128a c1 Þ; ð128a c2 Þ; . . . ; ð128a cna Þ is selected. If UD is 1, that of CM storing ð128d c1 Þ; ð128d c2 Þ; . . . ; ð128d cnd Þ is selected. Thus, during the acceleration, the upper address of CM is determined by the value C and the acceleration interval na and the lower address of CM is determined by the value of counter. Similarly, during the deceleration, the upper address of CM is determined by the value C and the deceleration interval nd and the lower address of CM is determined by the value of counter. There are two counters in the Counter block. One counter is used during the acceleration and represents the lower address of CM storing ð128a c1 Þ; ð128a c2 Þ; . . . ; ð128a cna Þ. The other is used during the deceleration and represents the lower address of CM storing ð128d c1 Þ; ð128d c2 Þ; . . . ; ð128d cnd Þ. If UD is 0, then the counter used during the acceleration is incremented according to cpg_clk. Since the bit positions from 11 to 17 of the counter output are connected to the bit positions from 0 to 6 of the address of CM, the address of CM is incremented on the 2048th period of the cpg_clk. The address of CM is constant during the sampling time Ts and therefore the frequency of the cpg_clk fcpg clk and the sampling time Ts have the relation of fcpg clk ¼ 2048ð1=Ts Þ. Since the cpg_clk is obtained with dividing the input clock clk by 4, the input clock clk and the sampling time Ts have the relation of fclk ¼ ð4 2048Þð1=Ts Þ. If the value of the counter used during the acceleration is ð2048na 1Þ, the counting operation stops and the same counter value remains. If UD is 1, then the counter used during the deceleration is incremented according to cpg_clk. As in the counter used during the acceleration, since the bit positions from 11 to 17 of the counter output are connected to the bit positions from 0 to 6 of the address of CM, the address of CM is incremented on the 2048th period of the cpg_clk. If the value of the counter used for during the deceleration is ð2048nd 1Þ, the counting operation stops and the same counter value remains.
4. Experiments In order to implement the proposed acceleration and deceleration circuit as in Fig. 1, an ALTERA EPF10K40RC208-4 that has 2304 logic elements and 8 embedded array blocks has been used [10]. The experimental setup consists of one brushless DC servo motor system with the load of an iron disk and the sampling time is 4 ms. The motor resolution and the maximum velocity Vmax are 4096 pulses/rev and 3000 rpm, respectively. The radius and the thickness of the iron disk are 40 and 8 mm, respectively. The input clock frequency fclk is 2.048 MHz to match to this sampling
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Fig. 2. A velocity command and its response.
time. The maximum of the input clock frequency fclk in the ALTERA EPF10K40RC208-4 is 17.33 MHz, and therefore the smaller sampling time can be used. Given S ¼ 100 000 pulses, Ta ¼ 240 ms, and Td ¼ 320 ms, an unsymmetrical smooth velocity profile of which the acceleration and deceleration characteristics are given by fa ðuÞ ¼ Vm sinð0:5puÞ and fd ðuÞ ¼ 0:5Vm ðsinðpðu 1:5ÞÞ þ 1Þ, respectively, has been generated by the proposed circuit and applied to the brushless DC servo system. This unsymmetrical smooth velocity profile cannot be generated by digital convolution techniques. Fig. 2 shows the result of the position control under a proportional control with gain 96/256.
5. Conclusion A generalized approach for the acceleration and deceleration of industrial robots and CNC machine tools has been proposed. The acceleration and deceleration circuit based on the proposed approach is designed and is implemented. Since the implemented circuit can generate an arbitrary velocity profile that cannot be generated by digital convolution techniques, the implemented circuit can generate an appropriate velocity profile in order to perform a given task more efficiently for industrial robots and CNC machine tools. Also, the implemented circuit can be applied to a real-time robot control with external sensors.
References [1] Fu KS, Gonzalez RC, Lee CSG. Robotics: control, sensing, vision and intelligence. New York: McGraw-Hill, 1987. [2] Inaba H, et al. Method and Apparatus for Controlling the Acceleration and Deceleration of a Movable Element without Abrupt Changes in Motion. United States Patent, Patent No. 4 555 758. 26 November, 1985. [3] Jeon JW. Method for Controlling the Traveling Path of a Robot during Acceleration and Deceleration. United States Patent, Patent No. 5 373 439. 13 December, 1994.
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[4] Jeon JW. An efficient acceleration for fast motion of industrial robots. Proceedings of IEEE 21st IECON, 6–10 November 1995. Orlando, FL. p. 1336–41. [5] Kim DI, Jeon JW, Kim S. Software acceleration/deceleration methods for industrial robots and CNC machine tools. Mechatronics 1994;4(1):37–53. [6] Khalsa DS. High performance motion control trajectory commands based on the convolution integral and digital filtering. Proceedings of Intelligent Motion 1990:54–61. [7] Nozawa R, et al. Acceleration/Deceleration Circuit, United States Patent, Patent No. 4 554 497. 19 November, 1985. [8] Masory O, Koren Y. Reference-word circular interpolators for CNC Systems. Trans of ASME J Eng Ind 1982;104:400–5. [9] Koren Y. Computer control of manufacturing systems. New York: McGraw-Hill, 1988. [10] ALTERA data book, 1998.
Technical Note
FPGA based acceleration and deceleration circuit for industrial robots and CNC machine tools Jae Wook Jeon *, Yun-Ki Kim School of Electrical and Computer Engineering, Sungkyunkwan University, 300 Chunchun-Dong, Jangan-Gu, Suwon City, Kyungki-Do, 440-746, South Korea Received 23 October 1998; accepted 25 September 2000
Abstract In order to make industrial robots and computer numerical control (CNC) machine tools perform tasks efficiently, many techniques for the acceleration and deceleration of industrial robots and CNC machine tools have been proposed. Polynomial technique can generate velocity profiles of various acceleration and deceleration characteristics, but it requires a lot of computations. Digital convolution technique can generate efficiently velocity profiles, but it cannot generate velocity profiles with some kinds of acceleration and deceleration characteristics. This paper proposes an efficient approach for generating velocity profiles that cannot be generated by previous techniques as well as velocity profiles generated by them. Based on the proposed approach, an acceleration and deceleration circuit for industrial robots and CNC machine tools is designed by using the VHDL and it is implemented with a FPGA. A velocity profile generated by the acceleration and deceleration circuit will be applied to one single-axis control system. Ó 2002 Published by Elsevier Science Ltd.
1. Introduction In order to make industrial robot and computer numerical control (CNC) machine tools move more accurately and more quickly, one of the important factors is efficiently generating velocity profiles that have the desired acceleration and deceleration characteristics. One of the existing techniques for generating velocity profiles is generating position trajectories by the selection of polynomial functions [1]. This technique can generate various velocity profiles of which the deceleration charac*
Corresponding author. Tel.: +82-31-290-7129; fax: +82-31-290-7231. E-mail addresses: [email protected] (J.W. Jeon), [email protected] (Y.-K. Kim).
0957-4158/02/$ - see front matter Ó 2002 Published by Elsevier Science Ltd. PII: S 0 9 5 7 - 4 1 5 8 ( 0 1 ) 0 0 0 1 2 - 5
636
J.W. Jeon, Y.-K. Kim / Mechatronics 12 (2002) 635–642
teristics can be independent from the acceleration characteristics. Since the computational load is increased almost exponentially with the order of polynomial in this technique, it requires a lot of computations to generate smooth velocity profiles with small jerk preferred for industrial robots and CNC machine tools [2–5]. Other existing techniques for generating velocity profiles are based on a digital convolution [5–9]. These techniques are much more efficient than the techniques selecting polynomial functions. But, some velocity profiles that are useful for industrial robots and CNC machine tools cannot be generated by these techniques [4]. In this paper, a generalized approach for the acceleration and deceleration of industrial robots and CNC machine tools is proposed. The proposed technique is as simple and efficient as the techniques based on a digital convolution and can generate more various velocity profiles than the techniques based on a digital convolution can. According to the acceleration characteristics, the deceleration characteristics, and the acceleration interval, and the deceleration interval, some coefficients are calculated and are stored in advance. Given a desired moving distance, a velocity profile that has the desired characteristics is generated by calculating the position increment during each sampling time. The position increment during each sampling is calculated by multiplying the stored coefficients with the product of one sampling time and the velocity after acceleration. Based on the proposed approach, an acceleration and deceleration circuit for industrial robots and CNC machine tools is designed by using the VHDL and it is implemented with a FPGA. In Section 2, it will be explained how to generate a desired velocity profile by the proposed technique. In Section 3, an acceleration and deceleration circuit based on the proposed approach will be designed and be implemented with a FPGA. In Section 4, an unsymmetrical smooth velocity profile generated by the acceleration and deceleration circuit will be applied to one single-axis control system. 2. Proposed trajectory generation technique Let us consider one single-axis control system of which the maximum velocity, the maximum acceleration, and the sampling time are Vmax , Amax and Ts , respectively. Let fa ðuÞ and fd ðuÞ represent the desired acceleration and deceleration characteristics, respectively, where fa ð0Þ ¼ 0, fa ð1Þ ¼ 1, fd ð0Þ ¼ 1, fd ð1Þ ¼ 0, and max jfa ðuÞj ¼ 06u61 R1 R1 max jfd ðuÞj ¼ 1. Defining aa ¼ 0 fa ðuÞ du and ad ¼ 0 fd ðuÞ du, aa and ad can be 06u61
calculated from the desired acceleration and deceleration characteristics, respectively, and be stored in advance. For some integers na and nd , defining a ck ¼ R k=na R k=nd fa ðuÞ du for k ¼ 1; 2; . . . ; na and d ck ¼ nd ðk1Þ=n fd ðuÞ du for k ¼ 1; 2; . . . ; na ðk1Þ=n a d nd , a ck can be calculated from na and the desired acceleration characteristics, and d ck can be calculated from nd and the desired deceleration characteristics. They can be stored in advance. Given an acceleration interval Ta ¼ na Ts , a deceleration interval Td ¼ nd Ts , and a distance S, a velocity profile with the acceleration characteristic, fa ðuÞ, and the deceleration characteristic, fd ðuÞ, can be generated as the following:
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637
(i) For an acceleration interval Ta ¼ na Ts and a deceleration interval Td ¼ nd Ts , the corresponding coefficients a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd are retrieved. (ii) For moving a distance S, the velocity after the acceleration Vm is determined as 8 S > > if N 6 0; S > : if N > 0; N þ aa na þ ad nd where N¼
S Vmax Ts
aa na ad nd :
ð2Þ
(iii) Then the position increment during each sampling time is calculated as a ck V m T s ; 1 6 k 6 na ; if N 6 0 dP ðkTs Þ ¼ d ð3Þ cðkna Þ Vm Ts ; na þ 1 6 k 6 na þ nd ; 8 a 1 6 k 6 na ; > < ck V m T s ; T ; n V ð4Þ if N > 0 dP ðkTs Þ ¼ m s a þ 1 6 k 6 na þ N ; > : dc na þ N þ 1 6 k 6 na þ N þ nd : ðkna N Þ Vm Ts ; Since the coefficients a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd has been calculated and stored in advance, the velocity profile with the desired acceleration and deceleration characteristics can be efficiently calculated for a given distance. Since the coefficients d c1 ; d c2 ; . . . ; d cnd can be selected independently from the coefficients a c1 ; a c2 ; . . . ; a cna , the deceleration characteristics can be made to be independent from the acceleration characteristics.
3. Design of an acceleration and deceleration circuit The proposed approach is designed as in Fig. 1 [2,9]. The coefficients that represent acceleration and deceleration characteristics a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd are stored in coefficient memory (CM). CM is not inside the FPGA, but consists of EPROMs. In order to perform fixed-point arithmetic rather than floating-point arithmetic, the coefficients a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd are multiplied by 128 and the corresponding integer values are stored in CM. The relation of the input clock frequency fclk and the sampling time Ts is given by fclk ¼ ð4 2048Þð1=Ts Þ. The value of C selects a velocity profile that has the desired acceleration and deceleration characteristics. The maximum position increment Vmax Ts when a motor is running at the maximum velocity Vmax is given by Fmax and its unit is the pulse. The maximum of Fmax is set to 2047. One pulse means the minimum value of position increment commands in industrial robots and CNC machine tools. na and nd represent the intervals of acceleration and deceleration, respectively, as in before. S is the distance of which the unit is pulse.
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CM γ
CG
VDD
RPC
Counter
γ
δP PI
CPG
Comparator1
Comparator2
Fig. 1. The architecture of proposed acceleration and deceleration circuit.
3.1. Clock generator The block clock generator (CG) divide the input clock, clk, by 4 and 2 to make cpg_clk and high_en, respectively. That is, the frequency fcpg clk of cpg_clk and the frequency fhigh en of high_en are given by fcpg clk ¼ fclk =4 and fhigh en ¼ fclk =2. The cpg_clk is used in the adding operation of the block command pulse generator (CPG) and in the Counter. The high_en is used in order to count the outputs of CPG when the outputs of CPG are remaining at ‘1’. 3.2. Determination of velocity after acceleration and deceleration distance The block velocity after acceleration and deceleration distance (VDD) selects a velocity profile that has the desired acceleration and deceleration characteristics by the input C, and selects aa and ad corresponding to na and nd . As in Eqs. (1) and (2), the velocity after acceleration Vm is given by the distance Vm Ts during one sampling time. The value of Vm Ts is calculated in the pulse unit and is represented by Fm . The distance Sd during the deceleration interval is determined by Fm , ad , and nd . These calculations are performed with fixed-point numbers in order to make a simple circuit. Fm is calculated as
J.W. Jeon, Y.-K. Kim / Mechatronics 12 (2002) 635–642
Fm ¼
8 < :
ð128SÞ ð128aa Þna þ ð128ad Þnd
Fmax
639
if ½ð128aa Þna þ ð128ad Þnd Fmax P ð128SÞ if ½ð128aa Þna þ ð128ad Þnd Fmax < ð128SÞ
ð5Þ If the value of Fm is calculated as zero, then a motor is not moving. Thus, if this happens, the value of Fm is set to 1. The second comparator (Comparator 2) as in Fig. 1 prevents the errors that may result from the difference of this setting and the true value of Fm . When the remaining distance Sr is zero, the second comparator sends a pulse-stop signal to the block CPG, which results in the stop of pulse generation. The distance Sd during the deceleration interval is calculated with fixed-point numbers as in the calculation of Fm .
ð128ad Þnd Fm Sd ¼ ð6Þ 128 3.3. Determination of position increment during each sampling time The block position increment (PI) during each sampling time calculates the position increment dP during each sampling time by multiplying Fm and a c1 ; a c2 ; . . . ; a cna , or d c1 ; d c2 ; . . . ; d cnd . Since the coefficients a c1 ; a c2 ; . . . ; a cna and d c1 ; d c2 ; . . . ; d cnd are multiplied by 128 and the corresponding integer values are stored in CM, the output dP of the block PI is the product of 128 and the true value of dP . Since the maximum value of Fmax is 2047, the maximum value of the output dP of the block PI is 2047 128. Thus, the number of bits of dP is 18. The true value of dP is obtained in the block CPG with dividing the output dP of the block PI by 128. 3.4. Command pulse generator The block CPG performs the similar function as digital differential analyzer (DDA) [2,7,9]. According to the period of the cpg_clk, the output dP of the block PI is added and the addition result is stored in the 18-bit register. The carry in this 18-bit register is the output of the block CPG. The high_en is used in order to count the outputs of the block CPG when the outputs are remaining at 1. The input clock frequency fclk and the frequency fcpg clk of cpg_clk and the sampling time Ts have the relation of fclk ¼ ð4 2048Þð1=Ts Þ and fcpg clk ¼ fclk =4. If dP is the input of the block CPG during one sampling time, then the corresponding output pulse of the block CPG is calculated as ðdP fcpg clk Ts Þ=218 ¼ ðdP 2048Þ=218 ¼ dP =128 and therefore the true value of dP is obtained. 3.5. Determination of deceleration start time The block remaining pulse calculator (RPC) and the first comparator (Comparator 1) determine when the deceleration starts. The remaining distance Sr represents the amount of the remaining movement. The block RPC calculates Sr by decrementing the value of given distance S each time one output pulse of the block CPG
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is generated. Comparing Sr with the distance Sd during the deceleration interval determines when the deceleration starts. That is, when Sr is the same as Sd , the output value UD of the first comparator is changed to 1 and the deceleration is starting. 3.6. Determination of coefficients in velocity profiles As in the above, the coefficients ð128a c1 Þ; ð128a c2 Þ; . . . ; ð128a cna Þ and ð128d c1 Þ; ð128d c2 Þ; . . . ; ð128d cnd Þ representing the acceleration and deceleration characteristics, respectively, are stored in CM. If the output value UD of the first comparator is 0, the portion of CM storing ð128a c1 Þ; ð128a c2 Þ; . . . ; ð128a cna Þ is selected. If UD is 1, that of CM storing ð128d c1 Þ; ð128d c2 Þ; . . . ; ð128d cnd Þ is selected. Thus, during the acceleration, the upper address of CM is determined by the value C and the acceleration interval na and the lower address of CM is determined by the value of counter. Similarly, during the deceleration, the upper address of CM is determined by the value C and the deceleration interval nd and the lower address of CM is determined by the value of counter. There are two counters in the Counter block. One counter is used during the acceleration and represents the lower address of CM storing ð128a c1 Þ; ð128a c2 Þ; . . . ; ð128a cna Þ. The other is used during the deceleration and represents the lower address of CM storing ð128d c1 Þ; ð128d c2 Þ; . . . ; ð128d cnd Þ. If UD is 0, then the counter used during the acceleration is incremented according to cpg_clk. Since the bit positions from 11 to 17 of the counter output are connected to the bit positions from 0 to 6 of the address of CM, the address of CM is incremented on the 2048th period of the cpg_clk. The address of CM is constant during the sampling time Ts and therefore the frequency of the cpg_clk fcpg clk and the sampling time Ts have the relation of fcpg clk ¼ 2048ð1=Ts Þ. Since the cpg_clk is obtained with dividing the input clock clk by 4, the input clock clk and the sampling time Ts have the relation of fclk ¼ ð4 2048Þð1=Ts Þ. If the value of the counter used during the acceleration is ð2048na 1Þ, the counting operation stops and the same counter value remains. If UD is 1, then the counter used during the deceleration is incremented according to cpg_clk. As in the counter used during the acceleration, since the bit positions from 11 to 17 of the counter output are connected to the bit positions from 0 to 6 of the address of CM, the address of CM is incremented on the 2048th period of the cpg_clk. If the value of the counter used for during the deceleration is ð2048nd 1Þ, the counting operation stops and the same counter value remains.
4. Experiments In order to implement the proposed acceleration and deceleration circuit as in Fig. 1, an ALTERA EPF10K40RC208-4 that has 2304 logic elements and 8 embedded array blocks has been used [10]. The experimental setup consists of one brushless DC servo motor system with the load of an iron disk and the sampling time is 4 ms. The motor resolution and the maximum velocity Vmax are 4096 pulses/rev and 3000 rpm, respectively. The radius and the thickness of the iron disk are 40 and 8 mm, respectively. The input clock frequency fclk is 2.048 MHz to match to this sampling
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Fig. 2. A velocity command and its response.
time. The maximum of the input clock frequency fclk in the ALTERA EPF10K40RC208-4 is 17.33 MHz, and therefore the smaller sampling time can be used. Given S ¼ 100 000 pulses, Ta ¼ 240 ms, and Td ¼ 320 ms, an unsymmetrical smooth velocity profile of which the acceleration and deceleration characteristics are given by fa ðuÞ ¼ Vm sinð0:5puÞ and fd ðuÞ ¼ 0:5Vm ðsinðpðu 1:5ÞÞ þ 1Þ, respectively, has been generated by the proposed circuit and applied to the brushless DC servo system. This unsymmetrical smooth velocity profile cannot be generated by digital convolution techniques. Fig. 2 shows the result of the position control under a proportional control with gain 96/256.
5. Conclusion A generalized approach for the acceleration and deceleration of industrial robots and CNC machine tools has been proposed. The acceleration and deceleration circuit based on the proposed approach is designed and is implemented. Since the implemented circuit can generate an arbitrary velocity profile that cannot be generated by digital convolution techniques, the implemented circuit can generate an appropriate velocity profile in order to perform a given task more efficiently for industrial robots and CNC machine tools. Also, the implemented circuit can be applied to a real-time robot control with external sensors.
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[4] Jeon JW. An efficient acceleration for fast motion of industrial robots. Proceedings of IEEE 21st IECON, 6–10 November 1995. Orlando, FL. p. 1336–41. [5] Kim DI, Jeon JW, Kim S. Software acceleration/deceleration methods for industrial robots and CNC machine tools. Mechatronics 1994;4(1):37–53. [6] Khalsa DS. High performance motion control trajectory commands based on the convolution integral and digital filtering. Proceedings of Intelligent Motion 1990:54–61. [7] Nozawa R, et al. Acceleration/Deceleration Circuit, United States Patent, Patent No. 4 554 497. 19 November, 1985. [8] Masory O, Koren Y. Reference-word circular interpolators for CNC Systems. Trans of ASME J Eng Ind 1982;104:400–5. [9] Koren Y. Computer control of manufacturing systems. New York: McGraw-Hill, 1988. [10] ALTERA data book, 1998.