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Fully scaled 0.5μm MOS circuits by synchrotron radiation X-ray lithography: Mask fabrication and chraterization
MicroelectronicEngineering
93
9 (1989) 93-96
North.Holland
FULLY SCALED 0.5 /urnMOS CIRCUITS BY SYNCHROTRON RADIATION X-RAY LITHOGRAPHY: FABRICATION AND CHRACTERIZATION
MASK
R. VISWANATHAN, R. ACOSTA, D. SEEGER, H. VOELKER, A. D. WILSON, I. BABICH, J. MALDONADO, J. WARLAUMONT, 0. VLADIRMIRSKY AND F. HOHN IBM Research Division, Thomas J. Watson Research Center, Yorktown Heights, NY 10598
and
D. CROCKATT and R. FAIR. IBM General Technology Division, Hopewell Junction, NY 12533
Full sets (8 levels each) of X-ray masks have been made and characterized for overlay, resolution and line- width control. These mask sets have been successfully used to fabricate fully scaled OSam MOS circuits. The mask absorber included, in addition to the device pattern, test patterns and fiducial% A multilevel resist system was used to pattern the critical levels of the mask set. The precision of the mask set has been characterized by measuring more than 600 fiducialson each mask. Analysis of this data shows a level to level overlay error of less than 0.12 pm (3 u) including measurement error. SEM measurements show a line-width controlled to within 250 A(1 (I). Details of the device masks and their characteristics are discussed in this paper.
1. INTRODUCTION
2. MASK FABRICATION
Several issues related to X-Ray mask fabrication, such as absorber and process induced distortion, resolution capabilities, control of linewidth, and mask overlay have hitherto been studied only in an isolated fashion [1,2]. To better understand the interplay of all these issues, it was decided to fabricate fully scaled 0.5 pm MOS devices using X-Ray lithography for all exposure levels. [3]. An assortment of devices (ring oscillators, parametric test sites, and high density memory chips) were included.
The steps required to fabricate the masks, as well as the overall layout of the alignment marks have been described earlier [4]. The patterns were written using a 25 KV vector-scan e-beam mask writer with a probe size of 900 8, (fwhm). The foot-print of the e-beam system was measured before each mask was written to insure repeatability of the writer. In addition, to reduce dimensional changes due to inequalities in temperature between the writing chamber and the mask, the latter was introduced into the chamber several hours before the actual writing took place. To compensate for drift of the beam and stage during the writing time special reference marks, previously fabricated on the masks, were monitored during writing [ 5,6].
The masks used had a useable exposure area of 25 x 25 mm. Alignment between levels was achieved using alignment marks located outside the exposure area. A matrix of distortion fiducials (over 600 of them) was written in the kerf area of the chips and extending to the surrounding solid silicon area. These crosses were measured for mask metrology information. Within the exposure area there were several test sites (overlay and high resolution patterns) in addition to the device patterns. These test sites were used to determine uniformity of the process and linewidth control.
0167.9317/89/$3.50
0
1989, Elsevier Science Publishers
Because electrodeposition is used for formation of the mask absorber [4], the requirements on the resist are very stringent: vertical profile and a high aspect ratio. Hence a multilevel resist system was developed for patterning the critical
B.V. (North-Holland)
R. Viswanathan et al. I Fully scaled 0.5 pm MOS circuits
94
levels (those containing actual 0.5 pm patterns). The multilevel resist system employed consists of a bottom polyimide (PI) layer (to be used as the electrodeposition stencil), a barrier layer of spin-on glass (SOG), and an imaging layer of terpolymer resist. The image written by the e-beam writer on this terpolymer, after development, is transferred first to the SOG and subsequently to the PI layer by reactive ion etching (RIE) using an appropriate sequence of reactive gases. Figure 1 shows 0.35 pm features patterned with this process. As shown by the left side of the figure, an aspect ratio of three was achieved. The right side of figure 1 shows the resulting electrodeposited gold, which conforms to the resist contour with excellent fidelity and without any edge roughness or any surface granularity.
ess. However, the MLR process has less bias and better mask to mask repeatability than the SLR process. Additionally, the control of the resist profile and the resolution of the MLR process are better than that of the SLR one: the minimum feature size for the former is 0.25 pm, while the latter fails to give features below 0.35 Frn reproducibly.
Table I LW data
MLR
avg. LW LW variation/mask( 1 u) mask to mask LW variation
0.522 0.017 0.021
SLR pm firn lrn
0.588 0.017 0.028
pm pm pm
(1 0) Distortion
and overlay
The placement of the absorber elements on the X-Ray mask may be affected by the e-beam mask writer, and by the uneven stresses applied on the membrane during processing of the resist and formation qf the absorber.
Gold Pattern
Figl. Aspect ratio of 3 was obtained using MLR process. Electrodeposited gold conforms to the resist contour with good integrity.
For the non-critical levels of the mask set a single-layer terpolymer resist (SLR) was used. Since all the masks included the high resolution test sites, it was possible to compare the resolution achievable by the two processes.
3. RESULTS
AND DISCUSSION
Resolution and Linewidth Control The uniformity and control of the linewidth obtained using both the SLR and the MLR process were determined using an automated line-width measurement system on an SEM to measure the 0.5 Cm features. The results are summarized in Table 1. From these results and from SEM micrographs of cross sections of the resist and deposited absorber the following conclusions are drawn: the overall uniformity on a typical mask is similar for both the SLR and the MLR proc-
The position of the 600 fiducials on each mask was determined at the resist level, after deposition of the absorber, and after all subsequent process steps were completed. All of the measurements were made using a Nikon 2i system. The accuracy’of the Nikon 2i machine is 30 nm (1 u) The measurement data was analyzed for absolute accuracy, mask to mask oirerlay, and for absorber induced distortion. Information on the absorber induced distortion was obtained by comparing the position of the fiducial marks before and after electrodeposition of the absorber (i.e., at the resist level and after the absorber had been electrodeposited and the resist stripped). Figure 2 illustrates the error data for the Poly level mask. The density of the pattern for the various chips at this level ranged between 5 and 20 %. Notice that there is no evidence of absorber induced distortion. Figure 3 shows similar measurements for the ROX level. For this figure data on the fiducials written outside the membrane area (thick silicon), as well as data inside the membrane were included. No difference between the two areas is apparent. All other levels of the g-mask set were similarly measured. In none of them was it possible to detect distortion attributable to the effect of the absorber. Process
induced distortions
As stated above, the processes used to fabricate an X-ray mask may by themselves induce distortion of the mask. One of the processes that may cause distortion of the mask is formation of the pattern in the resist. Many resist films are deposited with substantial tensile stress. When the e-beam image is developed a fraction of the tensile film is removed. The non-homogenous relief of stress may cause displacement of the written image. Additionally, for the case of MLR systems, when the image is transferred by RIE to the
R. Viswanathan et al. I Fully scaled 0.5 urn MOS circuits
bottom layer substantial membrane, may occur. but noticeable distortion Additional experimental
95
heating of the resist, and the mask We have observed an insignificant due to RIE heating. (MLR Process) data is required to verify this effect.
Mask to mask overlay The matrix of fiducials of all the masks forming the set was measured after all processing of the mask was completed. The data from every mask level was then overlayed on the data for the ROX level: The difference in position between every fiducial of the ROX level and the corresponding fiducial of all other levels was calculated. Before this comparison was performed the ROX mask was adjusted to a mean magnification value. Additionally, rotation and translation corrections were applied for every comparison.
Fig2. Absorber Induced distortion for Poly level mask. Comparison of the resist data to absorber data for Poly level. 1 CJerror = 0.02 pm. max error = 0.06 pm. Here only the chip area (membrane) is shown.
The resulting mask to mask overlay of three chips (a high density memory chip, a low density parametric chip, and an empty chip site) for all levels was analyzed. The pattern density for the memory chips and for the transistor sites is 10 to 40% and 5 to 20%, respectively. In both cases the density is level dependent. The mask to mask overlay error is well within the required tolerance. The analysis further indicates that pattern density, including zero density (for the empty chip), had no effect on the overlay. A histogram of the overlay for all the chips at all levels is shown in Figure 4. The 1 (r overlay for all levels, except the POLY level, is well within 0.036 ,um (for POLY the 1 u = 0.04 pm), including measurement error, which is 0.03 pm (1 0).
4. CONCLUSIONS Routine fabrication of X-Ray masks has been demonstrated at 0.5 pm dimensions with a mask to mask overlay error of 0.12 pm (3 0). These masks have been successfully used to fabricate working MOS devices. Distortion induced by the absorber was found to be negligible (within the measurement accuracy) for our masks due to the small tensile stress of the electrodeposited gold. We expect that this will be true for other masks where the absorber patterns have some degree of symmetry. In this work we have also demonstrated that high resolution (0.25 pm) absorber structures with vertical walls can be obtained using an optimized multilayer resist system and electrodeposition of gold.
ACKNOWLEDGMENTS
-+ 0.1 pm
Fig3: Absorber induced distortion shown for ROX level. No difference between membrane and wafer part of the mask.
The authors would like to thank J. Lafuente for developing and writing the control and application software for our mask maker. We also thank P. Coane, W. Molzen and M. Rosenfield for providing significant assistance in postprocessing the data and evaluating the proximity parameters.
R. Viswanathan et al. / Fully scaled 0.5 pm MOS circuits
96
mask
to mask
,-
Itsigma
=
0.036
UI
, dgmc
= 0.030
overlay
It- -I
u
Y error In urn
Y r
aigmo
= 0.020
1
sigma
L
,
sigma
= 0.034
aigmo
=
aigmo
0.042
In
CIrror
I
1
I
I
0.026
=
1
r
u
7
I
TO RX
CA TO RX
PC TO RX
,
,
= 0.030
,
UI
“In
I
I
= 0.035
x
Ml
,
sigma
FI TO RX
mrmr In urn
BP TO RX
Fig4. Histogram data for all of the chips for all levels. Vertical axis shows the frequency of error occurance in percentage. 1 IJ error = 0.04 pm for X-axis and 0.036 pm for Y-axis. Measurement errors were not removed.
REFERENCES [l] R.E. Acosta, J.R. Maldonado, R. Fair, R. Viswanathan and A.D. Wilson “Distortion of masks for X-Ray lithography” Microcircuit electronic Engineering, Vol 3 (1985) 615-621.
[4]
R.E.Acosta, J.R. Maldonado, L.K. Towart, J.M.Warlaumont, “B-Si masks for storage ring X-Ray lithography, Proc SPIE, Vol 448, Ott 19-20, 1983, Upton, N.Y.
[2] H. Betz, H.L. Huber, S. Pongratz, W. Rohrmoser, W. Windbracke., “Silicon X-Ray masks: Pattern Placement and overlay accuracy”. Microcircuit electronic Engineering ~015 (1986) 41-49.
[5] R.Viswanathan, A.D.Wilson, J. Lafuente, H. Voelker, A. Kern “Electron Beam pattern writer for X-Ray masks”, Proc SPIE, Vol 448, Oct. 19-20, 1983, Upton, N.Y.
[3] J. P. Silverman, V. DiMilia, D. Katcoff, K. Kwietniak, D. Seeger, L. K. Wang, J. M. Warlaumont, A. D. Wilson, D. Crockatt, R. Devenuto, B. Hill, L. C. Hsia, and R. Rippstein, “Fully-scaled 0.5 pm. MOS Device fabrication using Synchrotron X-Ray lithography: Overlay, resist processes and device fabrication.” (This conference)
[6]
A.D. Wilson “Electron-Beam systems for precision micron and submicron lithography”, IEEE Proceedings, Vol. 71, No.5, May 1983.
93
9 (1989) 93-96
North.Holland
FULLY SCALED 0.5 /urnMOS CIRCUITS BY SYNCHROTRON RADIATION X-RAY LITHOGRAPHY: FABRICATION AND CHRACTERIZATION
MASK
R. VISWANATHAN, R. ACOSTA, D. SEEGER, H. VOELKER, A. D. WILSON, I. BABICH, J. MALDONADO, J. WARLAUMONT, 0. VLADIRMIRSKY AND F. HOHN IBM Research Division, Thomas J. Watson Research Center, Yorktown Heights, NY 10598
and
D. CROCKATT and R. FAIR. IBM General Technology Division, Hopewell Junction, NY 12533
Full sets (8 levels each) of X-ray masks have been made and characterized for overlay, resolution and line- width control. These mask sets have been successfully used to fabricate fully scaled OSam MOS circuits. The mask absorber included, in addition to the device pattern, test patterns and fiducial% A multilevel resist system was used to pattern the critical levels of the mask set. The precision of the mask set has been characterized by measuring more than 600 fiducialson each mask. Analysis of this data shows a level to level overlay error of less than 0.12 pm (3 u) including measurement error. SEM measurements show a line-width controlled to within 250 A(1 (I). Details of the device masks and their characteristics are discussed in this paper.
1. INTRODUCTION
2. MASK FABRICATION
Several issues related to X-Ray mask fabrication, such as absorber and process induced distortion, resolution capabilities, control of linewidth, and mask overlay have hitherto been studied only in an isolated fashion [1,2]. To better understand the interplay of all these issues, it was decided to fabricate fully scaled 0.5 pm MOS devices using X-Ray lithography for all exposure levels. [3]. An assortment of devices (ring oscillators, parametric test sites, and high density memory chips) were included.
The steps required to fabricate the masks, as well as the overall layout of the alignment marks have been described earlier [4]. The patterns were written using a 25 KV vector-scan e-beam mask writer with a probe size of 900 8, (fwhm). The foot-print of the e-beam system was measured before each mask was written to insure repeatability of the writer. In addition, to reduce dimensional changes due to inequalities in temperature between the writing chamber and the mask, the latter was introduced into the chamber several hours before the actual writing took place. To compensate for drift of the beam and stage during the writing time special reference marks, previously fabricated on the masks, were monitored during writing [ 5,6].
The masks used had a useable exposure area of 25 x 25 mm. Alignment between levels was achieved using alignment marks located outside the exposure area. A matrix of distortion fiducials (over 600 of them) was written in the kerf area of the chips and extending to the surrounding solid silicon area. These crosses were measured for mask metrology information. Within the exposure area there were several test sites (overlay and high resolution patterns) in addition to the device patterns. These test sites were used to determine uniformity of the process and linewidth control.
0167.9317/89/$3.50
0
1989, Elsevier Science Publishers
Because electrodeposition is used for formation of the mask absorber [4], the requirements on the resist are very stringent: vertical profile and a high aspect ratio. Hence a multilevel resist system was developed for patterning the critical
B.V. (North-Holland)
R. Viswanathan et al. I Fully scaled 0.5 pm MOS circuits
94
levels (those containing actual 0.5 pm patterns). The multilevel resist system employed consists of a bottom polyimide (PI) layer (to be used as the electrodeposition stencil), a barrier layer of spin-on glass (SOG), and an imaging layer of terpolymer resist. The image written by the e-beam writer on this terpolymer, after development, is transferred first to the SOG and subsequently to the PI layer by reactive ion etching (RIE) using an appropriate sequence of reactive gases. Figure 1 shows 0.35 pm features patterned with this process. As shown by the left side of the figure, an aspect ratio of three was achieved. The right side of figure 1 shows the resulting electrodeposited gold, which conforms to the resist contour with excellent fidelity and without any edge roughness or any surface granularity.
ess. However, the MLR process has less bias and better mask to mask repeatability than the SLR process. Additionally, the control of the resist profile and the resolution of the MLR process are better than that of the SLR one: the minimum feature size for the former is 0.25 pm, while the latter fails to give features below 0.35 Frn reproducibly.
Table I LW data
MLR
avg. LW LW variation/mask( 1 u) mask to mask LW variation
0.522 0.017 0.021
SLR pm firn lrn
0.588 0.017 0.028
pm pm pm
(1 0) Distortion
and overlay
The placement of the absorber elements on the X-Ray mask may be affected by the e-beam mask writer, and by the uneven stresses applied on the membrane during processing of the resist and formation qf the absorber.
Gold Pattern
Figl. Aspect ratio of 3 was obtained using MLR process. Electrodeposited gold conforms to the resist contour with good integrity.
For the non-critical levels of the mask set a single-layer terpolymer resist (SLR) was used. Since all the masks included the high resolution test sites, it was possible to compare the resolution achievable by the two processes.
3. RESULTS
AND DISCUSSION
Resolution and Linewidth Control The uniformity and control of the linewidth obtained using both the SLR and the MLR process were determined using an automated line-width measurement system on an SEM to measure the 0.5 Cm features. The results are summarized in Table 1. From these results and from SEM micrographs of cross sections of the resist and deposited absorber the following conclusions are drawn: the overall uniformity on a typical mask is similar for both the SLR and the MLR proc-
The position of the 600 fiducials on each mask was determined at the resist level, after deposition of the absorber, and after all subsequent process steps were completed. All of the measurements were made using a Nikon 2i system. The accuracy’of the Nikon 2i machine is 30 nm (1 u) The measurement data was analyzed for absolute accuracy, mask to mask oirerlay, and for absorber induced distortion. Information on the absorber induced distortion was obtained by comparing the position of the fiducial marks before and after electrodeposition of the absorber (i.e., at the resist level and after the absorber had been electrodeposited and the resist stripped). Figure 2 illustrates the error data for the Poly level mask. The density of the pattern for the various chips at this level ranged between 5 and 20 %. Notice that there is no evidence of absorber induced distortion. Figure 3 shows similar measurements for the ROX level. For this figure data on the fiducials written outside the membrane area (thick silicon), as well as data inside the membrane were included. No difference between the two areas is apparent. All other levels of the g-mask set were similarly measured. In none of them was it possible to detect distortion attributable to the effect of the absorber. Process
induced distortions
As stated above, the processes used to fabricate an X-ray mask may by themselves induce distortion of the mask. One of the processes that may cause distortion of the mask is formation of the pattern in the resist. Many resist films are deposited with substantial tensile stress. When the e-beam image is developed a fraction of the tensile film is removed. The non-homogenous relief of stress may cause displacement of the written image. Additionally, for the case of MLR systems, when the image is transferred by RIE to the
R. Viswanathan et al. I Fully scaled 0.5 urn MOS circuits
bottom layer substantial membrane, may occur. but noticeable distortion Additional experimental
95
heating of the resist, and the mask We have observed an insignificant due to RIE heating. (MLR Process) data is required to verify this effect.
Mask to mask overlay The matrix of fiducials of all the masks forming the set was measured after all processing of the mask was completed. The data from every mask level was then overlayed on the data for the ROX level: The difference in position between every fiducial of the ROX level and the corresponding fiducial of all other levels was calculated. Before this comparison was performed the ROX mask was adjusted to a mean magnification value. Additionally, rotation and translation corrections were applied for every comparison.
Fig2. Absorber Induced distortion for Poly level mask. Comparison of the resist data to absorber data for Poly level. 1 CJerror = 0.02 pm. max error = 0.06 pm. Here only the chip area (membrane) is shown.
The resulting mask to mask overlay of three chips (a high density memory chip, a low density parametric chip, and an empty chip site) for all levels was analyzed. The pattern density for the memory chips and for the transistor sites is 10 to 40% and 5 to 20%, respectively. In both cases the density is level dependent. The mask to mask overlay error is well within the required tolerance. The analysis further indicates that pattern density, including zero density (for the empty chip), had no effect on the overlay. A histogram of the overlay for all the chips at all levels is shown in Figure 4. The 1 (r overlay for all levels, except the POLY level, is well within 0.036 ,um (for POLY the 1 u = 0.04 pm), including measurement error, which is 0.03 pm (1 0).
4. CONCLUSIONS Routine fabrication of X-Ray masks has been demonstrated at 0.5 pm dimensions with a mask to mask overlay error of 0.12 pm (3 0). These masks have been successfully used to fabricate working MOS devices. Distortion induced by the absorber was found to be negligible (within the measurement accuracy) for our masks due to the small tensile stress of the electrodeposited gold. We expect that this will be true for other masks where the absorber patterns have some degree of symmetry. In this work we have also demonstrated that high resolution (0.25 pm) absorber structures with vertical walls can be obtained using an optimized multilayer resist system and electrodeposition of gold.
ACKNOWLEDGMENTS
-+ 0.1 pm
Fig3: Absorber induced distortion shown for ROX level. No difference between membrane and wafer part of the mask.
The authors would like to thank J. Lafuente for developing and writing the control and application software for our mask maker. We also thank P. Coane, W. Molzen and M. Rosenfield for providing significant assistance in postprocessing the data and evaluating the proximity parameters.
R. Viswanathan et al. / Fully scaled 0.5 pm MOS circuits
96
mask
to mask
,-
Itsigma
=
0.036
UI
, dgmc
= 0.030
overlay
It- -I
u
Y error In urn
Y r
aigmo
= 0.020
1
sigma
L
,
sigma
= 0.034
aigmo
=
aigmo
0.042
In
CIrror
I
1
I
I
0.026
=
1
r
u
7
I
TO RX
CA TO RX
PC TO RX
,
,
= 0.030
,
UI
“In
I
I
= 0.035
x
Ml
,
sigma
FI TO RX
mrmr In urn
BP TO RX
Fig4. Histogram data for all of the chips for all levels. Vertical axis shows the frequency of error occurance in percentage. 1 IJ error = 0.04 pm for X-axis and 0.036 pm for Y-axis. Measurement errors were not removed.
REFERENCES [l] R.E. Acosta, J.R. Maldonado, R. Fair, R. Viswanathan and A.D. Wilson “Distortion of masks for X-Ray lithography” Microcircuit electronic Engineering, Vol 3 (1985) 615-621.
[4]
R.E.Acosta, J.R. Maldonado, L.K. Towart, J.M.Warlaumont, “B-Si masks for storage ring X-Ray lithography, Proc SPIE, Vol 448, Ott 19-20, 1983, Upton, N.Y.
[2] H. Betz, H.L. Huber, S. Pongratz, W. Rohrmoser, W. Windbracke., “Silicon X-Ray masks: Pattern Placement and overlay accuracy”. Microcircuit electronic Engineering ~015 (1986) 41-49.
[5] R.Viswanathan, A.D.Wilson, J. Lafuente, H. Voelker, A. Kern “Electron Beam pattern writer for X-Ray masks”, Proc SPIE, Vol 448, Oct. 19-20, 1983, Upton, N.Y.
[3] J. P. Silverman, V. DiMilia, D. Katcoff, K. Kwietniak, D. Seeger, L. K. Wang, J. M. Warlaumont, A. D. Wilson, D. Crockatt, R. Devenuto, B. Hill, L. C. Hsia, and R. Rippstein, “Fully-scaled 0.5 pm. MOS Device fabrication using Synchrotron X-Ray lithography: Overlay, resist processes and device fabrication.” (This conference)
[6]
A.D. Wilson “Electron-Beam systems for precision micron and submicron lithography”, IEEE Proceedings, Vol. 71, No.5, May 1983.